Both _dpu_crtc_setup_blend_cfg() and setup_blend_config_alpha()
callbacks embed knowledge about platform's alpha range (8-bit or
10-bit). Make _dpu_crtc_setup_blend_cfg() use full 16-bit values for
alpha and reduce alpha only in DPU-specific callbacks.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 16 +++++-----------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 10 ++++++----
2 files changed, 11 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index 651159e8731194d75b52c05158bfd1c9bad8b10c..a280c136104added1dbb2b432f15680bc1d5bd36 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -326,26 +326,20 @@ static void _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer,
{
struct dpu_hw_mixer *lm = mixer->hw_lm;
u32 blend_op;
- u32 fg_alpha, bg_alpha, max_alpha;
+ u32 fg_alpha, bg_alpha;
- if (mdss_ver->core_major_ver < 12) {
- max_alpha = 0xff;
- fg_alpha = pstate->base.alpha >> 8;
- } else {
- max_alpha = 0x3ff;
- fg_alpha = pstate->base.alpha >> 6;
- }
+ fg_alpha = pstate->base.alpha;
/* default to opaque blending */
if (pstate->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE ||
!format->alpha_enable) {
blend_op = DPU_BLEND_FG_ALPHA_FG_CONST |
DPU_BLEND_BG_ALPHA_BG_CONST;
- bg_alpha = max_alpha - fg_alpha;
+ bg_alpha = DRM_BLEND_ALPHA_OPAQUE - fg_alpha;
} else if (pstate->base.pixel_blend_mode == DRM_MODE_BLEND_PREMULTI) {
blend_op = DPU_BLEND_FG_ALPHA_FG_CONST |
DPU_BLEND_BG_ALPHA_FG_PIXEL;
- if (fg_alpha != max_alpha) {
+ if (fg_alpha != DRM_BLEND_ALPHA_OPAQUE) {
bg_alpha = fg_alpha;
blend_op |= DPU_BLEND_BG_MOD_ALPHA |
DPU_BLEND_BG_INV_MOD_ALPHA;
@@ -357,7 +351,7 @@ static void _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer,
/* coverage blending */
blend_op = DPU_BLEND_FG_ALPHA_FG_PIXEL |
DPU_BLEND_BG_ALPHA_FG_PIXEL;
- if (fg_alpha != max_alpha) {
+ if (fg_alpha != DRM_BLEND_ALPHA_OPAQUE) {
bg_alpha = fg_alpha;
blend_op |= DPU_BLEND_FG_MOD_ALPHA |
DPU_BLEND_FG_INV_MOD_ALPHA |
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
index e8a76d5192c230fd64d748634ca8574a59aac02c..fb8c94fdb829be6f89bfcc6c5a83fdbd27778bf2 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
@@ -139,7 +139,8 @@ static void dpu_hw_lm_setup_blend_config_combined_alpha(struct dpu_hw_mixer *ctx
if (WARN_ON(stage_off < 0))
return;
- const_alpha = (bg_alpha & 0xFF) | ((fg_alpha & 0xFF) << 16);
+ const_alpha = ((bg_alpha >> 8) & 0xff) |
+ (((fg_alpha >> 8) & 0xff) << 16);
DPU_REG_WRITE(c, LM_BLEND0_CONST_ALPHA + stage_off, const_alpha);
DPU_REG_WRITE(c, LM_BLEND0_OP + stage_off, blend_op);
}
@@ -160,7 +161,8 @@ dpu_hw_lm_setup_blend_config_combined_alpha_v12(struct dpu_hw_mixer *ctx,
if (WARN_ON(stage_off < 0))
return;
- const_alpha = (bg_alpha & 0x3ff) | ((fg_alpha & 0x3ff) << 16);
+ const_alpha = ((bg_alpha >> 6) & 0x3ff) |
+ (((fg_alpha >> 6) & 0x3ff) << 16);
DPU_REG_WRITE(c, LM_BLEND0_CONST_ALPHA_V12 + stage_off, const_alpha);
DPU_REG_WRITE(c, LM_BLEND0_OP + stage_off, blend_op);
}
@@ -178,8 +180,8 @@ static void dpu_hw_lm_setup_blend_config(struct dpu_hw_mixer *ctx,
if (WARN_ON(stage_off < 0))
return;
- DPU_REG_WRITE(c, LM_BLEND0_FG_ALPHA + stage_off, fg_alpha);
- DPU_REG_WRITE(c, LM_BLEND0_BG_ALPHA + stage_off, bg_alpha);
+ DPU_REG_WRITE(c, LM_BLEND0_FG_ALPHA + stage_off, fg_alpha >> 8);
+ DPU_REG_WRITE(c, LM_BLEND0_BG_ALPHA + stage_off, bg_alpha >> 8);
DPU_REG_WRITE(c, LM_BLEND0_OP + stage_off, blend_op);
}
--
2.47.3On 11/18/25 3:51 PM, Dmitry Baryshkov wrote: > Both _dpu_crtc_setup_blend_cfg() and setup_blend_config_alpha() > callbacks embed knowledge about platform's alpha range (8-bit or > 10-bit). Make _dpu_crtc_setup_blend_cfg() use full 16-bit values for > alpha and reduce alpha only in DPU-specific callbacks. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> > --- [...] > - const_alpha = (bg_alpha & 0xFF) | ((fg_alpha & 0xFF) << 16); > + const_alpha = ((bg_alpha >> 8) & 0xff) | > + (((fg_alpha >> 8) & 0xff) << 16); This begs for some bitfield.h Konrad > DPU_REG_WRITE(c, LM_BLEND0_CONST_ALPHA + stage_off, const_alpha); > DPU_REG_WRITE(c, LM_BLEND0_OP + stage_off, blend_op); > } > @@ -160,7 +161,8 @@ dpu_hw_lm_setup_blend_config_combined_alpha_v12(struct dpu_hw_mixer *ctx, > if (WARN_ON(stage_off < 0)) > return; > > - const_alpha = (bg_alpha & 0x3ff) | ((fg_alpha & 0x3ff) << 16); > + const_alpha = ((bg_alpha >> 6) & 0x3ff) | > + (((fg_alpha >> 6) & 0x3ff) << 16); > DPU_REG_WRITE(c, LM_BLEND0_CONST_ALPHA_V12 + stage_off, const_alpha); > DPU_REG_WRITE(c, LM_BLEND0_OP + stage_off, blend_op); > } > @@ -178,8 +180,8 @@ static void dpu_hw_lm_setup_blend_config(struct dpu_hw_mixer *ctx, > if (WARN_ON(stage_off < 0)) > return; > > - DPU_REG_WRITE(c, LM_BLEND0_FG_ALPHA + stage_off, fg_alpha); > - DPU_REG_WRITE(c, LM_BLEND0_BG_ALPHA + stage_off, bg_alpha); > + DPU_REG_WRITE(c, LM_BLEND0_FG_ALPHA + stage_off, fg_alpha >> 8); > + DPU_REG_WRITE(c, LM_BLEND0_BG_ALPHA + stage_off, bg_alpha >> 8); > DPU_REG_WRITE(c, LM_BLEND0_OP + stage_off, blend_op); > } > >
On Tue, Nov 18, 2025 at 04:02:03PM +0100, Konrad Dybcio wrote: > On 11/18/25 3:51 PM, Dmitry Baryshkov wrote: > > Both _dpu_crtc_setup_blend_cfg() and setup_blend_config_alpha() > > callbacks embed knowledge about platform's alpha range (8-bit or > > 10-bit). Make _dpu_crtc_setup_blend_cfg() use full 16-bit values for > > alpha and reduce alpha only in DPU-specific callbacks. > > > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> > > --- > > [...] > > > - const_alpha = (bg_alpha & 0xFF) | ((fg_alpha & 0xFF) << 16); > > + const_alpha = ((bg_alpha >> 8) & 0xff) | > > + (((fg_alpha >> 8) & 0xff) << 16); > > This begs for some bitfield.h Which one(s) would you recommend? Ideally it should be something like 'get N top bits', but I don't see one. > Konrad > > > DPU_REG_WRITE(c, LM_BLEND0_CONST_ALPHA + stage_off, const_alpha); > > DPU_REG_WRITE(c, LM_BLEND0_OP + stage_off, blend_op); > > } > > @@ -160,7 +161,8 @@ dpu_hw_lm_setup_blend_config_combined_alpha_v12(struct dpu_hw_mixer *ctx, > > if (WARN_ON(stage_off < 0)) > > return; > > > > - const_alpha = (bg_alpha & 0x3ff) | ((fg_alpha & 0x3ff) << 16); > > + const_alpha = ((bg_alpha >> 6) & 0x3ff) | > > + (((fg_alpha >> 6) & 0x3ff) << 16); > > DPU_REG_WRITE(c, LM_BLEND0_CONST_ALPHA_V12 + stage_off, const_alpha); > > DPU_REG_WRITE(c, LM_BLEND0_OP + stage_off, blend_op); > > } > > @@ -178,8 +180,8 @@ static void dpu_hw_lm_setup_blend_config(struct dpu_hw_mixer *ctx, > > if (WARN_ON(stage_off < 0)) > > return; > > > > - DPU_REG_WRITE(c, LM_BLEND0_FG_ALPHA + stage_off, fg_alpha); > > - DPU_REG_WRITE(c, LM_BLEND0_BG_ALPHA + stage_off, bg_alpha); > > + DPU_REG_WRITE(c, LM_BLEND0_FG_ALPHA + stage_off, fg_alpha >> 8); > > + DPU_REG_WRITE(c, LM_BLEND0_BG_ALPHA + stage_off, bg_alpha >> 8); > > DPU_REG_WRITE(c, LM_BLEND0_OP + stage_off, blend_op); > > } > > > > -- With best wishes Dmitry
On 11/19/25 8:50 AM, Dmitry Baryshkov wrote: > On Tue, Nov 18, 2025 at 04:02:03PM +0100, Konrad Dybcio wrote: >> On 11/18/25 3:51 PM, Dmitry Baryshkov wrote: >>> Both _dpu_crtc_setup_blend_cfg() and setup_blend_config_alpha() >>> callbacks embed knowledge about platform's alpha range (8-bit or >>> 10-bit). Make _dpu_crtc_setup_blend_cfg() use full 16-bit values for >>> alpha and reduce alpha only in DPU-specific callbacks. >>> >>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> >>> --- >> >> [...] >> >>> - const_alpha = (bg_alpha & 0xFF) | ((fg_alpha & 0xFF) << 16); >>> + const_alpha = ((bg_alpha >> 8) & 0xff) | >>> + (((fg_alpha >> 8) & 0xff) << 16); >> >> This begs for some bitfield.h > > Which one(s) would you recommend? Ideally it should be something like > 'get N top bits', but I don't see one. Perhaps we can create one.. there's include/linux/wordpart.h with upper/lower_16/32_bits().. Maybe we could add #define lower_n_bits(x, n) (FIELD_GET(GENMASK((n - 1), 0), x) // register def #define CONST_ALPHA_BG GENMASK(,) #define CONST_ALPHA_FG GENMASK(,) const_alpha = FIELD_GET(CONST_ALPHA_BG, lower_n_bits(bg_alpha, 8)) | FIELD_GET(CONST_ALPHA_FG, lower_n_bits(fg_alpha, 8)); At which point it arguably becomes equally difficult to read.. but I think the rule of thumb is that syntax sugar is better than raw bitops ;) Konrad
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