From: Chen Pei <cp0613@linux.alibaba.com>

The file tools/arch/riscv/include/asm/csr.h borrows from
arch/riscv/include/asm/csr.h, and subsequent modifications
related to CSR should maintain consistency.

Fixes: 16b0bde9a37c ("RISC-V: KVM: Add perf sampling support for guests")
Fixes: d1927f64e0e1 ("RISC-V: Fix the typo in Scountovf CSR name")

Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>
---
 drivers/perf/riscv_pmu_sbi.c       | 2 +-
 tools/arch/riscv/include/asm/csr.h | 5 +++--
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
index e255c1b069ec..7dd282da67ce 100644
--- a/drivers/perf/riscv_pmu_sbi.c
+++ b/drivers/perf/riscv_pmu_sbi.c
@@ -1109,7 +1109,7 @@ static irqreturn_t pmu_sbi_ovf_handler(int irq, void *dev)
 			/* compute hardware counter index */
 			hidx = info->csr - CSR_CYCLE;
 
-		/* check if the corresponding bit is set in sscountovf or overflow mask in shmem */
+		/* check if the corresponding bit is set in scountovf or overflow mask in shmem */
 		if (!(overflow & BIT(hidx)))
 			continue;
 
diff --git a/tools/arch/riscv/include/asm/csr.h b/tools/arch/riscv/include/asm/csr.h
index 56d7367ee344..21d8cee04638 100644
--- a/tools/arch/riscv/include/asm/csr.h
+++ b/tools/arch/riscv/include/asm/csr.h
@@ -167,7 +167,8 @@
 #define VSIP_TO_HVIP_SHIFT	(IRQ_VS_SOFT - IRQ_S_SOFT)
 #define VSIP_VALID_MASK		((_AC(1, UL) << IRQ_S_SOFT) | \
 				 (_AC(1, UL) << IRQ_S_TIMER) | \
-				 (_AC(1, UL) << IRQ_S_EXT))
+				 (_AC(1, UL) << IRQ_S_EXT) | \
+				 (_AC(1, UL) << IRQ_PMU_OVF))
 
 /* AIA CSR bits */
 #define TOPI_IID_SHIFT		16
@@ -280,7 +281,7 @@
 #define CSR_HPMCOUNTER30H	0xc9e
 #define CSR_HPMCOUNTER31H	0xc9f
 
-#define CSR_SSCOUNTOVF		0xda0
+#define CSR_SCOUNTOVF		0xda0
 
 #define CSR_SSTATUS		0x100
 #define CSR_SIE			0x104
-- 
2.50.1

Hi, 

On Fri, 14 Nov 2025, cp0613@linux.alibaba.com wrote:

> From: Chen Pei <cp0613@linux.alibaba.com>
> 
> The file tools/arch/riscv/include/asm/csr.h borrows from
> arch/riscv/include/asm/csr.h, and subsequent modifications
> related to CSR should maintain consistency.

Thanks for the patch.  A few comments:

> Fixes: 16b0bde9a37c ("RISC-V: KVM: Add perf sampling support for guests")
> Fixes: d1927f64e0e1 ("RISC-V: Fix the typo in Scountovf CSR name")

It seems like this is pushing the definition of "fixes" here.  It looks 
like the only thing wrong with those patches is that they didn't change 
the files under tools/. right?  It would have been nice if they had 
included the changes to files under tools/, but since the patches don't 
introduce any bugs directly, I don't think we should include these Fixes: 
lines here.

>
> Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>

Please, no blank line between the Fixes: headers and the Signed-off-by:.

I've removed the Fixes: lines and the superfluous blank line, and queued 
this for v6.18-rc fixes.


- Paul

On Sun, 16 Nov 2025 10:22:34 -0700, pjw@kernel.org:

> > The file tools/arch/riscv/include/asm/csr.h borrows from
> > arch/riscv/include/asm/csr.h, and subsequent modifications
> > related to CSR should maintain consistency.
> 
> Thanks for the patch.  A few comments:
> 
> > Fixes: 16b0bde9a37c ("RISC-V: KVM: Add perf sampling support for guests")
> > Fixes: d1927f64e0e1 ("RISC-V: Fix the typo in Scountovf CSR name")
> 
> It seems like this is pushing the definition of "fixes" here.  It looks 
> like the only thing wrong with those patches is that they didn't change 
> the files under tools/. right?  It would have been nice if they had 
> included the changes to files under tools/, but since the patches don't 
> introduce any bugs directly, I don't think we should include these Fixes: 
> lines here.
> 

Yes, that's true, thanks for reminding me.

> >
> > Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>
> 
> Please, no blank line between the Fixes: headers and the Signed-off-by:.
> 
> I've removed the Fixes: lines and the superfluous blank line, and queued 
> this for v6.18-rc fixes.
> 

Thank you for your help.

> 
> - Paul

Thanks,
Pei