On Thu, Nov 13, 2025 at 08:00:42PM +0200, Ilpo Järvinen wrote:
> pci.c has been used as catch everything that doesn't fits elsewhere
> within PCI core and thus resizable BAR code has been placed there as
> well. Move Resizable BAR related code to a newly introduced rebar.c to
> reduce size of pci.c. After move, there are no pci_rebar_*() calls from
> pci.c indicating this is indeed well-defined subset of PCI core.
>
> Endpoint drivers perform Resizable BAR related operations which could
> well be performed by PCI core to simplify driver-side code. This
> series adds a few new API functions to that effect and converts the
> drivers to use the new APIs (in separate patches).
>
> While at it, also convert BAR sizes bitmask to u64 as PCIe spec already
> specifies more sizes than what will fit u32 to make the API typing more
> future-proof. The extra sizes beyond 128TB are not added at this point.
>
> Some parts of this are to be used by the resizable BAR changes into the
> resource fitting/assingment logic but these seem to stand on their own
> so sending these out now to reduce the size of the other patch series.
>
> This v4 rebases what's currently in pci/rebar on top of the BAR resize
> changes in pci/resource as they'd have nasty conflicts otherwise so
> they can start to peacefully coexist in the pci/resource branch.
>
> v4:
> - Rebased on top of pci/resource changes to solve conflicts
>
> v3: https://lore.kernel.org/linux-pci/20251022133331.4357-1-ilpo.jarvinen@linux.intel.com/
> - Rebased to solve minor conflicts
>
> v2: https://lore.kernel.org/linux-pci/20250915091358.9203-1-ilpo.jarvinen@linux.intel.com/
> - Kerneldoc:
> - Improve formatting of errno returns
> - Open "ctrl" -> "control"
> - Removed mislead "bit" words (when referring to BAR size)
> - Rewrote pci_rebar_get_possible_sizes() kernel doc to not claim the
> returned bitmask is defined in PCIe spec as the capability bits now
> span across two registers in the spec and are not continuous (we
> don't support the second block of bits yet, but this API is expected
> to return the bits without the hole so it will not be matching with
> the spec layout).
> - Dropped superfluous zero check from pci_rebar_size_supported()
> - Small improvement to changelog of patch 7
>
> Ilpo Järvinen (11):
> PCI: Move Resizable BAR code to rebar.c
> PCI: Clean up pci_rebar_bytes_to_size() and move to rebar.c
> PCI: Move pci_rebar_size_to_bytes() and export it
> PCI: Improve Resizable BAR functions kernel doc
> PCI: Add pci_rebar_size_supported() helper
> drm/i915/gt: Use pci_rebar_size_supported()
> drm/xe/vram: Use PCI rebar helpers in resize_vram_bar()
> PCI: Add pci_rebar_get_max_size()
> drm/xe/vram: Use pci_rebar_get_max_size()
> drm/amdgpu: Use pci_rebar_get_max_size()
> PCI: Convert BAR sizes bitmasks to u64
>
> Documentation/driver-api/pci/pci.rst | 3 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 +-
> drivers/gpu/drm/i915/gt/intel_region_lmem.c | 10 +-
> drivers/gpu/drm/xe/xe_vram.c | 32 +-
> drivers/pci/Makefile | 2 +-
> drivers/pci/iov.c | 10 +-
> drivers/pci/pci-sysfs.c | 2 +-
> drivers/pci/pci.c | 149 ---------
> drivers/pci/pci.h | 5 +-
> drivers/pci/rebar.c | 325 ++++++++++++++++++++
> drivers/pci/setup-res.c | 85 -----
> include/linux/pci.h | 15 +-
> 12 files changed, 361 insertions(+), 285 deletions(-)
> create mode 100644 drivers/pci/rebar.c
Applied on top of pci/resource, thanks!