The first four Google Tensor SoCs were offshoots of Samsung Exynos
SoCs and their device trees were organized under the "exynos/google"
directory. Starting with the Google Tensor G5 SoC in Pixel 10 phones,
Google Tensor SoCs are now of Google's own design. Add a location in
the tree to store these device tree files.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---
MAINTAINERS | 1 +
arch/arm64/Kconfig.platforms | 6 ++++++
arch/arm64/boot/dts/Makefile | 1 +
arch/arm64/boot/dts/google/Makefile | 1 +
4 files changed, 9 insertions(+)
create mode 100644 arch/arm64/boot/dts/google/Makefile
diff --git a/MAINTAINERS b/MAINTAINERS
index ddecf1ef3bed..f73a247ec61c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10606,6 +10606,7 @@ C: irc://irc.oftc.net/pixel6-kernel-dev
F: Documentation/devicetree/bindings/clock/google,gs101-clock.yaml
F: Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml
F: arch/arm64/boot/dts/exynos/google/
+F: arch/arm64/boot/dts/google/
F: drivers/clk/samsung/clk-gs101.c
F: drivers/phy/samsung/phy-gs101-ufs.c
F: include/dt-bindings/clock/google,gs101.h
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 13173795c43d..044af9a3b45f 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -138,6 +138,12 @@ config ARCH_EXYNOS
help
This enables support for ARMv8 based Samsung Exynos SoC family.
+config ARCH_GOOGLE
+ bool "Google-Designed SoC family"
+ help
+ This enables support for Google Tensor chips starting at the
+ Google Tensor G5.
+
config ARCH_K3
bool "Texas Instruments Inc. K3 multicore SoC architecture"
select SOC_TI
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index b0844404eda1..b4b5023d61d2 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -17,6 +17,7 @@ subdir-y += cavium
subdir-y += cix
subdir-y += exynos
subdir-y += freescale
+subdir-y += google
subdir-y += hisilicon
subdir-y += intel
subdir-y += lg
diff --git a/arch/arm64/boot/dts/google/Makefile b/arch/arm64/boot/dts/google/Makefile
new file mode 100644
index 000000000000..a6b187e2d631
--- /dev/null
+++ b/arch/arm64/boot/dts/google/Makefile
@@ -0,0 +1 @@
+# SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
--
2.51.2.1041.gc1ab5b90ca-goog
On 11/11/2025 20:22, Douglas Anderson wrote: > The first four Google Tensor SoCs were offshoots of Samsung Exynos > SoCs and their device trees were organized under the "exynos/google" > directory. Starting with the Google Tensor G5 SoC in Pixel 10 phones, > Google Tensor SoCs are now of Google's own design. Add a location in > the tree to store these device tree files. > > Signed-off-by: Douglas Anderson <dianders@chromium.org> > --- > > MAINTAINERS | 1 + > arch/arm64/Kconfig.platforms | 6 ++++++ > arch/arm64/boot/dts/Makefile | 1 + > arch/arm64/boot/dts/google/Makefile | 1 + > 4 files changed, 9 insertions(+) > create mode 100644 arch/arm64/boot/dts/google/Makefile > > diff --git a/MAINTAINERS b/MAINTAINERS > index ddecf1ef3bed..f73a247ec61c 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -10606,6 +10606,7 @@ C: irc://irc.oftc.net/pixel6-kernel-dev > F: Documentation/devicetree/bindings/clock/google,gs101-clock.yaml > F: Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml > F: arch/arm64/boot/dts/exynos/google/ > +F: arch/arm64/boot/dts/google/ > F: drivers/clk/samsung/clk-gs101.c > F: drivers/phy/samsung/phy-gs101-ufs.c > F: include/dt-bindings/clock/google,gs101.h I am fine with this but also please consider having separate maintainers entry, because, as you said, this is a completely different SoC. In any case, up to you folks. > diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms > index 13173795c43d..044af9a3b45f 100644 > --- a/arch/arm64/Kconfig.platforms > +++ b/arch/arm64/Kconfig.platforms > @@ -138,6 +138,12 @@ config ARCH_EXYNOS > help > This enables support for ARMv8 based Samsung Exynos SoC family. > > +config ARCH_GOOGLE > + bool "Google-Designed SoC family" > + help > + This enables support for Google Tensor chips starting at the > + Google Tensor G5. > + > config ARCH_K3 > bool "Texas Instruments Inc. K3 multicore SoC architecture" > select SOC_TI > diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile > index b0844404eda1..b4b5023d61d2 100644 > --- a/arch/arm64/boot/dts/Makefile > +++ b/arch/arm64/boot/dts/Makefile > @@ -17,6 +17,7 @@ subdir-y += cavium > subdir-y += cix > subdir-y += exynos > subdir-y += freescale > +subdir-y += google > subdir-y += hisilicon > subdir-y += intel > subdir-y += lg > diff --git a/arch/arm64/boot/dts/google/Makefile b/arch/arm64/boot/dts/google/Makefile > new file mode 100644 > index 000000000000..a6b187e2d631 > --- /dev/null > +++ b/arch/arm64/boot/dts/google/Makefile > @@ -0,0 +1 @@ > +# SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) Drop the '+' in GPL license. Best regards, Krzysztof
Hi Krzysztof & Doug, On Wed, 12 Nov 2025 at 08:10, Krzysztof Kozlowski <krzk@kernel.org> wrote: > > On 11/11/2025 20:22, Douglas Anderson wrote: > > The first four Google Tensor SoCs were offshoots of Samsung Exynos > > SoCs and their device trees were organized under the "exynos/google" > > directory. Starting with the Google Tensor G5 SoC in Pixel 10 phones, > > Google Tensor SoCs are now of Google's own design. Add a location in > > the tree to store these device tree files. > > > > Signed-off-by: Douglas Anderson <dianders@chromium.org> > > --- > > > > MAINTAINERS | 1 + > > arch/arm64/Kconfig.platforms | 6 ++++++ > > arch/arm64/boot/dts/Makefile | 1 + > > arch/arm64/boot/dts/google/Makefile | 1 + > > 4 files changed, 9 insertions(+) > > create mode 100644 arch/arm64/boot/dts/google/Makefile > > > > diff --git a/MAINTAINERS b/MAINTAINERS > > index ddecf1ef3bed..f73a247ec61c 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -10606,6 +10606,7 @@ C: irc://irc.oftc.net/pixel6-kernel-dev > > F: Documentation/devicetree/bindings/clock/google,gs101-clock.yaml > > F: Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml > > F: arch/arm64/boot/dts/exynos/google/ > > +F: arch/arm64/boot/dts/google/ > > F: drivers/clk/samsung/clk-gs101.c > > F: drivers/phy/samsung/phy-gs101-ufs.c > > F: include/dt-bindings/clock/google,gs101.h > > > I am fine with this but also please consider having separate maintainers > entry, because, as you said, this is a completely different SoC. > > In any case, up to you folks. Doug did reach out to me prior to posting. We are OK having it here (happy to help with Laguna). Most of the exynos specific SoC drivers are under ARM/SAMSUNG entry anyway. There will be some Laguna SoC drivers for pinctrl, clocks etc, but many of the IPs are designware so likely to have existing entries (uart, i2c, spi, i3c, usb etc). > > > diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms > > index 13173795c43d..044af9a3b45f 100644 > > --- a/arch/arm64/Kconfig.platforms > > +++ b/arch/arm64/Kconfig.platforms > > @@ -138,6 +138,12 @@ config ARCH_EXYNOS > > help > > This enables support for ARMv8 based Samsung Exynos SoC family. > > > > +config ARCH_GOOGLE > > + bool "Google-Designed SoC family" > > + help > > + This enables support for Google Tensor chips starting at the > > + Google Tensor G5. It might be worth adding (Laguna) here With that addressed: Reviewed-by: Peter Griffin <peter.griffin@linaro.org> regards, Peter
On Wed, Nov 12, 2025 at 1:26 PM Peter Griffin <peter.griffin@linaro.org> wrote: > There will be some Laguna SoC > drivers for pinctrl, clocks etc, Oh new pin control, interesting! Will you be doing the upstreaming of that? Yours, Linus Walleij
Hi Linus, On Wed, 12 Nov 2025 at 12:36, Linus Walleij <linus.walleij@linaro.org> wrote: > > On Wed, Nov 12, 2025 at 1:26 PM Peter Griffin <peter.griffin@linaro.org> wrote: > > > There will be some Laguna SoC > > drivers for pinctrl, clocks etc, > > Oh new pin control, interesting! > > Will you be doing the upstreaming of that? It will most likely be Doug, not sure if he's started looking at that yet though. Peter
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