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Tue, 11 Nov 2025 11:26:45 -0800 (PST) Received: from dianders.sjc.corp.google.com ([2a00:79e0:2e7c:8:ba9f:d4c6:9323:4864]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2984dcd0974sm4861075ad.90.2025.11.11.11.26.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Nov 2025 11:26:43 -0800 (PST) From: Douglas Anderson To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Griffin , =?UTF-8?q?Andr=C3=A9=20Draszik?= , Tudor Ambarus Cc: linux-samsung-soc@vger.kernel.org, Roy Luo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Chen-Yu Tsai , Julius Werner , William McVicker , Douglas Anderson , Alexandre Belloni , Arnd Bergmann , Catalin Marinas , Drew Fustini , Krzysztof Kozlowski , Linus Walleij , Will Deacon , linux-kernel@vger.kernel.org, soc@lists.linux.dev Subject: [PATCH 3/4] arm64: dts: google: Add dts directory for Google-designed silicon Date: Tue, 11 Nov 2025 11:22:06 -0800 Message-ID: <20251111112158.3.I35b9e835ac49ab408e5ca3e0983930a1f1395814@changeid> X-Mailer: git-send-email 2.51.2.1041.gc1ab5b90ca-goog In-Reply-To: <20251111192422.4180216-1-dianders@chromium.org> References: <20251111192422.4180216-1-dianders@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The first four Google Tensor SoCs were offshoots of Samsung Exynos SoCs and their device trees were organized under the "exynos/google" directory. Starting with the Google Tensor G5 SoC in Pixel 10 phones, Google Tensor SoCs are now of Google's own design. Add a location in the tree to store these device tree files. Signed-off-by: Douglas Anderson Reviewed-by: Peter Griffin --- MAINTAINERS | 1 + arch/arm64/Kconfig.platforms | 6 ++++++ arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/google/Makefile | 1 + 4 files changed, 9 insertions(+) create mode 100644 arch/arm64/boot/dts/google/Makefile diff --git a/MAINTAINERS b/MAINTAINERS index ddecf1ef3bed..f73a247ec61c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10606,6 +10606,7 @@ C: irc://irc.oftc.net/pixel6-kernel-dev F: Documentation/devicetree/bindings/clock/google,gs101-clock.yaml F: Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.= yaml F: arch/arm64/boot/dts/exynos/google/ +F: arch/arm64/boot/dts/google/ F: drivers/clk/samsung/clk-gs101.c F: drivers/phy/samsung/phy-gs101-ufs.c F: include/dt-bindings/clock/google,gs101.h diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 13173795c43d..044af9a3b45f 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -138,6 +138,12 @@ config ARCH_EXYNOS help This enables support for ARMv8 based Samsung Exynos SoC family. =20 +config ARCH_GOOGLE + bool "Google-Designed SoC family" + help + This enables support for Google Tensor chips starting at the + Google Tensor G5. + config ARCH_K3 bool "Texas Instruments Inc. K3 multicore SoC architecture" select SOC_TI diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index b0844404eda1..b4b5023d61d2 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -17,6 +17,7 @@ subdir-y +=3D cavium subdir-y +=3D cix subdir-y +=3D exynos subdir-y +=3D freescale +subdir-y +=3D google subdir-y +=3D hisilicon subdir-y +=3D intel subdir-y +=3D lg diff --git a/arch/arm64/boot/dts/google/Makefile b/arch/arm64/boot/dts/goog= le/Makefile new file mode 100644 index 000000000000..a6b187e2d631 --- /dev/null +++ b/arch/arm64/boot/dts/google/Makefile @@ -0,0 +1 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) --=20 2.51.2.1041.gc1ab5b90ca-goog