dt-bindings: spi: Convert nuvoton,npcm-pspi to DT schema

[PATCH v1] dt-bindings: spi: Convert nuvoton,npcm-pspi to DT schema

Posted by Tomer Maimon 1 month, 1 week ago

Convert the Nuvoton NPCM PSPI binding to DT schema format.
Remove the clock-name property since it is not used.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
---
 .../bindings/spi/nuvoton,npcm-pspi.txt        | 36 ----------
 .../bindings/spi/nuvoton,npcm-pspi.yaml       | 65 +++++++++++++++++++
 2 files changed, 65 insertions(+), 36 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt
 create mode 100644 Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.yaml

diff --git a/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt b/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt
deleted file mode 100644
index a4e72e52af59..000000000000
--- a/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt
+++ /dev/null
@@ -1,36 +0,0 @@
-Nuvoton NPCM Peripheral Serial Peripheral Interface(PSPI) controller driver
-
-Nuvoton NPCM7xx SOC support two PSPI channels.
-
-Required properties:
- - compatible : "nuvoton,npcm750-pspi" for Poleg NPCM7XX.
-				"nuvoton,npcm845-pspi" for Arbel NPCM8XX.
- - #address-cells : should be 1. see spi-bus.txt
- - #size-cells : should be 0. see spi-bus.txt
- - specifies physical base address and size of the register.
- - interrupts : contain PSPI interrupt.
- - clocks : phandle of PSPI reference clock.
- - clock-names: Should be "clk_apb5".
- - pinctrl-names : a pinctrl state named "default" must be defined.
- - pinctrl-0 : phandle referencing pin configuration of the device.
- - resets : phandle to the reset control for this device.
- - cs-gpios: Specifies the gpio pins to be used for chipselects.
-            See: Documentation/devicetree/bindings/spi/spi-bus.txt
-
-Optional properties:
-- clock-frequency : Input clock frequency to the PSPI block in Hz.
-		    Default is 25000000 Hz.
-
-spi0: spi@f0200000 {
-	compatible = "nuvoton,npcm750-pspi";
-	reg = <0xf0200000 0x1000>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pspi1_pins>;
-	#address-cells = <1>;
-	#size-cells = <0>;
-	interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
-	clocks = <&clk NPCM7XX_CLK_APB5>;
-	clock-names = "clk_apb5";
-	resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>
-	cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
-};
diff --git a/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.yaml b/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.yaml
new file mode 100644
index 000000000000..65ad40292408
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.yaml
@@ -0,0 +1,65 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/nuvoton,npcm-pspi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton NPCM Peripheral SPI (PSPI) Controller
+
+maintainers:
+  - Tomer Maimon <tmaimon77@gmail.com>
+
+allOf:
+  - $ref: spi-controller.yaml#
+
+description:
+  Nuvoton NPCM Peripheral Serial Peripheral Interface (PSPI) controller.
+  Nuvoton NPCM7xx SOC supports two PSPI channels.
+
+properties:
+  compatible:
+    enum:
+      - nuvoton,npcm750-pspi # Poleg NPCM7XX
+      - nuvoton,npcm845-pspi # Arbel NPCM8XX
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+    description: PSPI reference clock.
+
+  resets:
+    maxItems: 1
+    description: PSPI module reset.
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - resets
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
+    spi0: spi@f0200000 {
+        compatible = "nuvoton,npcm750-pspi";
+        reg = <0xf0200000 0x1000>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pspi1_pins>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&clk NPCM7XX_CLK_APB5>;
+        resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>;
+        cs-gpios = <&gpio6 11 0x1>;
+    };
+
-- 
2.34.1

Re: [PATCH v1] dt-bindings: spi: Convert nuvoton,npcm-pspi to DT schema

Posted by Krzysztof Kozlowski 1 month, 1 week ago

On Mon, Nov 10, 2025 at 10:14:57AM +0200, Tomer Maimon wrote:
> Convert the Nuvoton NPCM PSPI binding to DT schema format.
> Remove the clock-name property since it is not used.

clock-name or clock-names? I clearly see the clock-names used in DTS, so
your commit msg is not correct.

Please use subject prefixes matching the subsystem. You can get them for
example with 'git log --oneline -- DIRECTORY_OR_FILE' on the directory
your patch is touching. For bindings, the preferred subjects are
explained here:
https://www.kernel.org/doc/html/latest/devicetree/bindings/submitting-patches.html#i-for-patch-submitters

> 
> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
> ---
>  .../bindings/spi/nuvoton,npcm-pspi.txt        | 36 ----------
>  .../bindings/spi/nuvoton,npcm-pspi.yaml       | 65 +++++++++++++++++++
>  2 files changed, 65 insertions(+), 36 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt
>  create mode 100644 Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.yaml
> 
> diff --git a/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt b/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt
> deleted file mode 100644
> index a4e72e52af59..000000000000
> --- a/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt
> +++ /dev/null
> @@ -1,36 +0,0 @@
> -Nuvoton NPCM Peripheral Serial Peripheral Interface(PSPI) controller driver
> -
> -Nuvoton NPCM7xx SOC support two PSPI channels.
> -
> -Required properties:
> - - compatible : "nuvoton,npcm750-pspi" for Poleg NPCM7XX.
> -				"nuvoton,npcm845-pspi" for Arbel NPCM8XX.
> - - #address-cells : should be 1. see spi-bus.txt
> - - #size-cells : should be 0. see spi-bus.txt
> - - specifies physical base address and size of the register.
> - - interrupts : contain PSPI interrupt.
> - - clocks : phandle of PSPI reference clock.
> - - clock-names: Should be "clk_apb5".
> - - pinctrl-names : a pinctrl state named "default" must be defined.
> - - pinctrl-0 : phandle referencing pin configuration of the device.
> - - resets : phandle to the reset control for this device.
> - - cs-gpios: Specifies the gpio pins to be used for chipselects.
> -            See: Documentation/devicetree/bindings/spi/spi-bus.txt
> -
> -Optional properties:
> -- clock-frequency : Input clock frequency to the PSPI block in Hz.
> -		    Default is 25000000 Hz.

You dropped this property. Every change done in the conversion needs to
be documented in the commit msg with explanation WHY.

> -
> -spi0: spi@f0200000 {
> -	compatible = "nuvoton,npcm750-pspi";
> -	reg = <0xf0200000 0x1000>;
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&pspi1_pins>;
> -	#address-cells = <1>;
> -	#size-cells = <0>;
> -	interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> -	clocks = <&clk NPCM7XX_CLK_APB5>;
> -	clock-names = "clk_apb5";
> -	resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>
> -	cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
> -};
> diff --git a/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.yaml b/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.yaml
> new file mode 100644
> index 000000000000..65ad40292408
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.yaml
> @@ -0,0 +1,65 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/nuvoton,npcm-pspi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nuvoton NPCM Peripheral SPI (PSPI) Controller
> +
> +maintainers:
> +  - Tomer Maimon <tmaimon77@gmail.com>
> +
> +allOf:
> +  - $ref: spi-controller.yaml#
> +
> +description:
> +  Nuvoton NPCM Peripheral Serial Peripheral Interface (PSPI) controller.
> +  Nuvoton NPCM7xx SOC supports two PSPI channels.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - nuvoton,npcm750-pspi # Poleg NPCM7XX
> +      - nuvoton,npcm845-pspi # Arbel NPCM8XX
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +    description: PSPI reference clock.
> +
> +  resets:
> +    maxItems: 1
> +    description: PSPI module reset.

Drop description.

> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +  - resets
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
> +    spi0: spi@f0200000 {
> +        compatible = "nuvoton,npcm750-pspi";
> +        reg = <0xf0200000 0x1000>;
> +        pinctrl-names = "default";
> +        pinctrl-0 = <&pspi1_pins>;
> +        #address-cells = <1>;
> +        #size-cells = <0>;
> +        interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> +        clocks = <&clk NPCM7XX_CLK_APB5>;
> +        resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>;
> +        cs-gpios = <&gpio6 11 0x1>;

Use proper GPIO defines for flags.

Best regards,
Krzysztof