[PATCH v2 1/6] spi: dt-bindings: Add spi-data-buses property

David Lechner posted 6 patches 3 months ago
[PATCH v2 1/6] spi: dt-bindings: Add spi-data-buses property
Posted by David Lechner 3 months ago
Add a spi-data-buses property to the spi-peripheral-props binding to
allow specifying the SPI data bus or buses that a peripheral is
connected to in cases where the SPI controller has more than one
physical SPI data bus.

Signed-off-by: David Lechner <dlechner@baylibre.com>
---

v2 changes:
* Renamed property from spi-buses to spi-data-buses to make it clear
  that we are only talking about the SDI/SDO lines and not the entire
  SPI bus (SCK, CS, etc).
* Fixed prefix order in subject.

This patch has been seen before in a different series from Sean [1].

[1]: https://lore.kernel.org/linux-spi/20250616220054.3968946-2-sean.anderson@linux.dev/

Changes:
* Added maxItems. (8 is the most I've seen so far on an ADC)
* Tweaked the description a bit.
---
 .../devicetree/bindings/spi/spi-peripheral-props.yaml        | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
index 8b6e8fc009dbdc80978f3afef84ddc688ade4348..6fe739eaf09876b9c5d8902f792ca02181d7266f 100644
--- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
@@ -89,6 +89,18 @@ properties:
     description:
       Delay, in microseconds, after a write transfer.
 
+  spi-data-buses:
+    description:
+      Array of data bus numbers that describes which SPI data buses of the
+      controller are connected to the peripheral. This only applies to
+      peripherals connected to specialized SPI controllers that have multiple
+      SPI data buses (a set of independent SDI/SDO lines each with its own
+      serializer) on a single controller.
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    minItems: 1
+    maxItems: 8
+    default: [0]
+
   stacked-memories:
     description: Several SPI memories can be wired in stacked mode.
       This basically means that either a device features several chip

-- 
2.43.0
Re: [PATCH v2 1/6] spi: dt-bindings: Add spi-data-buses property
Posted by Rob Herring 2 months, 3 weeks ago
On Fri, Nov 07, 2025 at 02:52:47PM -0600, David Lechner wrote:
> Add a spi-data-buses property to the spi-peripheral-props binding to
> allow specifying the SPI data bus or buses that a peripheral is
> connected to in cases where the SPI controller has more than one
> physical SPI data bus.
> 
> Signed-off-by: David Lechner <dlechner@baylibre.com>
> ---
> 
> v2 changes:
> * Renamed property from spi-buses to spi-data-buses to make it clear
>   that we are only talking about the SDI/SDO lines and not the entire
>   SPI bus (SCK, CS, etc).
> * Fixed prefix order in subject.
> 
> This patch has been seen before in a different series from Sean [1].
> 
> [1]: https://lore.kernel.org/linux-spi/20250616220054.3968946-2-sean.anderson@linux.dev/
> 
> Changes:
> * Added maxItems. (8 is the most I've seen so far on an ADC)
> * Tweaked the description a bit.
> ---
>  .../devicetree/bindings/spi/spi-peripheral-props.yaml        | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
> index 8b6e8fc009dbdc80978f3afef84ddc688ade4348..6fe739eaf09876b9c5d8902f792ca02181d7266f 100644
> --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
> +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
> @@ -89,6 +89,18 @@ properties:
>      description:
>        Delay, in microseconds, after a write transfer.
>  
> +  spi-data-buses:

I think spi-data-map would be better.

Or we could just reuse 'data-lanes' property. It seems like the same 
problem of mapping peripheral lanes/lines to controller/host 
lanes/lines.

> +    description:
> +      Array of data bus numbers that describes which SPI data buses of the
> +      controller are connected to the peripheral. This only applies to
> +      peripherals connected to specialized SPI controllers that have multiple
> +      SPI data buses (a set of independent SDI/SDO lines each with its own
> +      serializer) on a single controller.

Please make it clear what's the index and what's the value: "The index 
corresponds to the peripheral data line and the value corresponds to the 
controller data line."

> +    $ref: /schemas/types.yaml#/definitions/uint32-array
> +    minItems: 1
> +    maxItems: 8
> +    default: [0]
> +
>    stacked-memories:
>      description: Several SPI memories can be wired in stacked mode.
>        This basically means that either a device features several chip
> 
> -- 
> 2.43.0
>