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Fri, 07 Nov 2025 12:53:43 -0800 (PST) From: David Lechner Date: Fri, 07 Nov 2025 14:52:47 -0600 Subject: [PATCH v2 1/6] spi: dt-bindings: Add spi-data-buses property Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251107-spi-add-multi-bus-support-v2-1-8a92693314d9@baylibre.com> References: <20251107-spi-add-multi-bus-support-v2-0-8a92693314d9@baylibre.com> In-Reply-To: <20251107-spi-add-multi-bus-support-v2-0-8a92693314d9@baylibre.com> To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marcelo Schmitt , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Jonathan Cameron , Andy Shevchenko Cc: Sean Anderson , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, David Lechner X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2076; i=dlechner@baylibre.com; h=from:subject:message-id; bh=GzDNbyMI4KydFDgGfy/VeBjUSngx+JmJMBw+foU/HUU=; b=owEBbQGS/pANAwAKAcLMIAH/AY/AAcsmYgBpDlwtAwtlV0VQGNVIxEBaAxjKPBXvLbMxZAb/W qByJpooBjKJATMEAAEKAB0WIQTsGNmeYg6D1pzYaJjCzCAB/wGPwAUCaQ5cLQAKCRDCzCAB/wGP wJTrB/9LuHD+FF8YuGEQ8ift3smVYnehTtkxIxJlPmGPlglTjsW/tP2kiiJ0j6dET2OY+l9YVMg xtWPfOKrH6DXK72pckNTdt7YIp5y/+1UuiTrZ5yiPeyC4jkov6+jzNeZToP8AevMq5pnxLEid6U 7juw0TfIaw3Htg4FSkal4pt8/DhjkbLSJv4dPxyBFLym1R5Tjoki6xPx/oiFbWEgThNhlTUIOHK cPBHEFumqpqrHrnz7H7gjaT3tVc/YYOVfH6CaKXgIFYUH/cLnvt7f/J6ngV+tGl8myJhEeb4mUV AkpNNAqavMCLXweLYq+dGaXsyTPFXR6jmPK8BKYurywRRS6/ X-Developer-Key: i=dlechner@baylibre.com; a=openpgp; fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03 Add a spi-data-buses property to the spi-peripheral-props binding to allow specifying the SPI data bus or buses that a peripheral is connected to in cases where the SPI controller has more than one physical SPI data bus. Signed-off-by: David Lechner --- v2 changes: * Renamed property from spi-buses to spi-data-buses to make it clear that we are only talking about the SDI/SDO lines and not the entire SPI bus (SCK, CS, etc). * Fixed prefix order in subject. This patch has been seen before in a different series from Sean [1]. [1]: https://lore.kernel.org/linux-spi/20250616220054.3968946-2-sean.anders= on@linux.dev/ Changes: * Added maxItems. (8 is the most I've seen so far on an ADC) * Tweaked the description a bit. --- .../devicetree/bindings/spi/spi-peripheral-props.yaml | 12 ++++++++= ++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yam= l b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml index 8b6e8fc009dbdc80978f3afef84ddc688ade4348..6fe739eaf09876b9c5d8902f792= ca02181d7266f 100644 --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml @@ -89,6 +89,18 @@ properties: description: Delay, in microseconds, after a write transfer. =20 + spi-data-buses: + description: + Array of data bus numbers that describes which SPI data buses of the + controller are connected to the peripheral. This only applies to + peripherals connected to specialized SPI controllers that have multi= ple + SPI data buses (a set of independent SDI/SDO lines each with its own + serializer) on a single controller. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 8 + default: [0] + stacked-memories: description: Several SPI memories can be wired in stacked mode. This basically means that either a device features several chip --=20 2.43.0