Add RZ/G3E RSCI support for FIFO and non-FIFO mode. RSCI IP found on
RZ/G3E SoC is similar to one on RZ/T2H, but has 32-stage fifo. RZ/G3E has
5 module clocks compared to 2 on RZ/T2H, and it has multiple resets.
Add support for hardware flow control.

Biju Das (19):
  clk: renesas: r9a09g047: Add RSCI clocks/resets
  dt-bindings: serial: rsci: Drop "uart-has-rtscts: false"
  dt-bindings: serial: renesas,rsci: Document RZ/G3E support
  serial: sh-sci: Fix deadlock during RSCI FIFO overrun error
  serial: rsci: Drop rsci_clear_CFC()
  serial: sh-sci: Drop extra line
  serial: rsci: Drop unused macro DCR
  serial: rsci: Drop unused TDR register
  serial: sh-sci: Use devm_reset_control_array_get_exclusive()
  serial: sh-sci: Add RSCI_PORT_{SCI,SCIF} port IDs
  serial: sh-sci: Add sci_is_rsci_type()
  serial: sh-sci: Add support for RZ/G3E RSCI clks
  serial: sh-sci: Make sci_scbrr_calc() public
  serial: sh-sci: Add finish_console_write() callback
  serial: sh-sci: Add support for RZ/G3E RSCI SCIF
  serial: sh-sci: Add support for RZ/G3E RSCI SCI
  arm64: dts: renesas: r9a09g047: Add RSCI nodes
  arm64: dts: renesas: renesas-smarc2: Move aliases to board DTS
  arm64: dts: renesas: renesas-smarc2: Enable rsci{2,4,9} nodes

 .../bindings/serial/renesas,rsci.yaml         |  84 +++-
 arch/arm64/boot/dts/renesas/r9a09g047.dtsi    | 190 ++++++++
 .../boot/dts/renesas/r9a09g047e57-smarc.dts   |  46 ++
 .../boot/dts/renesas/renesas-smarc2.dtsi      |  18 +-
 drivers/clk/renesas/r9a09g047-cpg.c           | 126 ++++++
 drivers/tty/serial/rsci.c                     | 413 +++++++++++++++---
 drivers/tty/serial/rsci.h                     |   2 +
 drivers/tty/serial/sh-sci-common.h            |  10 +
 drivers/tty/serial/sh-sci.c                   |  65 ++-
 9 files changed, 869 insertions(+), 85 deletions(-)

-- 
2.43.0

On Mon, Oct 27, 2025 at 03:45:47PM +0000, Biju Das wrote:
> Add RZ/G3E RSCI support for FIFO and non-FIFO mode. RSCI IP found on
> RZ/G3E SoC is similar to one on RZ/T2H, but has 32-stage fifo. RZ/G3E has
> 5 module clocks compared to 2 on RZ/T2H, and it has multiple resets.
> Add support for hardware flow control.
> 
> Biju Das (19):
>   clk: renesas: r9a09g047: Add RSCI clocks/resets

Why is a clk patch part of a serial series?  How are we supposed to
merge this thing?

thanks,

greg k-h