From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 51B3030CDA4; Mon, 27 Oct 2025 15:46:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761579994; cv=none; b=LLiP4OOtkwhjOZL46pwhEABIpqT2pB2i4zGWyIX0TG46ZPdpu5S0JDtcIHryvF5E+fjSlQM6MlMZvwwZE431QQXxrmHRXbb4nctbNFKHKESWx7SsjWomVtVXxiyFQCmmBTeSe2gyyc1dd1hR8OJl6aq/l5llM6xOuJURFkf4nZo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761579994; c=relaxed/simple; bh=OgYwp+4Of+GnzM9iKojiEuv3CK3wd1DkCdWSWjoRKVg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ehjhVIgqp2Hhb5kYpSlhyoK7tP+OUWi5RyebsJxa2DUz1Cx5ihmgCIMMZBetcMFQPK+p5QU85TzeuETVciR2mnSe2mVy8rtjToCDI834DMYpDlh3G3iPmuvGOzDPvGZHLww6Vifan1byHCLmMGzQ77LPkfGmKziwSq0u/2ZX1Jc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: irhTME7/SUuKH1gXI4bQ1w== X-CSE-MsgGUID: soVT05rAThO0UrNG9xdhPA== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 28 Oct 2025 00:46:25 +0900 Received: from localhost.localdomain (unknown [10.226.93.103]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 05AF64003EA1; Tue, 28 Oct 2025 00:46:22 +0900 (JST) From: Biju Das To: Geert Uytterhoeven , Michael Turquette , Stephen Boyd Cc: Biju Das , linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das Subject: [PATCH 01/19] clk: renesas: r9a09g047: Add RSCI clocks/resets Date: Mon, 27 Oct 2025 15:45:48 +0000 Message-ID: <20251027154615.115759-2-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add RSCI clock and reset entries. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- drivers/clk/renesas/r9a09g047-cpg.c | 126 ++++++++++++++++++++++++++++ 1 file changed, 126 insertions(+) diff --git a/drivers/clk/renesas/r9a09g047-cpg.c b/drivers/clk/renesas/r9a0= 9g047-cpg.c index 68f8b08bd16f..feb49caa9257 100644 --- a/drivers/clk/renesas/r9a09g047-cpg.c +++ b/drivers/clk/renesas/r9a09g047-cpg.c @@ -44,6 +44,9 @@ enum clk_ids { CLK_PLLCLN_DIV8, CLK_PLLCLN_DIV16, CLK_PLLCLN_DIV20, + CLK_PLLCLN_DIV64, + CLK_PLLCLN_DIV256, + CLK_PLLCLN_DIV1024, CLK_PLLDTY_ACPU, CLK_PLLDTY_ACPU_DIV2, CLK_PLLDTY_ACPU_DIV4, @@ -142,6 +145,9 @@ static const struct cpg_core_clk r9a09g047_core_clks[] = __initconst =3D { DEF_FIXED(".pllcln_div8", CLK_PLLCLN_DIV8, CLK_PLLCLN, 1, 8), DEF_FIXED(".pllcln_div16", CLK_PLLCLN_DIV16, CLK_PLLCLN, 1, 16), DEF_FIXED(".pllcln_div20", CLK_PLLCLN_DIV20, CLK_PLLCLN, 1, 20), + DEF_FIXED(".pllcln_div64", CLK_PLLCLN_DIV64, CLK_PLLCLN, 1, 64), + DEF_FIXED(".pllcln_div256", CLK_PLLCLN_DIV256, CLK_PLLCLN, 1, 256), + DEF_FIXED(".pllcln_div1024", CLK_PLLCLN_DIV1024, CLK_PLLCLN, 1, 1024), =20 DEF_DDIV(".plldty_acpu", CLK_PLLDTY_ACPU, CLK_PLLDTY, CDDIV0_DIVCTL2, dta= ble_2_64), DEF_FIXED(".plldty_acpu_div2", CLK_PLLDTY_ACPU_DIV2, CLK_PLLDTY_ACPU, 1, = 2), @@ -218,6 +224,106 @@ static const struct rzv2h_mod_clk r9a09g047_mod_clks[= ] __initconst =3D { BUS_MSTOP(5, BIT(13))), DEF_MOD("wdt_3_clk_loco", CLK_QEXTAL, 5, 2, 2, 18, BUS_MSTOP(5, BIT(13))), + DEF_MOD("rsci0_pclk", CLK_PLLCM33_DIV16, 5, 13, 2, 29, + BUS_MSTOP(11, BIT(3))), + DEF_MOD("rsci0_tclk", CLK_PLLCM33_DIV16, 5, 14, 2, 30, + BUS_MSTOP(11, BIT(3))), + DEF_MOD("rsci0_ps_ps3_n", CLK_PLLCLN_DIV1024, 5, 15, 2, 31, + BUS_MSTOP(11, BIT(3))), + DEF_MOD("rsci0_ps_ps2_n", CLK_PLLCLN_DIV256, 6, 0, 3, 0, + BUS_MSTOP(11, BIT(3))), + DEF_MOD("rsci0_ps_ps1_n", CLK_PLLCLN_DIV64, 6, 1, 3, 1, + BUS_MSTOP(11, BIT(3))), + DEF_MOD("rsci1_pclk", CLK_PLLCM33_DIV16, 6, 2, 3, 2, + BUS_MSTOP(11, BIT(4))), + DEF_MOD("rsci1_tclk", CLK_PLLCM33_DIV16, 6, 3, 3, 3, + BUS_MSTOP(11, BIT(4))), + DEF_MOD("rsci1_ps_ps3_n", CLK_PLLCLN_DIV1024, 6, 4, 3, 4, + BUS_MSTOP(11, BIT(4))), + DEF_MOD("rsci1_ps_ps2_n", CLK_PLLCLN_DIV256, 6, 5, 3, 5, + BUS_MSTOP(11, BIT(4))), + DEF_MOD("rsci1_ps_ps1_n", CLK_PLLCLN_DIV64, 6, 6, 3, 6, + BUS_MSTOP(11, BIT(4))), + DEF_MOD("rsci2_pclk", CLK_PLLCM33_DIV16, 6, 7, 3, 7, + BUS_MSTOP(11, BIT(5))), + DEF_MOD("rsci2_tclk", CLK_PLLCM33_DIV16, 6, 8, 3, 8, + BUS_MSTOP(11, BIT(5))), + DEF_MOD("rsci2_ps_ps3_n", CLK_PLLCLN_DIV1024, 6, 9, 3, 9, + BUS_MSTOP(11, BIT(5))), + DEF_MOD("rsci2_ps_ps2_n", CLK_PLLCLN_DIV256, 6, 10, 3, 10, + BUS_MSTOP(11, BIT(5))), + DEF_MOD("rsci2_ps_ps1_n", CLK_PLLCLN_DIV64, 6, 11, 3, 11, + BUS_MSTOP(11, BIT(5))), + DEF_MOD("rsci3_pclk", CLK_PLLCM33_DIV16, 6, 12, 3, 12, + BUS_MSTOP(11, BIT(6))), + DEF_MOD("rsci3_tclk", CLK_PLLCM33_DIV16, 6, 13, 3, 13, + BUS_MSTOP(11, BIT(6))), + DEF_MOD("rsci3_ps_ps3_n", CLK_PLLCLN_DIV1024, 6, 14, 3, 14, + BUS_MSTOP(11, BIT(6))), + DEF_MOD("rsci3_ps_ps2_n", CLK_PLLCLN_DIV256, 6, 15, 3, 15, + BUS_MSTOP(11, BIT(6))), + DEF_MOD("rsci3_ps_ps1_n", CLK_PLLCLN_DIV64, 7, 0, 3, 16, + BUS_MSTOP(11, BIT(6))), + DEF_MOD("rsci4_pclk", CLK_PLLCM33_DIV16, 7, 1, 3, 17, + BUS_MSTOP(11, BIT(7))), + DEF_MOD("rsci4_tclk", CLK_PLLCM33_DIV16, 7, 2, 3, 18, + BUS_MSTOP(11, BIT(7))), + DEF_MOD("rsci4_ps_ps3_n", CLK_PLLCLN_DIV1024, 7, 3, 3, 19, + BUS_MSTOP(11, BIT(7))), + DEF_MOD("rsci4_ps_ps2_n", CLK_PLLCLN_DIV256, 7, 4, 3, 20, + BUS_MSTOP(11, BIT(7))), + DEF_MOD("rsci4_ps_ps1_n", CLK_PLLCLN_DIV64, 7, 5, 3, 21, + BUS_MSTOP(11, BIT(7))), + DEF_MOD("rsci5_pclk", CLK_PLLCM33_DIV16, 7, 6, 3, 22, + BUS_MSTOP(11, BIT(8))), + DEF_MOD("rsci5_tclk", CLK_PLLCM33_DIV16, 7, 7, 3, 23, + BUS_MSTOP(11, BIT(8))), + DEF_MOD("rsci5_ps_ps3_n", CLK_PLLCLN_DIV1024, 7, 8, 3, 24, + BUS_MSTOP(11, BIT(8))), + DEF_MOD("rsci5_ps_ps2_n", CLK_PLLCLN_DIV256, 7, 9, 3, 25, + BUS_MSTOP(11, BIT(8))), + DEF_MOD("rsci5_ps_ps1_n", CLK_PLLCLN_DIV64, 7, 10, 3, 26, + BUS_MSTOP(11, BIT(8))), + DEF_MOD("rsci6_pclk", CLK_PLLCM33_DIV16, 7, 11, 3, 27, + BUS_MSTOP(11, BIT(9))), + DEF_MOD("rsci6_tclk", CLK_PLLCM33_DIV16, 7, 12, 3, 28, + BUS_MSTOP(11, BIT(9))), + DEF_MOD("rsci6_ps_ps3_n", CLK_PLLCLN_DIV1024, 7, 13, 3, 29, + BUS_MSTOP(11, BIT(9))), + DEF_MOD("rsci6_ps_ps2_n", CLK_PLLCLN_DIV256, 7, 14, 3, 30, + BUS_MSTOP(11, BIT(9))), + DEF_MOD("rsci6_ps_ps1_n", CLK_PLLCLN_DIV64, 7, 15, 3, 31, + BUS_MSTOP(11, BIT(9))), + DEF_MOD("rsci7_pclk", CLK_PLLCM33_DIV16, 8, 0, 4, 0, + BUS_MSTOP(11, BIT(10))), + DEF_MOD("rsci7_tclk", CLK_PLLCM33_DIV16, 8, 1, 4, 1, + BUS_MSTOP(11, BIT(10))), + DEF_MOD("rsci7_ps_ps3_n", CLK_PLLCLN_DIV1024, 8, 2, 4, 2, + BUS_MSTOP(11, BIT(10))), + DEF_MOD("rsci7_ps_ps2_n", CLK_PLLCLN_DIV256, 8, 3, 4, 3, + BUS_MSTOP(11, BIT(10))), + DEF_MOD("rsci7_ps_ps1_n", CLK_PLLCLN_DIV64, 8, 4, 4, 4, + BUS_MSTOP(11, BIT(10))), + DEF_MOD("rsci8_pclk", CLK_PLLCM33_DIV16, 8, 5, 4, 5, + BUS_MSTOP(11, BIT(11))), + DEF_MOD("rsci8_tclk", CLK_PLLCM33_DIV16, 8, 6, 4, 6, + BUS_MSTOP(11, BIT(11))), + DEF_MOD("rsci8_ps_ps3_n", CLK_PLLCLN_DIV1024, 8, 7, 4, 7, + BUS_MSTOP(11, BIT(11))), + DEF_MOD("rsci8_ps_ps2_n", CLK_PLLCLN_DIV256, 8, 8, 4, 8, + BUS_MSTOP(11, BIT(11))), + DEF_MOD("rsci8_ps_ps1_n", CLK_PLLCLN_DIV64, 8, 9, 4, 9, + BUS_MSTOP(11, BIT(11))), + DEF_MOD("rsci9_pclk", CLK_PLLCM33_DIV16, 8, 10, 4, 10, + BUS_MSTOP(11, BIT(12))), + DEF_MOD("rsci9_tclk", CLK_PLLCM33_DIV16, 8, 11, 4, 11, + BUS_MSTOP(11, BIT(12))), + DEF_MOD("rsci9_ps_ps3_n", CLK_PLLCLN_DIV1024, 8, 12, 4, 12, + BUS_MSTOP(11, BIT(12))), + DEF_MOD("rsci9_ps_ps2_n", CLK_PLLCLN_DIV256, 8, 13, 4, 13, + BUS_MSTOP(11, BIT(12))), + DEF_MOD("rsci9_ps_ps1_n", CLK_PLLCLN_DIV64, 8, 14, 4, 14, + BUS_MSTOP(11, BIT(12))), DEF_MOD("scif_0_clk_pck", CLK_PLLCM33_DIV16, 8, 15, 4, 15, BUS_MSTOP(3, BIT(14))), DEF_MOD("i3c_0_pclkrw", CLK_PLLCLN_DIV16, 9, 0, 4, 16, @@ -351,6 +457,26 @@ static const struct rzv2h_reset r9a09g047_resets[] __i= nitconst =3D { DEF_RST(7, 6, 3, 7), /* WDT_1_RESET */ DEF_RST(7, 7, 3, 8), /* WDT_2_RESET */ DEF_RST(7, 8, 3, 9), /* WDT_3_RESET */ + DEF_RST(8, 1, 3, 18), /* RSCI0_PRESETN */ + DEF_RST(8, 2, 3, 19), /* RSCI0_TRESETN */ + DEF_RST(8, 3, 3, 20), /* RSCI1_PRESETN */ + DEF_RST(8, 4, 3, 21), /* RSCI1_TRESETN */ + DEF_RST(8, 5, 3, 22), /* RSCI2_PRESETN */ + DEF_RST(8, 6, 3, 23), /* RSCI2_TRESETN */ + DEF_RST(8, 7, 3, 24), /* RSCI3_PRESETN */ + DEF_RST(8, 8, 3, 25), /* RSCI3_TRESETN */ + DEF_RST(8, 9, 3, 26), /* RSCI4_PRESETN */ + DEF_RST(8, 10, 3, 27), /* RSCI4_TRESETN */ + DEF_RST(8, 11, 3, 28), /* RSCI5_PRESETN */ + DEF_RST(8, 12, 3, 29), /* RSCI5_TRESETN */ + DEF_RST(8, 13, 3, 30), /* RSCI6_PRESETN */ + DEF_RST(8, 14, 3, 31), /* RSCI6_TRESETN */ + DEF_RST(8, 15, 4, 0), /* RSCI7_PRESETN */ + DEF_RST(9, 0, 4, 1), /* RSCI7_TRESETN */ + DEF_RST(9, 1, 4, 2), /* RSCI8_PRESETN */ + DEF_RST(9, 2, 4, 3), /* RSCI8_TRESETN */ + DEF_RST(9, 3, 4, 4), /* RSCI9_PRESETN */ + DEF_RST(9, 4, 4, 5), /* RSCI9_TRESETN */ DEF_RST(9, 5, 4, 6), /* SCIF_0_RST_SYSTEM_N */ DEF_RST(9, 6, 4, 7), /* I3C_0_PRESETN */ DEF_RST(9, 7, 4, 8), /* I3C_0_TRESETN */ --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8100A30C35E; Mon, 27 Oct 2025 15:46:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761579994; cv=none; b=QETaVFVDAAt2v6k0y0DOibRJ3svTFieidZxP22nMsiXNxK0QsvI4Dj54LpbO/RpXAtChJsHVh/ONHNJd4Ze+7hxbUSzVGcziP/p112bthls+Jl3EX5GfqKYKLcH1698kuV6kYRz3lieZJGTlgrLYQ5C7FuWsn8x+wNRualvKJ7E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761579994; c=relaxed/simple; bh=QoYGK19ixs0zIe1gOF+pbJlwDOH5B4Q9paZr2qmP7DY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; 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Jiri Slaby , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm Cc: Biju Das , Lad Prabhakar , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Biju Das Subject: [PATCH 02/19] dt-bindings: serial: rsci: Drop "uart-has-rtscts: false" Date: Mon, 27 Oct 2025 15:45:49 +0000 Message-ID: <20251027154615.115759-3-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Drop "uart-has-rtscts: false" from binding as the IP support hardware flow control. Signed-off-by: Biju Das --- Documentation/devicetree/bindings/serial/renesas,rsci.yaml | 2 -- 1 file changed, 2 deletions(-) diff --git a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml b/D= ocumentation/devicetree/bindings/serial/renesas,rsci.yaml index f50d8e02f476..6b1f827a335b 100644 --- a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml @@ -54,8 +54,6 @@ properties: power-domains: maxItems: 1 =20 - uart-has-rtscts: false - required: - compatible - reg --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E9AA23112B3; Mon, 27 Oct 2025 15:46:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761579997; cv=none; b=SGVMsF+WQ51bSTZvsso6RvaNZKfKVV2XcBQcRigQ4iL5mik/2vg0eNPQ5cu8Ag6V5IDhO2WKHSHWVp5WPuQ32DN/iftgPZ64WGVcQVOF3KkJ4re6i0se8acOGFW4Pdf4nBrfl8dj53Qytl1uWIdQ/CwCGzBYm8IF9Gj5yYXclcs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761579997; c=relaxed/simple; bh=amBXXbuQRPa5vJPSCdoctWh7t37L2CWiZDvrfP8m03U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PcrID7ee9g2VVesPfuQwRjk6MVxEuvM0ekwWyc6M07HSjbPGXaN1Y4ZGqXlmaE0WTrX7nRqGmXlBPFPEkMLm2mjnXOa0/KvIKblAzSYEarIi1hbKH+2eokfZpU0n8ivg5Idtas/UQ/TQmupQ+CQjLVvDiPtoGxVZrjqlJSgjrxA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: vh86v0YKSLi8j5jVcmJPeQ== X-CSE-MsgGUID: +M7X+0dfQQCNeLVfdSlaAQ== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 28 Oct 2025 00:46:34 +0900 Received: from localhost.localdomain (unknown [10.226.93.103]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id ABFD9400A67C; Tue, 28 Oct 2025 00:46:30 +0900 (JST) From: Biju Das To: Greg Kroah-Hartman , Jiri Slaby , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm Cc: Biju Das , Lad Prabhakar , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Biju Das Subject: [PATCH 03/19] dt-bindings: serial: renesas,rsci: Document RZ/G3E support Date: Mon, 27 Oct 2025 15:45:50 +0000 Message-ID: <20251027154615.115759-4-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add documentation for the serial communication interface (RSCI) found on the Renesas RZ/G3E (R9A09G047) SoC. The RSCI IP on this SoC is identical to that on the RZ/T2H (R9A09G077) SoC, but it has a 32-stage FIFO compared to 16 on RZ/T2H. It supports both FIFO and non-FIFO mode operation. RZ/G3E has 6 clocks compared to 3 on RZ/T2H, and it has multiple resets. Signed-off-by: Biju Das --- .../bindings/serial/renesas,rsci.yaml | 82 ++++++++++++++++--- 1 file changed, 71 insertions(+), 11 deletions(-) diff --git a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml b/D= ocumentation/devicetree/bindings/serial/renesas,rsci.yaml index 6b1f827a335b..7cf6348e2b5b 100644 --- a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml @@ -10,17 +10,16 @@ maintainers: - Geert Uytterhoeven - Lad Prabhakar =20 -allOf: - - $ref: serial.yaml# - properties: compatible: oneOf: - - items: - - const: renesas,r9a09g087-rsci # RZ/N2H - - const: renesas,r9a09g077-rsci # RZ/T2H + - enum: + - renesas,r9a09g047-rsci # RZ/G3E non FIFO mode + - renesas,r9a09g047-rscif # RZ/G3E FIFO mode + - renesas,r9a09g077-rsci # RZ/T2H =20 - items: + - const: renesas,r9a09g087-rsci # RZ/N2H - const: renesas,r9a09g077-rsci # RZ/T2H =20 reg: @@ -42,14 +41,40 @@ properties: =20 clocks: minItems: 2 - maxItems: 3 + maxItems: 6 =20 clock-names: - minItems: 2 + oneOf: + - items: + - const: operation + - const: bus + - items: + - const: operation + - const: bus + - const: sck # optional external clock input + - items: + - const: bus + - const: tclk + - const: tclk_div64 + - const: tclk_div16 + - const: tclk_div4 + - items: + - const: bus + - const: tclk + - const: tclk_div64 + - const: tclk_div16 + - const: tclk_div4 + - const: sck # optional external clock input + + resets: + items: + - description: Input for resetting the APB clock + - description: Input for resetting TCLK + + reset-names: items: - - const: operation - - const: bus - - const: sck # optional external clock input + - const: presetn + - const: tresetn =20 power-domains: maxItems: 1 @@ -62,6 +87,41 @@ required: - clock-names - power-domains =20 +allOf: + - $ref: serial.yaml# + + - if: + properties: + compatible: + contains: + const: renesas,r9a09g077-rsci + then: + properties: + clocks: + maxItems: 3 + + clock-names: + maxItems: 3 + + - if: + properties: + compatible: + contains: + enum: + - renesas,r9a09g047-rsci + - renesas,r9a09g047-rscif + then: + properties: + clocks: + minItems: 5 + + clock-names: + minItems: 5 + + required: + - resets + - reset-names + unevaluatedProperties: false =20 examples: --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3834631618B; 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dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: dyn2kJwTQSyFe/TbaPR0nQ== X-CSE-MsgGUID: 5UUUIdwhSSOD4caXKFg1jA== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 28 Oct 2025 00:46:38 +0900 Received: from localhost.localdomain (unknown [10.226.93.103]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 33E434003EA1; Tue, 28 Oct 2025 00:46:34 +0900 (JST) From: Biju Das To: Greg Kroah-Hartman , Jiri Slaby Cc: Biju Das , Geert Uytterhoeven , Lad Prabhakar , Wolfram Sang , Claudiu Beznea , Nam Cao , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Biju Das , linux-renesas-soc@vger.kernel.org, stable@kernel.org Subject: [PATCH 04/19] serial: sh-sci: Fix deadlock during RSCI FIFO overrun error Date: Mon, 27 Oct 2025 15:45:51 +0000 Message-ID: <20251027154615.115759-5-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" On RSCI IP, a deadlock occurs during a FIFO overrun error, as it uses a different register to clear the FIFO overrun error status. Cc: stable@kernel.org Fixes: 0666e3fe95ab ("serial: sh-sci: Add support for RZ/T2H SCI") Signed-off-by: Biju Das --- drivers/tty/serial/rsci.c | 1 + drivers/tty/serial/sh-sci-common.h | 1 + drivers/tty/serial/sh-sci.c | 8 ++++++-- 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/tty/serial/rsci.c b/drivers/tty/serial/rsci.c index b3c48dc1e07d..3e1f4b3c4e59 100644 --- a/drivers/tty/serial/rsci.c +++ b/drivers/tty/serial/rsci.c @@ -414,6 +414,7 @@ static const struct sci_port_params_bits rsci_port_para= m_bits =3D { .rxtx_enable =3D CCR0_RE | CCR0_TE, .te_clear =3D CCR0_TE | CCR0_TEIE, .poll_sent_bits =3D CSR_TDRE | CSR_TEND, + .overrun_clr =3D CFCLR_ORERC, }; =20 static const struct sci_port_params rsci_port_params =3D { diff --git a/drivers/tty/serial/sh-sci-common.h b/drivers/tty/serial/sh-sci= -common.h index e3c028df14f1..bcdb41ddc15d 100644 --- a/drivers/tty/serial/sh-sci-common.h +++ b/drivers/tty/serial/sh-sci-common.h @@ -51,6 +51,7 @@ struct sci_port_params_bits { unsigned int rxtx_enable; unsigned int te_clear; unsigned int poll_sent_bits; + unsigned int overrun_clr; }; =20 struct sci_common_regs { diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 62bb62b82cbe..b33894d0273b 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -1024,8 +1024,12 @@ static int sci_handle_fifo_overrun(struct uart_port = *port) =20 status =3D s->ops->read_reg(port, s->params->overrun_reg); if (status & s->params->overrun_mask) { - status &=3D ~s->params->overrun_mask; - s->ops->write_reg(port, s->params->overrun_reg, status); + if (s->type =3D=3D SCI_PORT_RSCI) { + s->ops->clear_SCxSR(port, s->params->param_bits->overrun_clr); + } else { + status &=3D ~s->params->overrun_mask; + s->ops->write_reg(port, s->params->overrun_reg, status); + } =20 port->icount.overrun++; =20 --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3A89231618B; Mon, 27 Oct 2025 15:46:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580005; cv=none; b=cVRdMRbYOo6QrheZEURQyZzuyvd5dLCfv8LB9YEDKQ4VqEI/pg8U2hTCv4pJsOc66EbhBiegxT3/eG0R8j4nGhvtPRiNT1dH/FMKd6lTIwvoX3nztiC3QqVoBqySqZMS/x7Ez2HECTAPo5tT6NNkLkoMp5T6I1K6U2ozDQr9vFs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580005; c=relaxed/simple; bh=ualHeG+rP981M5bcFFLj4A2fm5SUEK/y45ZGWLg7SMc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nrw4kZoC4DDsicIOkFY4MJnLcKuWPM20fvSRmha1fMLMIq92vSSPfY1l0KO0zu+0c7X8dY+MP7unJPuVE2YVP7FC+FqIiXijXYq8hr1pY5+DkUX9goZ2+uT6rwGHx2RvUiVo5bgXVDxOi/9ob8roY3ZhRlMd8qC+vF7CIMYzbmA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: RJ+gNjPDSJ+K7fgg2cXk+w== X-CSE-MsgGUID: +K1/hVovQ0W4nQUoML4HXQ== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 28 Oct 2025 00:46:42 +0900 Received: from localhost.localdomain (unknown [10.226.93.103]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 7129B4003EA1; Tue, 28 Oct 2025 00:46:39 +0900 (JST) From: Biju Das To: Greg Kroah-Hartman , Jiri Slaby Cc: Biju Das , Geert Uytterhoeven , Lad Prabhakar , Wolfram Sang , Claudiu Beznea , Nam Cao , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Biju Das , linux-renesas-soc@vger.kernel.org Subject: [PATCH 05/19] serial: rsci: Drop rsci_clear_CFC() Date: Mon, 27 Oct 2025 15:45:52 +0000 Message-ID: <20251027154615.115759-6-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Drop rsci_clear_CFC() by reusing rsci_clear_SCxSR() as the contents of both functions are the same. Signed-off-by: Biju Das --- drivers/tty/serial/rsci.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/tty/serial/rsci.c b/drivers/tty/serial/rsci.c index 3e1f4b3c4e59..504361ed5ecc 100644 --- a/drivers/tty/serial/rsci.c +++ b/drivers/tty/serial/rsci.c @@ -199,11 +199,6 @@ static unsigned int rsci_get_mctrl(struct uart_port *p= ort) return 0; } =20 -static void rsci_clear_CFC(struct uart_port *port, unsigned int mask) -{ - rsci_serial_out(port, CFCLR, mask); -} - static void rsci_start_tx(struct uart_port *port) { struct sci_port *sp =3D to_sci_port(port); @@ -275,7 +270,7 @@ static void rsci_transmit_chars(struct uart_port *port) break; } =20 - rsci_clear_CFC(port, CFCLR_TDREC); + rsci_clear_SCxSR(port, CFCLR_TDREC); rsci_serial_out(port, TDR, c); =20 port->icount.tx++; --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 23015312829; Mon, 27 Oct 2025 15:46:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580009; cv=none; b=QCqKw5/qSFD519zndcjoa8dUzf4/J3i/ecGZJqnCl994Q3x6iv2OGqPGSmYIs0AlZO5cyUKo5H8XNQ1XBMr86XfysLrnahUwPzIRUsccuN/K0NxVFTKGrFwACemZCK4Zd4suJe4Rkf/BqTdsydL0O0ldD5fup+dniU7THl+NEhY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580009; c=relaxed/simple; bh=Mb0beqBWwofz7EjCS0ciVZMnoF6wn1jJyWkpuqQHNl4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RIv0LqilHhj6uF2lC4HE+DWJA9sAsEPn/ggdW1kw+/yAATYGZCDwXon2lAwVmLXp87ONakJwZCm+eB8kiOBupnMHdWjodTv0cHv9aFCHehrsDUt6oDdDb1GXBuNjnFKO2i+MBbGpp4nH6cCshbKIkKCQ3/xXKKIjGAAnNl7mflA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: qYx5Cj89Qt+TvQ/uthERcA== X-CSE-MsgGUID: xTOXHDb6QOimFht9Uv55IA== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 28 Oct 2025 00:46:46 +0900 Received: from localhost.localdomain (unknown [10.226.93.103]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 6AE564003EA1; Tue, 28 Oct 2025 00:46:43 +0900 (JST) From: Biju Das To: Greg Kroah-Hartman , Jiri Slaby Cc: Biju Das , Geert Uytterhoeven , Lad Prabhakar , Wolfram Sang , Claudiu Beznea , Nam Cao , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Biju Das , linux-renesas-soc@vger.kernel.org Subject: [PATCH 06/19] serial: sh-sci: Drop extra line Date: Mon, 27 Oct 2025 15:45:53 +0000 Message-ID: <20251027154615.115759-7-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Shorten the number lines in sci_init_clocks() by fitting the error message within an 80-character length limit. Signed-off-by: Biju Das --- drivers/tty/serial/sh-sci.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index b33894d0273b..699c39b81c4b 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -3009,8 +3009,7 @@ static int sci_init_clocks(struct sci_port *sci_port,= struct device *dev) =20 if (!clk && sci_port->type =3D=3D SCI_PORT_RSCI && (i =3D=3D SCI_FCK || i =3D=3D SCI_BRG_INT)) { - return dev_err_probe(dev, -ENODEV, - "failed to get %s\n", + return dev_err_probe(dev, -ENODEV, "failed to get %s\n", name); } =20 --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 194E631B836; Mon, 27 Oct 2025 15:46:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580012; cv=none; b=u/Zer+Xgtiete+LZgbJCHpb2o55aJCO8f1UM/rH1U4sF7x7AK7+4PugoNOjHHTRzzdqfKWxmw7ofOZYjOMlLLX9OXAqIBPoOkU3tggR4Szkxy+s4bbE4yP+19I96K1/a+5QT69zhiHem1eu9oUMrZUhF68Kii02IdM2/ZWg4edY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580012; c=relaxed/simple; bh=csp80++h3wAjZ6RCesIV+z2LKv1jK35Bi0RofLrar04=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=KChqmn0xL3guQJxglg4rcukVdkX30jHsqQjJAB4uwoDXQqRviZSyNAapMHYOKdGWQs5+eXKM7RmicUI4ywvRJgP0Clg42kChPNtl8BptU8rJVwjOsYlJ7U8a84z/GulihERccWkcCpkNQndnJ/PRaiarAhK+ZDQp2UaKRJ9hIOg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: 8kC8BSDxQOmzwn0XwUqqwA== X-CSE-MsgGUID: OsTnXoYVRF64UWT6ru3PRw== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 28 Oct 2025 00:46:50 +0900 Received: from localhost.localdomain (unknown [10.226.93.103]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 62AB2400A67C; Tue, 28 Oct 2025 00:46:47 +0900 (JST) From: Biju Das To: Greg Kroah-Hartman , Jiri Slaby Cc: Biju Das , Geert Uytterhoeven , Lad Prabhakar , Wolfram Sang , Claudiu Beznea , Nam Cao , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Biju Das , linux-renesas-soc@vger.kernel.org Subject: [PATCH 07/19] serial: rsci: Drop unused macro DCR Date: Mon, 27 Oct 2025 15:45:54 +0000 Message-ID: <20251027154615.115759-8-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Drop unused macro DCR and its bit definition. Signed-off-by: Biju Das --- drivers/tty/serial/rsci.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/tty/serial/rsci.c b/drivers/tty/serial/rsci.c index 504361ed5ecc..470b5701cd67 100644 --- a/drivers/tty/serial/rsci.c +++ b/drivers/tty/serial/rsci.c @@ -24,7 +24,6 @@ MODULE_IMPORT_NS("SH_SCI"); #define CCR3 0x14 #define CCR4 0x18 #define FCR 0x24 -#define DCR 0x30 #define CSR 0x48 #define FRSR 0x50 #define FTSR 0x54 @@ -119,8 +118,6 @@ MODULE_IMPORT_NS("SH_SCI"); /* FFCLR (FIFO Flag CLear Register) */ #define FFCLR_DRC BIT(0) /* DR Clear */ =20 -#define DCR_DEPOL BIT(0) - static u32 rsci_serial_in(struct uart_port *p, int offset) { return readl(p->membase + offset); --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 13BC230DECC; Mon, 27 Oct 2025 15:46:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580018; cv=none; b=awv39UX5NxPrR9zAfdvBvV4EsTJkLyiQ8LbQ2NjvMZ90gXJOBKgguLAb/Wgpfbk+SqT8LWjtI+xV2sYx7hI5imBe1d/mibzXwWuujI3yIUoBsXTbm5YenwLQUiAhY8Gngl7CQrNk/caIpRsVg7W2TUp4WQBuh2Ki7l4idr2mSQ8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580018; c=relaxed/simple; bh=h+vqXHVZP80mUaziogqgyyje7EN4f+6tFkZP4+7Wock=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mhXWTfUrlxFNf0tsUJilnNknGM0UjD0m4P1FhNYOK2k8F9Vz9GVvQ7gFkZI0s2Kn6YWqk85HAi7uMRtoWjDLoJBg5MdkR6fdBcWdpU4WuW0/J5kfryLjMuhiJ9xAHRMDnxHJ6TWGF1pkfSPpCAyn6HRdn+QKbJd2P3y61T8GeQY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: /x6NXy2uT7OtJm7JTzNhpQ== X-CSE-MsgGUID: /37kOmzYTyO/I0G5zIWkTg== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 28 Oct 2025 00:46:54 +0900 Received: from localhost.localdomain (unknown [10.226.93.103]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 5831A4003EA1; Tue, 28 Oct 2025 00:46:51 +0900 (JST) From: Biju Das To: Greg Kroah-Hartman , Jiri Slaby Cc: Biju Das , Geert Uytterhoeven , Lad Prabhakar , Wolfram Sang , Claudiu Beznea , Nam Cao , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Biju Das , linux-renesas-soc@vger.kernel.org Subject: [PATCH 08/19] serial: rsci: Drop unused TDR register Date: Mon, 27 Oct 2025 15:45:55 +0000 Message-ID: <20251027154615.115759-9-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Drop the unused TDR register-related macros. Signed-off-by: Biju Das --- drivers/tty/serial/rsci.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/tty/serial/rsci.c b/drivers/tty/serial/rsci.c index 470b5701cd67..ade5ee479e99 100644 --- a/drivers/tty/serial/rsci.c +++ b/drivers/tty/serial/rsci.c @@ -35,12 +35,6 @@ MODULE_IMPORT_NS("SH_SCI"); #define RDR_FPER BIT(11) /* FIFO Parity Error */ #define RDR_RDAT_MSK GENMASK(8, 0) =20 -/* TDR (Transmit Data Register) */ -#define TDR_MPBT BIT(9) /* Multiprocessor Transfer */ -#define TDR_TDAT_9BIT_LSHIFT 0 -#define TDR_TDAT_9BIT_VAL 0x1FF -#define TDR_TDAT_9BIT_MSK (TDR_TDAT_9BIT_VAL << TDR_TDAT_9BIT_LSHIFT) - /* CCR0 (Common Control Register 0) */ #define CCR0_SSE BIT(24) /* SSn# Pin Function Enable */ #define CCR0_TEIE BIT(21) /* Transmit End Interrupt Enable */ --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 182C331CA7B; Mon, 27 Oct 2025 15:46:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580021; cv=none; b=QzUbL2vj1h2L6HM9/9/KHDRM2eDL0uPNJOOqjztSFkATZseIqP6xhzD2bLENNB2B5J/RUzKErtnZ4ZctDPQik6FeZa+6QV7z3PT+qTFGNYhrlrTOSuEXxo89VyZFnoVTjPmAwHGzjVMDkrIprSOpClEveMtRnACR9+4EIbuR5xI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580021; c=relaxed/simple; bh=f4Niae8Y2I/zrtcf2aZiQXm1cUA2JJ4lmgCCOSGG3dM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=L45fVTWBL4kJ5St99++cDdUnxm2M0JYnnXTaNxr9Xnt95kk0YS9g2sBdf+gidt53BZahbXZI1Rbbvbey5VIUsjM7fP2fh7/McHw4H2/dWOdBypBilrvTdVzI94JpBRVZtzMkhzRTtLo4ZbaBewzIYuAgYxG7TFZsOtve63wmZCo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: U21n4GkZRDWvrVfM9o6ZeA== X-CSE-MsgGUID: i7X2cI07QTyc9R+tABBVOA== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 28 Oct 2025 00:46:58 +0900 Received: from localhost.localdomain (unknown [10.226.93.103]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 5E492400A67C; Tue, 28 Oct 2025 00:46:55 +0900 (JST) From: Biju Das To: Greg Kroah-Hartman , Jiri Slaby Cc: Biju Das , Geert Uytterhoeven , Lad Prabhakar , Wolfram Sang , Claudiu Beznea , Nam Cao , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Biju Das , linux-renesas-soc@vger.kernel.org Subject: [PATCH 09/19] serial: sh-sci: Use devm_reset_control_array_get_exclusive() Date: Mon, 27 Oct 2025 15:45:56 +0000 Message-ID: <20251027154615.115759-10-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Replace devm_*_get_exclusive()->devm_*_array_get_exclusive() to support existing SoCs along with RZ/G3E as RZ/G3E has 2 resets. Signed-off-by: Biju Das --- drivers/tty/serial/sh-sci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 699c39b81c4b..4bcd886de75d 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -3537,7 +3537,7 @@ static struct plat_sci_port *sci_parse_dt(struct plat= form_device *pdev, =20 data =3D of_device_get_match_data(&pdev->dev); =20 - rstc =3D devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); + rstc =3D devm_reset_control_array_get_optional_exclusive(&pdev->dev); if (IS_ERR(rstc)) return ERR_PTR(dev_err_probe(&pdev->dev, PTR_ERR(rstc), "failed to get reset ctrl\n")); --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 0BEF631327F; Mon, 27 Oct 2025 15:47:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580025; cv=none; b=KYIjDlI9k4craE/aKpqxJRxFJNkbwTDw8IlMKX4oxjSJlZQPpWAzJQJ9EoiGhB0l7XEFZFyOUlIYBoeJu8A7DkSlVH2Pa6O5d4TQcblovpeecr+JT2Mo1TPgBoiVf599gXM7eBCdrx94KvKsp2gho0Ufc4jV5wWeNz24np1eGjg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580025; c=relaxed/simple; bh=TmTtQW4ERp85Ma0MqBVY4jX9tpiC0lXn4HgB6wUcJAg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=f0dY+2Kqd6/Yu+y8n66XQLjMrfi8Waa+dxhE4YuVG9AHoAFQF0vg3u6r2Vpz4Pe/y2RD/l8NSt+iNeddjcQnFAES8TXq5BM+4fjZWM3GDenX2pYfj1/+7p7LybUjiyvnRxsb8dPxod0Z8euugylhjtQpyQ3lDPw5M8ck314Rtqs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: q/+qx0iHSzCfQGmu9nZyZw== X-CSE-MsgGUID: S4u4Ss2fRViG3ay9MLkUJA== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 28 Oct 2025 00:47:02 +0900 Received: from localhost.localdomain (unknown [10.226.93.103]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 528F74003EA1; Tue, 28 Oct 2025 00:46:59 +0900 (JST) From: Biju Das To: Greg Kroah-Hartman , Jiri Slaby Cc: Biju Das , Geert Uytterhoeven , Lad Prabhakar , Wolfram Sang , Claudiu Beznea , Nam Cao , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Biju Das , linux-renesas-soc@vger.kernel.org Subject: [PATCH 10/19] serial: sh-sci: Add RSCI_PORT_{SCI,SCIF} port IDs Date: Mon, 27 Oct 2025 15:45:57 +0000 Message-ID: <20251027154615.115759-11-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" RZ/G3E RSCI tx/rx supports both FIFO and non-FIFO mode. It has 32-stage FIFO. Add RSCI_PORT_SCI port ID for non-FIFO mode and RSCI_PORT_SCIF port ID for FIFO mode. Update the rx_trigger for both these modes. Signed-off-by: Biju Das --- drivers/tty/serial/sh-sci-common.h | 2 ++ drivers/tty/serial/sh-sci.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/drivers/tty/serial/sh-sci-common.h b/drivers/tty/serial/sh-sci= -common.h index bcdb41ddc15d..ef1d94ae8b5c 100644 --- a/drivers/tty/serial/sh-sci-common.h +++ b/drivers/tty/serial/sh-sci-common.h @@ -8,6 +8,8 @@ /* Private port IDs */ enum SCI_PORT_TYPE { SCI_PORT_RSCI =3D BIT(7) | 0, + RSCI_PORT_SCI =3D BIT(7) | 1, + RSCI_PORT_SCIF =3D BIT(7) | 2, }; =20 enum SCI_CLKS { diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 4bcd886de75d..77ccf5677561 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -3153,6 +3153,9 @@ static int sci_init_single(struct platform_device *de= v, case SCI_PORT_RSCI: sci_port->rx_trigger =3D 15; break; + case RSCI_PORT_SCIF: + sci_port->rx_trigger =3D 32; + break; default: sci_port->rx_trigger =3D 1; break; --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E27F731DDAF; Mon, 27 Oct 2025 15:47:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580029; cv=none; b=ZVKb9GUNjcChlJf/0hpb2QHcvDcuiSTGKYWh02mAYz0qDJIUS/6C9PEajOKdYbyHjHvx7oYhsh/55ggLXH23iRXQYqcwx0YXawOT8VILH/54Eg6xdxcN5I7a3BbwQbvsRjVEriEIxjhAS+D0musFC96NWqAparwkNnl2aFinueg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580029; c=relaxed/simple; bh=Wzli2Rv1XgCS2K5gXuiCjyTEOxZhtOw9jyVRXqSlG68=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HyjetLroFhvFzHQZSELtgy2OLRs+oxcBU+4Tj8ROEzj0Pjj4GxwKdN+bjW0LysHjWqnDJC5RPRHZDXrDtFErPfcOGQacYtdwv56JPtUvEFuI2FB5vjA5+pOAvY7X+fut25HM558u+Z5ChuVd3TiCtn+sGHb/+DdYg7PVgRo8hjU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: aWdKPp4KReiLcaRm7AmJHQ== X-CSE-MsgGUID: kHg1o6gNRWiq29fNPHgstQ== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 28 Oct 2025 00:47:06 +0900 Received: from localhost.localdomain (unknown [10.226.93.103]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 68D054003EA1; Tue, 28 Oct 2025 00:47:03 +0900 (JST) From: Biju Das To: Greg Kroah-Hartman , Jiri Slaby Cc: Biju Das , Geert Uytterhoeven , Lad Prabhakar , Wolfram Sang , Claudiu Beznea , Nam Cao , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Biju Das , linux-renesas-soc@vger.kernel.org Subject: [PATCH 11/19] serial: sh-sci: Add sci_is_rsci_type() Date: Mon, 27 Oct 2025 15:45:58 +0000 Message-ID: <20251027154615.115759-12-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add sci_is_rsci_type() for RSCI port type. This will simplify the code when the support added for RSCI_PORT_{SCI,SCIF} private PORT type. Signed-off-by: Biju Das --- drivers/tty/serial/sh-sci.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 77ccf5677561..5f5913410df9 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -1008,6 +1008,11 @@ static int sci_handle_errors(struct uart_port *port) return copied; } =20 +static bool sci_is_rsci_type(u8 type) +{ + return (type =3D=3D SCI_PORT_RSCI || type =3D=3D RSCI_PORT_SCI || type = =3D=3D RSCI_PORT_SCIF); +} + static int sci_handle_fifo_overrun(struct uart_port *port) { struct tty_port *tport =3D &port->state->port; @@ -1016,7 +1021,7 @@ static int sci_handle_fifo_overrun(struct uart_port *= port) int copied =3D 0; u32 status; =20 - if (s->type !=3D SCI_PORT_RSCI) { + if (!sci_is_rsci_type(s->type)) { reg =3D sci_getreg(port, s->params->overrun_reg); if (!reg->size) return 0; @@ -1024,7 +1029,7 @@ static int sci_handle_fifo_overrun(struct uart_port *= port) =20 status =3D s->ops->read_reg(port, s->params->overrun_reg); if (status & s->params->overrun_mask) { - if (s->type =3D=3D SCI_PORT_RSCI) { + if (sci_is_rsci_type(s->type)) { s->ops->clear_SCxSR(port, s->params->param_bits->overrun_clr); } else { status &=3D ~s->params->overrun_mask; @@ -1837,7 +1842,7 @@ static irqreturn_t sci_tx_end_interrupt(int irq, void= *ptr) unsigned long flags; u32 ctrl; =20 - if (s->type !=3D PORT_SCI && s->type !=3D SCI_PORT_RSCI) + if (s->type !=3D PORT_SCI && !sci_is_rsci_type(s->type)) return sci_tx_interrupt(irq, ptr); =20 uart_port_lock_irqsave(port, &flags); @@ -3116,7 +3121,7 @@ static int sci_init_single(struct platform_device *de= v, * The fourth interrupt on SCI and RSCI port is transmit end interrupt, so * shuffle the interrupts. */ - if (p->type =3D=3D PORT_SCI || p->type =3D=3D SCI_PORT_RSCI) + if (p->type =3D=3D PORT_SCI || sci_is_rsci_type(p->type)) swap(sci_port->irqs[SCIx_BRI_IRQ], sci_port->irqs[SCIx_TEI_IRQ]); =20 /* The SCI generates several interrupts. They can be muxed together or --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 17B6031E10C; Mon, 27 Oct 2025 15:47:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580032; cv=none; b=XQlPe/W1OBJwki/UJxC8rYFlDKmQ276F6r3GIItYYwusjfhH3F2dXIUq0XSQ1QwWYtU5jZ2cSqZ1WCK3Ph9nRsb2jjvnqkfN+NW9lOI19aUY/fbQ0TYOjYe/njDp+xprjdSyHI47o6wrgTGypuaTAGe/U7oiRmas7l++zOvFMcc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580032; c=relaxed/simple; bh=oG0rovoNpNXF/+ccTOdiQLS42A98YzuU1Z2EQYdzNdE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=u+TK2UvX5l2GMnGGM0Zx2OKh0Kuwe7nbHfdLLKG4bOMZh0RNy34Hu2iEBaMndR+72KQEtSA+HBIG7Q3T79s3gKXa5ljm7Z5TJ5vF/rVI/0s0w3MHgS7HOPQatAwuHc0SAbaab6g6v5CTqQRhAtkyvFn7PCQCB1uXbbGfL3marJw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: Ddd7LeqVTrix66H3rBZ93Q== X-CSE-MsgGUID: AvyG9dDRQiSCouSE/0BWew== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 28 Oct 2025 00:47:10 +0900 Received: from localhost.localdomain (unknown [10.226.93.103]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 61B00400A67C; Tue, 28 Oct 2025 00:47:07 +0900 (JST) From: Biju Das To: Greg Kroah-Hartman , Jiri Slaby Cc: Biju Das , Geert Uytterhoeven , Lad Prabhakar , Wolfram Sang , Claudiu Beznea , Nam Cao , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Biju Das , linux-renesas-soc@vger.kernel.org Subject: [PATCH 12/19] serial: sh-sci: Add support for RZ/G3E RSCI clks Date: Mon, 27 Oct 2025 15:45:59 +0000 Message-ID: <20251027154615.115759-13-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" RZ/G3E RSCI has 5 module clocks. Add support for these clocks. Signed-off-by: Biju Das --- drivers/tty/serial/sh-sci-common.h | 3 +++ drivers/tty/serial/sh-sci.c | 14 ++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/drivers/tty/serial/sh-sci-common.h b/drivers/tty/serial/sh-sci= -common.h index ef1d94ae8b5c..f730ff9add60 100644 --- a/drivers/tty/serial/sh-sci-common.h +++ b/drivers/tty/serial/sh-sci-common.h @@ -17,6 +17,9 @@ enum SCI_CLKS { SCI_SCK, /* Optional External Clock */ SCI_BRG_INT, /* Optional BRG Internal Clock Source */ SCI_SCIF_CLK, /* Optional BRG External Clock Source */ + SCI_FCK_DIV64, /* Optional Functional Clock frequency-divided by 64 */ + SCI_FCK_DIV16, /* Optional Functional Clock frequency-divided by 16 */ + SCI_FCK_DIV4, /* Optional Functional Clock frequency-divided by 4 */ SCI_NUM_CLKS }; =20 diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 5f5913410df9..d45bdda2b6c1 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -2994,6 +2994,9 @@ static int sci_init_clocks(struct sci_port *sci_port,= struct device *dev) [SCI_SCK] =3D "sck", [SCI_BRG_INT] =3D "brg_int", [SCI_SCIF_CLK] =3D "scif_clk", + [SCI_FCK_DIV64] =3D "tclk_div64", + [SCI_FCK_DIV16] =3D "tclk_div16", + [SCI_FCK_DIV4] =3D "tclk_div4", }; struct clk *clk; unsigned int i; @@ -3003,6 +3006,9 @@ static int sci_init_clocks(struct sci_port *sci_port,= struct device *dev) } else if (sci_port->type =3D=3D SCI_PORT_RSCI) { clk_names[SCI_FCK] =3D "operation"; clk_names[SCI_BRG_INT] =3D "bus"; + } else if (sci_port->type =3D=3D RSCI_PORT_SCI || sci_port->type =3D=3D R= SCI_PORT_SCIF) { + clk_names[SCI_FCK] =3D "tclk"; + clk_names[SCI_BRG_INT] =3D "bus"; } =20 for (i =3D 0; i < SCI_NUM_CLKS; i++) { @@ -3018,6 +3024,14 @@ static int sci_init_clocks(struct sci_port *sci_port= , struct device *dev) name); } =20 + if (!clk && (sci_port->type =3D=3D RSCI_PORT_SCI || + sci_port->type =3D=3D RSCI_PORT_SCIF) && + (i =3D=3D SCI_FCK || i =3D=3D SCI_BRG_INT || i =3D=3D SCI_FCK_DIV64 = || + i =3D=3D SCI_FCK_DIV16 || i =3D=3D SCI_FCK_DIV4)) { + return dev_err_probe(dev, -ENODEV, "failed to get %s\n", + name); + } + if (!clk && i =3D=3D SCI_FCK) { /* * Not all SH platforms declare a clock lookup entry --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 171AF31E10C; Mon, 27 Oct 2025 15:47:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580036; cv=none; b=CbyhGXUj/7bSNH2nL5Npq5ylSGGCZeRrcvlPy6poZEkFOSLo8uooYGXvykOe4gpBdMzU+IWvYX2qNgjm78d9TWWhbXoDu/XWoT7XRsBOWW77Iay+MeMstgOK6VS//CcinkBo8wNNJphZbf5lCX32Zl3hnfwOfD7S7+Evz6S34yo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580036; c=relaxed/simple; bh=xZr0EHZ211QAg2vPhsdF6EMACS8r8WPOYJZsYbPNFig=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=K9ImiiKenZkKGvy94nmpSiI9I6cDyz+7l5RnWDNyBkQ/o/URMNaRc7gAantRkH2vS9vQ+ZHFWUrNMAKi6K9VmYD55nIZf5v4wsZoEE3LnEm3M82V7lUd5Vyba/wUEKK4e6wWYbMCC/8/gKQv1NajtdMNUgI8/eLON0DJ64IzkE0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: iVCgbZKXT+ywNPLZRYuvsA== X-CSE-MsgGUID: gSyD8077Sl+6Vso/XHFjGQ== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 28 Oct 2025 00:47:14 +0900 Received: from localhost.localdomain (unknown [10.226.93.103]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 5BD574003EA1; Tue, 28 Oct 2025 00:47:11 +0900 (JST) From: Biju Das To: Greg Kroah-Hartman , Jiri Slaby Cc: Biju Das , Geert Uytterhoeven , Lad Prabhakar , Wolfram Sang , Claudiu Beznea , Nam Cao , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Biju Das , linux-renesas-soc@vger.kernel.org Subject: [PATCH 13/19] serial: sh-sci: Make sci_scbrr_calc() public Date: Mon, 27 Oct 2025 15:46:00 +0000 Message-ID: <20251027154615.115759-14-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Make the function sci_scbrr_calc() public for code reuse to support RZ/G3E RSCI IP. Signed-off-by: Biju Das --- drivers/tty/serial/sh-sci-common.h | 3 +++ drivers/tty/serial/sh-sci.c | 6 +++--- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/tty/serial/sh-sci-common.h b/drivers/tty/serial/sh-sci= -common.h index f730ff9add60..a3f4a76cdecb 100644 --- a/drivers/tty/serial/sh-sci-common.h +++ b/drivers/tty/serial/sh-sci-common.h @@ -171,6 +171,9 @@ void sci_port_enable(struct sci_port *sci_port); int sci_startup(struct uart_port *port); void sci_shutdown(struct uart_port *port); =20 +int sci_scbrr_calc(struct sci_port *s, unsigned int bps, unsigned int *brr, + unsigned int *srr, unsigned int *cks); + #define min_sr(_port) ffs((_port)->sampling_rate_mask) #define max_sr(_port) fls((_port)->sampling_rate_mask) =20 diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index d45bdda2b6c1..e478286229f6 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -2395,9 +2395,8 @@ static int sci_brg_calc(struct sci_port *s, unsigned = int bps, } =20 /* calculate sample rate, BRR, and clock select */ -static int sci_scbrr_calc(struct sci_port *s, unsigned int bps, - unsigned int *brr, unsigned int *srr, - unsigned int *cks) +int sci_scbrr_calc(struct sci_port *s, unsigned int bps, unsigned int *brr, + unsigned int *srr, unsigned int *cks) { unsigned long freq =3D s->clk_rates[SCI_FCK]; unsigned int sr, br, prediv, scrate, c; @@ -2461,6 +2460,7 @@ static int sci_scbrr_calc(struct sci_port *s, unsigne= d int bps, min_err, *brr, *srr + 1, *cks); return min_err; } +EXPORT_SYMBOL_NS_GPL(sci_scbrr_calc, "SH_SCI"); =20 static void sci_reset(struct uart_port *port) { --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id ADF42320CA8; Mon, 27 Oct 2025 15:47:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580041; cv=none; b=EwYtp/vCjOXCTpvmDHHr/Ey+t2jbFyGR0Anzx4dYE9IeuhnaWjMsF/jJyB7DMxr253NQ/UsAenT+ZoByit2udDX8w/vMxHG8LG67Rn9I9UQyHATi56DV1XUehnI5HtDWVBLY0YV6BzZ8byI+D8EIQGNVIW5ihUyBW6rQMXf4t9U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580041; c=relaxed/simple; bh=ntX71XVcorWnBmEc2m41XECfwxkJgnovnaAh7jfI4Uw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pKeDkikBS2vwzFwGA5DUErmCkI0CQ0Ik6iA1Je17hCv53c46/Bx6LM/c3o9Y42UmY4n16QvfhnXvUR215an8EQEJs+NsAkNym6kymoyNr09y/ktL7ydNLi79Jtdcx7G47D8IbEQWgUfZXH96xkShEZC1J6RA0eoTYdYyYOZqBhs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: uqmPXIGeTj2uPbCd2Lp4uA== X-CSE-MsgGUID: W+5/ZspPTTmgc0L3joDs1w== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 28 Oct 2025 00:47:18 +0900 Received: from localhost.localdomain (unknown [10.226.93.103]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 59686400A67C; Tue, 28 Oct 2025 00:47:15 +0900 (JST) From: Biju Das To: Greg Kroah-Hartman , Jiri Slaby Cc: Biju Das , Geert Uytterhoeven , Lad Prabhakar , Wolfram Sang , Claudiu Beznea , Nam Cao , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Biju Das , linux-renesas-soc@vger.kernel.org Subject: [PATCH 14/19] serial: sh-sci: Add finish_console_write() callback Date: Mon, 27 Oct 2025 15:46:01 +0000 Message-ID: <20251027154615.115759-15-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add finish_console_write() callback as RZ/G3E RSCI IP needs special handling compared to other SoCs. Signed-off-by: Biju Das --- drivers/tty/serial/sh-sci-common.h | 1 + drivers/tty/serial/sh-sci.c | 5 ++++- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/sh-sci-common.h b/drivers/tty/serial/sh-sci= -common.h index a3f4a76cdecb..2e97aad390d9 100644 --- a/drivers/tty/serial/sh-sci-common.h +++ b/drivers/tty/serial/sh-sci-common.h @@ -95,6 +95,7 @@ struct sci_port_ops { void (*shutdown_complete)(struct uart_port *port); =20 void (*prepare_console_write)(struct uart_port *port, u32 ctrl); + void (*finish_console_write)(struct uart_port *port, u32 ctrl); void (*console_save)(struct uart_port *port); void (*console_restore)(struct uart_port *port); size_t (*suspend_regs_size)(void); diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index e478286229f6..7d1c8338f36c 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -3265,7 +3265,10 @@ static void serial_console_write(struct console *co,= const char *s, cpu_relax(); =20 /* restore the SCSCR */ - sci_port->ops->write_reg(port, regs->control, ctrl); + if (sci_port->ops->finish_console_write) + sci_port->ops->finish_console_write(port, ctrl); + else + sci_port->ops->write_reg(port, regs->control, ctrl); =20 if (locked) uart_port_unlock_irqrestore(port, flags); --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5DB5F321F5E; Mon, 27 Oct 2025 15:47:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580045; cv=none; b=XnLvaSSQCv5RSnCRECI9UVBw1b/OSL+CwxY3Qx6Pxu2yyxMPZojL9B/huJ+NH/pQunAz0ebcpFfCq9wCEkh7k9QVs9XzGLyZi8Sk2ASdMgu6tTpASKbyoaOt7p4K8EHVCOmv2/D3phIpLklXgrTQ8obem4CvgVbGLp0PglzpgAg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580045; c=relaxed/simple; bh=orujULLc7L1aOPzDotPIIFIy8duX8ziXrfvE75rlP6E=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=KrR7kXQiwVYw2xuV3S9jZZJ231jH6s2YRtnCT79eEAoTSKUS7gVWHj0KH6t5P+1eKzdPYK/7mjOJE63J3QnSitpY12+eyek+o2DyL4fDMKVdbXMi7JXQfFB0BMXRDQawRV6XOTYx1rfg+6LHITrBr9HqMR/L/yKwkYhTIq2xmUI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: gGrmtomZQUiEO2nvpcPdgQ== X-CSE-MsgGUID: uLODHMO8SW2FNloXMIEWQw== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 28 Oct 2025 00:47:22 +0900 Received: from localhost.localdomain (unknown [10.226.93.103]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 5359A4003EA1; Tue, 28 Oct 2025 00:47:19 +0900 (JST) From: Biju Das To: Greg Kroah-Hartman , Jiri Slaby Cc: Biju Das , Geert Uytterhoeven , Lad Prabhakar , Wolfram Sang , Claudiu Beznea , Nam Cao , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Biju Das , linux-renesas-soc@vger.kernel.org Subject: [PATCH 15/19] serial: sh-sci: Add support for RZ/G3E RSCI SCIF Date: Mon, 27 Oct 2025 15:46:02 +0000 Message-ID: <20251027154615.115759-16-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for RZ/G3E RSCI SCIF(a.k.a FIFO mode). RSCI IP found on the RZ/G3E SoC is similar to RZ/T2H, but it has a 32-stage FIFO. it has 5 module clocks instead of 2 on T2H and has multiple resets. Add support for hardware flow control. Signed-off-by: Biju Das --- drivers/tty/serial/rsci.c | 279 ++++++++++++++++++++++++++++++++++-- drivers/tty/serial/rsci.h | 1 + drivers/tty/serial/sh-sci.c | 9 +- 3 files changed, 279 insertions(+), 10 deletions(-) diff --git a/drivers/tty/serial/rsci.c b/drivers/tty/serial/rsci.c index ade5ee479e99..4c74251dc171 100644 --- a/drivers/tty/serial/rsci.c +++ b/drivers/tty/serial/rsci.c @@ -11,6 +11,8 @@ #include #include #include + +#include "serial_mctrl_gpio.h" #include "rsci.h" =20 MODULE_IMPORT_NS("SH_SCI"); @@ -59,6 +61,41 @@ MODULE_IMPORT_NS("SH_SCI"); #define CCR1_CTSPEN BIT(1) /* CTS External Pin Enable */ #define CCR1_CTSE BIT(0) /* CTS Enable */ =20 +/* CCR2 (Common Control Register 2) */ +#define CCR2_INIT 0xFF000004 +#define CCR2_CKS_TCLK (0) /* TCLK clock */ +#define CCR2_CKS_TCLK_DIV4 BIT(20) /* TCLK/4 clock */ +#define CCR2_CKS_TCLK_DIV16 BIT(21) /* TCLK16 clock */ +#define CCR2_CKS_TCLK_DIV64 (BIT(21) | BIT(20)) /* TCLK/64 clock */ +#define CCR2_BRME BIT(16) /* Bitrate Modulation Enable */ +#define CCR2_ABCSE BIT(6) /* Asynchronous Mode Extended Base Clock Selec= t */ +#define CCR2_ABCS BIT(5) /* Asynchronous Mode Base Clock Select */ +#define CCR2_BGDM BIT(4) /* Baud Rate Generator Double-Speed Mode Select= */ + +/* CCR3 (Common Control Register 3) */ +#define CCR3_INIT 0x1203 +#define CCR3_BLK BIT(29) /* Block Transfer Mode */ +#define CCR3_GM BIT(28) /* GSM Mode */ +#define CCR3_CKE1 BIT(25) /* Clock Enable 1 */ +#define CCR3_CKE0 BIT(24) /* Clock Enable 0 */ +#define CCR3_DEN BIT(21) /* Driver Enabled */ +#define CCR3_FM BIT(20) /* FIFO Mode Select */ +#define CCR3_MP BIT(19) /* Multi-Processor Mode */ +#define CCR3_MOD_ASYNC 0 /* Asynchronous mode (Multi-processor mode) */ +#define CCR3_MOD_IRDA BIT(16) /* Smart card interface mode */ +#define CCR3_MOD_CLK_SYNC BIT(17) /* Clock synchronous mode */ +#define CCR3_MOD_SPI (BIT(17) | BIT(16)) /* Simple SPI mode */ +#define CCR3_MOD_I2C BIT(18) /* Simple I2C mode */ +#define CCR3_RXDESEL BIT(15) /* Asynchronous Start Bit Edge Detection Se= lect */ +#define CCR3_STP BIT(14) /* Stop bit Length */ +#define CCR3_SINV BIT(13) /* Transmitted/Received Data Invert */ +#define CCR3_LSBF BIT(12) /* LSB First select */ +#define CCR3_CHR1 BIT(9) /* Character Length */ +#define CCR3_CHR0 BIT(8) /* Character Length */ +#define CCR3_BPEN BIT(7) /* Synchronizer Bypass Enable */ +#define CCR3_CPOL BIT(1) /* Clock Polarity Select */ +#define CCR3_CPHA BIT(0) /* Clock Phase Select */ + /* FCR (FIFO Control Register) */ #define FCR_RFRST BIT(23) /* Receive FIFO Data Register Reset */ #define FCR_TFRST BIT(15) /* Transmit FIFO Data Register Reset */ @@ -142,21 +179,162 @@ static void rsci_start_rx(struct uart_port *port) rsci_serial_out(port, CCR0, ctrl); } =20 +static void rsci_enable_ms(struct uart_port *port) +{ + mctrl_gpio_enable_ms(to_sci_port(port)->gpios); +} + +static void rsci_init_pins(struct uart_port *port, unsigned int cflag) +{ + struct sci_port *s =3D to_sci_port(port); + + /* + * Use port-specific handler if provided. + */ + if (s->cfg->ops && s->cfg->ops->init_pins) { + s->cfg->ops->init_pins(port, cflag); + return; + } + + if (!s->has_rtscts) + return; + + if (s->autorts) + rsci_serial_out(port, CCR1, rsci_serial_in(port, CCR1) | + CCR1_CTSE | CCR1_CTSPEN); +} + +static int rsci_scif_set_rtrg(struct uart_port *port, int rx_trig) +{ + unsigned int bits; + + if (rx_trig >=3D port->fifosize) + rx_trig =3D port->fifosize - 1; + else if (rx_trig < 1) + rx_trig =3D 1; + + bits =3D rx_trig << 16; + rsci_serial_out(port, FCR, (rsci_serial_in(port, FCR) & ~FCR_RTRG4_0) | b= its); + + return rx_trig; +} + static void rsci_set_termios(struct uart_port *port, struct ktermios *term= ios, const struct ktermios *old) { + unsigned int ccr2_val =3D CCR2_INIT, ccr3_val =3D CCR3_INIT; + unsigned int ccr0_val =3D 0, ccr1_val =3D 0, ccr4_val =3D 0; + unsigned int brr1 =3D 255, cks1 =3D 0, srr1 =3D 15; struct sci_port *s =3D to_sci_port(port); + unsigned int brr =3D 255, cks =3D 0; + int min_err =3D INT_MAX, err; + unsigned long max_freq =3D 0; + unsigned int baud, i; unsigned long flags; + unsigned int ctrl; + int best_clk =3D -1; + + if ((termios->c_cflag & CSIZE) =3D=3D CS7) { + ccr3_val |=3D CCR3_CHR0; + } else { + termios->c_cflag &=3D ~CSIZE; + termios->c_cflag |=3D CS8; + } + if (termios->c_cflag & PARENB) + ccr1_val |=3D CCR1_PE; + if (termios->c_cflag & PARODD) + ccr1_val |=3D (CCR1_PE | CCR1_PM); + if (termios->c_cflag & CSTOPB) + ccr3_val |=3D CCR3_STP; + + /* Enable noise filter function */ + ccr1_val |=3D CCR1_NFEN; + + /* + * earlyprintk comes here early on with port->uartclk set to zero. + * the clock framework is not up and running at this point so here + * we assume that 115200 is the maximum baud rate. please note that + * the baud rate is not programmed during earlyprintk - it is assumed + * that the previous boot loader has enabled required clocks and + * setup the baud rate generator hardware for us already. + */ + if (!port->uartclk) { + baud =3D uart_get_baud_rate(port, termios, old, 0, 115200); + goto done; + } + + for (i =3D 0; i < SCI_NUM_CLKS; i++) + max_freq =3D max(max_freq, s->clk_rates[i]); + + baud =3D uart_get_baud_rate(port, termios, old, 0, max_freq / min_sr(s)); + if (!baud) + goto done; + + /* Divided Functional Clock using standard Bit Rate Register */ + err =3D sci_scbrr_calc(s, baud, &brr1, &srr1, &cks1); + if (abs(err) < abs(min_err)) { + best_clk =3D SCI_FCK; + ccr0_val =3D 0; + min_err =3D err; + brr =3D brr1; + cks =3D cks1; + } + +done: + if (best_clk >=3D 0) + dev_dbg(port->dev, "Using clk %pC for %u%+d bps\n", + s->clks[best_clk], baud, min_err); =20 sci_port_enable(s); uart_port_lock_irqsave(port, &flags); =20 - /* For now, only RX enabling is supported */ - if (termios->c_cflag & CREAD) + uart_update_timeout(port, termios->c_cflag, baud); + + rsci_serial_out(port, CCR0, ccr0_val); + + ccr3_val |=3D CCR3_FM; + + rsci_serial_out(port, CCR3, ccr3_val); + + ccr2_val |=3D (cks << 20) | (brr << 8); + rsci_serial_out(port, CCR2, ccr2_val); + + rsci_serial_out(port, CCR1, ccr1_val); + + rsci_serial_out(port, CCR4, ccr4_val); + + ctrl =3D rsci_serial_in(port, FCR); + + ctrl |=3D (FCR_RFRST | FCR_TFRST); + rsci_serial_out(port, FCR, ctrl); + + if (s->rx_trigger > 1) + rsci_scif_set_rtrg(port, s->rx_trigger); + + port->status &=3D ~UPSTAT_AUTOCTS; + s->autorts =3D false; + + if ((port->flags & UPF_HARD_FLOW) && (termios->c_cflag & CRTSCTS)) { + port->status |=3D UPSTAT_AUTOCTS; + s->autorts =3D true; + } + + rsci_init_pins(port, termios->c_cflag); + rsci_serial_out(port, CFCLR, CFCLR_CLRFLAG); + + rsci_serial_out(port, FFCLR, FFCLR_DRC); + + ccr0_val |=3D CCR0_RE; + rsci_serial_out(port, CCR0, ccr0_val); + + if ((termios->c_cflag & CREAD) !=3D 0) rsci_start_rx(port); =20 uart_port_unlock_irqrestore(port, flags); sci_port_disable(s); + + if (UART_ENABLE_MS(port, termios->c_cflag)) + rsci_enable_ms(port); } =20 static int rsci_txfill(struct uart_port *port) @@ -181,13 +359,32 @@ static unsigned int rsci_tx_empty(struct uart_port *p= ort) =20 static void rsci_set_mctrl(struct uart_port *port, unsigned int mctrl) { - /* Not supported yet */ + if (mctrl & TIOCM_LOOP) { + /* Standard loopback mode */ + rsci_serial_out(port, CCR1, rsci_serial_in(port, CCR1) | CCR1_SPLP); + } } =20 static unsigned int rsci_get_mctrl(struct uart_port *port) { - /* Not supported yet */ - return 0; + struct sci_port *s =3D to_sci_port(port); + struct mctrl_gpios *gpios =3D s->gpios; + unsigned int mctrl =3D 0; + + mctrl_gpio_get(gpios, &mctrl); + + /* + * CTS/RTS is handled in hardware when supported, while nothing + * else is wired up. + */ + if (!mctrl_gpio_to_gpiod(gpios, UART_GPIO_CTS)) + mctrl |=3D TIOCM_CTS; + if (!mctrl_gpio_to_gpiod(gpios, UART_GPIO_DSR)) + mctrl |=3D TIOCM_DSR; + if (!mctrl_gpio_to_gpiod(gpios, UART_GPIO_DCD)) + mctrl |=3D TIOCM_CAR; + + return mctrl; } =20 static void rsci_start_tx(struct uart_port *port) @@ -346,6 +543,28 @@ static void rsci_receive_chars(struct uart_port *port) } } =20 +static void rsci_break_ctl(struct uart_port *port, int break_state) +{ + unsigned short ccr0_val, ccr1_val; + unsigned long flags; + + uart_port_lock_irqsave(port, &flags); + ccr1_val =3D rsci_serial_in(port, CCR1); + ccr0_val =3D rsci_serial_in(port, CCR0); + + if (break_state =3D=3D -1) { + ccr1_val =3D (ccr1_val | CCR1_SPB2IO) & ~CCR1_SPB2DT; + ccr0_val &=3D ~CCR0_TE; + } else { + ccr1_val =3D (ccr1_val | CCR1_SPB2DT) & ~CCR1_SPB2IO; + ccr0_val |=3D CCR0_TE; + } + + rsci_serial_out(port, CCR1, ccr1_val); + rsci_serial_out(port, CCR0, ccr0_val); + uart_port_unlock_irqrestore(port, flags); +} + static void rsci_poll_put_char(struct uart_port *port, unsigned char c) { u32 status; @@ -367,14 +586,30 @@ static void rsci_poll_put_char(struct uart_port *port= , unsigned char c) static void rsci_prepare_console_write(struct uart_port *port, u32 ctrl) { struct sci_port *s =3D to_sci_port(port); - u32 ctrl_temp =3D - s->params->param_bits->rxtx_enable | CCR0_TIE | - s->hscif_tot; + u32 ctrl_temp =3D s->params->param_bits->rxtx_enable; + + if (s->type =3D=3D SCI_PORT_RSCI) + ctrl_temp |=3D CCR0_TIE | s->hscif_tot; + rsci_serial_out(port, CCR0, ctrl_temp); } =20 +static void rsci_finish_console_write(struct uart_port *port, u32 ctrl) +{ + rsci_serial_out(port, CCR0, ctrl & ~CCR0_TE); + cpu_relax(); + rsci_serial_out(port, CCR0, ctrl); +} + static const char *rsci_type(struct uart_port *port) { + struct sci_port *s =3D to_sci_port(port); + + switch (s->type) { + case RSCI_PORT_SCIF: + return "scif"; + } + return "rsci"; } =20 @@ -414,6 +649,17 @@ static const struct sci_port_params rsci_port_params = =3D { .common_regs =3D &rsci_common_regs, }; =20 +static const struct sci_port_params rsci_rzg3e_scif_port_params =3D { + .fifosize =3D 32, + .overrun_reg =3D CSR, + .overrun_mask =3D CSR_ORER, + .sampling_rate_mask =3D SCI_SR(32), + .error_mask =3D RSCI_DEFAULT_ERROR_MASK, + .error_clear =3D RSCI_ERROR_CLEAR, + .param_bits =3D &rsci_port_param_bits, + .common_regs =3D &rsci_common_regs, +}; + static const struct uart_ops rsci_uart_ops =3D { .tx_empty =3D rsci_tx_empty, .set_mctrl =3D rsci_set_mctrl, @@ -421,6 +667,8 @@ static const struct uart_ops rsci_uart_ops =3D { .start_tx =3D rsci_start_tx, .stop_tx =3D rsci_stop_tx, .stop_rx =3D rsci_stop_rx, + .enable_ms =3D rsci_enable_ms, + .break_ctl =3D rsci_break_ctl, .startup =3D sci_startup, .shutdown =3D sci_shutdown, .set_termios =3D rsci_set_termios, @@ -440,6 +688,7 @@ static const struct sci_port_ops rsci_port_ops =3D { .receive_chars =3D rsci_receive_chars, .poll_put_char =3D rsci_poll_put_char, .prepare_console_write =3D rsci_prepare_console_write, + .finish_console_write =3D rsci_finish_console_write, .suspend_regs_size =3D rsci_suspend_regs_size, .shutdown_complete =3D rsci_shutdown_complete, }; @@ -451,6 +700,13 @@ struct sci_of_data of_sci_rsci_data =3D { .params =3D &rsci_port_params, }; =20 +struct sci_of_data of_rsci_scif_data =3D { + .type =3D RSCI_PORT_SCIF, + .ops =3D &rsci_port_ops, + .uart_ops =3D &rsci_uart_ops, + .params =3D &rsci_rzg3e_scif_port_params, +}; + #ifdef CONFIG_SERIAL_SH_SCI_EARLYCON =20 static int __init rsci_early_console_setup(struct earlycon_device *device, @@ -459,6 +715,13 @@ static int __init rsci_early_console_setup(struct earl= ycon_device *device, return scix_early_console_setup(device, &of_sci_rsci_data); } =20 +static int __init rsci_rzg3e_scif_early_console_setup(struct earlycon_devi= ce *device, + const char *opt) +{ + return scix_early_console_setup(device, &of_rsci_scif_data); +} + +OF_EARLYCON_DECLARE(rsci, "renesas,r9a09g047-rscif", rsci_rzg3e_scif_early= _console_setup); OF_EARLYCON_DECLARE(rsci, "renesas,r9a09g077-rsci", rsci_early_console_set= up); =20 #endif /* CONFIG_SERIAL_SH_SCI_EARLYCON */ diff --git a/drivers/tty/serial/rsci.h b/drivers/tty/serial/rsci.h index 2af3f28b465a..ba255f58c088 100644 --- a/drivers/tty/serial/rsci.h +++ b/drivers/tty/serial/rsci.h @@ -6,5 +6,6 @@ #include "sh-sci-common.h" =20 extern struct sci_of_data of_sci_rsci_data; +extern struct sci_of_data of_rsci_scif_data; =20 #endif /* __RSCI_H__ */ diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 7d1c8338f36c..379528c6725a 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -3403,7 +3403,7 @@ static void sci_remove(struct platform_device *dev) if (s->port.fifosize > 1) device_remove_file(&dev->dev, &dev_attr_rx_fifo_trigger); if (type =3D=3D PORT_SCIFA || type =3D=3D PORT_SCIFB || type =3D=3D PORT_= HSCIF || - type =3D=3D SCI_PORT_RSCI) + type =3D=3D SCI_PORT_RSCI || type =3D=3D RSCI_PORT_SCIF) device_remove_file(&dev->dev, &dev_attr_rx_fifo_timeout); } =20 @@ -3498,6 +3498,10 @@ static const struct of_device_id of_sci_match[] __ma= ybe_unused =3D { .data =3D &of_sci_scif_rzv2h, }, #ifdef CONFIG_SERIAL_RSCI + { + .compatible =3D "renesas,r9a09g047-rscif", + .data =3D &of_rsci_scif_data, + }, { .compatible =3D "renesas,r9a09g077-rsci", .data =3D &of_sci_rsci_data, @@ -3765,7 +3769,8 @@ static int sci_probe(struct platform_device *dev) return ret; } if (sp->type =3D=3D PORT_SCIFA || sp->type =3D=3D PORT_SCIFB || - sp->type =3D=3D PORT_HSCIF || sp->type =3D=3D SCI_PORT_RSCI) { + sp->type =3D=3D PORT_HSCIF || sp->type =3D=3D SCI_PORT_RSCI || + sp->type =3D=3D RSCI_PORT_SCIF) { ret =3D device_create_file(&dev->dev, &dev_attr_rx_fifo_timeout); if (ret) { if (sp->port.fifosize > 1) { --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 69B5730C37A; Mon, 27 Oct 2025 15:47:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580050; cv=none; b=pBMb3SKs7R/OGDQcsfGvMQmzjUwgStDCwzSxHAWmdTIYQGhjKye6HJ3QWrPXtmSvFqylo8hiceFnAow6tAJoJoFSXoxMHlYqYhUwDmOTPDJoqJZywh/Yh8bOb8Cgl5WttHM9jXTP1tNSNe5zNsbWGFKtsI6FBdBrqGhQz3tFqmc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Tue, 28 Oct 2025 00:47:23 +0900 (JST) From: Biju Das To: Greg Kroah-Hartman , Jiri Slaby Cc: Biju Das , Geert Uytterhoeven , Lad Prabhakar , Wolfram Sang , Claudiu Beznea , Nam Cao , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Biju Das , linux-renesas-soc@vger.kernel.org Subject: [PATCH 16/19] serial: sh-sci: Add support for RZ/G3E RSCI SCI Date: Mon, 27 Oct 2025 15:46:03 +0000 Message-ID: <20251027154615.115759-17-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for RZ/G3E RSCI SCI(a.k.a non FIFO mode). Signed-off-by: Biju Das --- drivers/tty/serial/rsci.c | 137 ++++++++++++++++++++++++++---------- drivers/tty/serial/rsci.h | 1 + drivers/tty/serial/sh-sci.c | 4 ++ 3 files changed, 103 insertions(+), 39 deletions(-) diff --git a/drivers/tty/serial/rsci.c b/drivers/tty/serial/rsci.c index 4c74251dc171..5901f9e55101 100644 --- a/drivers/tty/serial/rsci.c +++ b/drivers/tty/serial/rsci.c @@ -161,8 +161,12 @@ static void rsci_serial_out(struct uart_port *p, int o= ffset, int value) =20 static void rsci_clear_DRxC(struct uart_port *port) { + struct sci_port *s =3D to_sci_port(port); + rsci_serial_out(port, CFCLR, CFCLR_RDRFC); - rsci_serial_out(port, FFCLR, FFCLR_DRC); + + if (s->type !=3D RSCI_PORT_SCI) + rsci_serial_out(port, FFCLR, FFCLR_DRC); } =20 static void rsci_clear_SCxSR(struct uart_port *port, unsigned int mask) @@ -231,7 +235,6 @@ static void rsci_set_termios(struct uart_port *port, st= ruct ktermios *termios, unsigned long max_freq =3D 0; unsigned int baud, i; unsigned long flags; - unsigned int ctrl; int best_clk =3D -1; =20 if ((termios->c_cflag & CSIZE) =3D=3D CS7) { @@ -292,7 +295,10 @@ static void rsci_set_termios(struct uart_port *port, s= truct ktermios *termios, =20 rsci_serial_out(port, CCR0, ccr0_val); =20 - ccr3_val |=3D CCR3_FM; + if (s->type =3D=3D RSCI_PORT_SCI) + ccr3_val |=3D CCR3_RXDESEL; + else + ccr3_val |=3D CCR3_FM; =20 rsci_serial_out(port, CCR3, ccr3_val); =20 @@ -303,13 +309,15 @@ static void rsci_set_termios(struct uart_port *port, = struct ktermios *termios, =20 rsci_serial_out(port, CCR4, ccr4_val); =20 - ctrl =3D rsci_serial_in(port, FCR); + if (s->type !=3D RSCI_PORT_SCI) { + unsigned int ctrl =3D rsci_serial_in(port, FCR); =20 - ctrl |=3D (FCR_RFRST | FCR_TFRST); - rsci_serial_out(port, FCR, ctrl); + ctrl |=3D (FCR_RFRST | FCR_TFRST); + rsci_serial_out(port, FCR, ctrl); =20 - if (s->rx_trigger > 1) - rsci_scif_set_rtrg(port, s->rx_trigger); + if (s->rx_trigger > 1) + rsci_scif_set_rtrg(port, s->rx_trigger); + } =20 port->status &=3D ~UPSTAT_AUTOCTS; s->autorts =3D false; @@ -322,7 +330,8 @@ static void rsci_set_termios(struct uart_port *port, st= ruct ktermios *termios, rsci_init_pins(port, termios->c_cflag); rsci_serial_out(port, CFCLR, CFCLR_CLRFLAG); =20 - rsci_serial_out(port, FFCLR, FFCLR_DRC); + if (s->type !=3D RSCI_PORT_SCI) + rsci_serial_out(port, FFCLR, FFCLR_DRC); =20 ccr0_val |=3D CCR0_RE; rsci_serial_out(port, CCR0, ccr0_val); @@ -339,12 +348,23 @@ static void rsci_set_termios(struct uart_port *port, = struct ktermios *termios, =20 static int rsci_txfill(struct uart_port *port) { - return rsci_serial_in(port, FTSR); + struct sci_port *s =3D to_sci_port(port); + + if (s->type =3D=3D RSCI_PORT_SCI) + return !(rsci_serial_in(port, CSR) & CSR_TDRE); + else + return rsci_serial_in(port, FTSR); } =20 static int rsci_rxfill(struct uart_port *port) { - u32 val =3D rsci_serial_in(port, FRSR); + struct sci_port *s =3D to_sci_port(port); + u32 val; + + if (s->type =3D=3D RSCI_PORT_SCI) + return (rsci_serial_in(port, CSR) & CSR_RDRF) !=3D 0; + + val =3D rsci_serial_in(port, FRSR); =20 return FIELD_GET(FRSR_R5_0, val); } @@ -359,7 +379,9 @@ static unsigned int rsci_tx_empty(struct uart_port *por= t) =20 static void rsci_set_mctrl(struct uart_port *port, unsigned int mctrl) { - if (mctrl & TIOCM_LOOP) { + struct sci_port *s =3D to_sci_port(port); + + if ((mctrl & TIOCM_LOOP) && s->type !=3D RSCI_PORT_SCI) { /* Standard loopback mode */ rsci_serial_out(port, CCR1, rsci_serial_in(port, CCR1) | CCR1_SPLP); } @@ -478,12 +500,13 @@ static void rsci_transmit_chars(struct uart_port *por= t) static void rsci_receive_chars(struct uart_port *port) { struct tty_port *tport =3D &port->state->port; + struct sci_port *s =3D to_sci_port(port); u32 rdat, status, frsr_status =3D 0; int i, count, copied =3D 0; unsigned char flag; =20 status =3D rsci_serial_in(port, CSR); - frsr_status =3D rsci_serial_in(port, FRSR); + frsr_status =3D (s->type =3D=3D RSCI_PORT_SCI) ? 0 : rsci_serial_in(port,= FRSR); =20 if (!(status & CSR_RDRF) && !(frsr_status & FRSR_DR)) return; @@ -496,33 +519,42 @@ static void rsci_receive_chars(struct uart_port *port) if (count =3D=3D 0) break; =20 - for (i =3D 0; i < count; i++) { - char c; - - rdat =3D rsci_serial_in(port, RDR); - /* 9-bits data is not supported yet */ - c =3D rdat & RDR_RDAT_MSK; - - if (uart_handle_sysrq_char(port, c)) { - count--; - i--; - continue; - } - - /* Store data and status. - * Non FIFO mode is not supported - */ - if (rdat & RDR_FFER) { - flag =3D TTY_FRAME; - port->icount.frame++; - } else if (rdat & RDR_FPER) { - flag =3D TTY_PARITY; - port->icount.parity++; - } else { - flag =3D TTY_NORMAL; + if (s->type =3D=3D RSCI_PORT_SCI) { + char c =3D rsci_serial_in(port, RDR) & RDR_RDAT_MSK; + + if (uart_handle_sysrq_char(port, c)) + count =3D 0; + else + tty_insert_flip_char(tport, c, TTY_NORMAL); + } else { + for (i =3D 0; i < count; i++) { + char c; + + rdat =3D rsci_serial_in(port, RDR); + /* 9-bits data is not supported yet */ + c =3D rdat & RDR_RDAT_MSK; + + if (uart_handle_sysrq_char(port, c)) { + count--; + i--; + continue; + } + + /* Store data and status. + * Non FIFO mode is not supported + */ + if (rdat & RDR_FFER) { + flag =3D TTY_FRAME; + port->icount.frame++; + } else if (rdat & RDR_FPER) { + flag =3D TTY_PARITY; + port->icount.parity++; + } else { + flag =3D TTY_NORMAL; + } + + tty_insert_flip_char(tport, c, flag); } - - tty_insert_flip_char(tport, c, flag); } =20 rsci_serial_in(port, CSR); /* dummy read */ @@ -606,6 +638,8 @@ static const char *rsci_type(struct uart_port *port) struct sci_port *s =3D to_sci_port(port); =20 switch (s->type) { + case RSCI_PORT_SCI: + return "sci"; case RSCI_PORT_SCIF: return "scif"; } @@ -649,6 +683,17 @@ static const struct sci_port_params rsci_port_params = =3D { .common_regs =3D &rsci_common_regs, }; =20 +static const struct sci_port_params rsci_rzg3e_sci_port_params =3D { + .fifosize =3D 1, + .overrun_reg =3D CSR, + .overrun_mask =3D CSR_ORER, + .sampling_rate_mask =3D SCI_SR(32), + .error_mask =3D RSCI_DEFAULT_ERROR_MASK, + .error_clear =3D RSCI_ERROR_CLEAR, + .param_bits =3D &rsci_port_param_bits, + .common_regs =3D &rsci_common_regs, +}; + static const struct sci_port_params rsci_rzg3e_scif_port_params =3D { .fifosize =3D 32, .overrun_reg =3D CSR, @@ -700,6 +745,13 @@ struct sci_of_data of_sci_rsci_data =3D { .params =3D &rsci_port_params, }; =20 +struct sci_of_data of_rsci_sci_data =3D { + .type =3D RSCI_PORT_SCI, + .ops =3D &rsci_port_ops, + .uart_ops =3D &rsci_uart_ops, + .params =3D &rsci_rzg3e_sci_port_params, +}; + struct sci_of_data of_rsci_scif_data =3D { .type =3D RSCI_PORT_SCIF, .ops =3D &rsci_port_ops, @@ -715,12 +767,19 @@ static int __init rsci_early_console_setup(struct ear= lycon_device *device, return scix_early_console_setup(device, &of_sci_rsci_data); } =20 +static int __init rsci_rzg3e_sci_early_console_setup(struct earlycon_devic= e *device, + const char *opt) +{ + return scix_early_console_setup(device, &of_rsci_sci_data); +} + static int __init rsci_rzg3e_scif_early_console_setup(struct earlycon_devi= ce *device, const char *opt) { return scix_early_console_setup(device, &of_rsci_scif_data); } =20 +OF_EARLYCON_DECLARE(rsci, "renesas,r9a09g047-rsci", rsci_rzg3e_sci_early_c= onsole_setup); OF_EARLYCON_DECLARE(rsci, "renesas,r9a09g047-rscif", rsci_rzg3e_scif_early= _console_setup); OF_EARLYCON_DECLARE(rsci, "renesas,r9a09g077-rsci", rsci_early_console_set= up); =20 diff --git a/drivers/tty/serial/rsci.h b/drivers/tty/serial/rsci.h index ba255f58c088..df7a7edad7d4 100644 --- a/drivers/tty/serial/rsci.h +++ b/drivers/tty/serial/rsci.h @@ -6,6 +6,7 @@ #include "sh-sci-common.h" =20 extern struct sci_of_data of_sci_rsci_data; +extern struct sci_of_data of_rsci_sci_data; extern struct sci_of_data of_rsci_scif_data; =20 #endif /* __RSCI_H__ */ diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 379528c6725a..43c3e90f0a53 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -3498,6 +3498,10 @@ static const struct of_device_id of_sci_match[] __ma= ybe_unused =3D { .data =3D &of_sci_scif_rzv2h, }, #ifdef CONFIG_SERIAL_RSCI + { + .compatible =3D "renesas,r9a09g047-rsci", + .data =3D &of_rsci_sci_data, + }, { .compatible =3D "renesas,r9a09g047-rscif", .data =3D &of_rsci_scif_data, --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 02D2D322A22; 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dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: 9cWyhdx2QSKlSfxkwVjJww== X-CSE-MsgGUID: wjEZ2Go9Q6CKlcioPPDXBw== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 28 Oct 2025 00:47:30 +0900 Received: from localhost.localdomain (unknown [10.226.93.103]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 489A94003EA1; Tue, 28 Oct 2025 00:47:27 +0900 (JST) From: Biju Das To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Biju Das , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das Subject: [PATCH 17/19] arm64: dts: renesas: r9a09g047: Add RSCI nodes Date: Mon, 27 Oct 2025 15:46:04 +0000 Message-ID: <20251027154615.115759-18-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add RSCI nodes to RZ/G3E ("R9A09G047") SoC DTSI. Signed-off-by: Biju Das --- arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 190 +++++++++++++++++++++ 1 file changed, 190 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g047.dtsi index 7a469de3bb62..2cc950d99bd3 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi @@ -823,6 +823,196 @@ i2c8: i2c@11c01000 { status =3D "disabled"; }; =20 + rsci0: serial@12800c00 { + compatible =3D "renesas,r9a09g047-rscif"; + reg =3D <0 0x12800c00 0 0x400>; + interrupts =3D , + , + , + ; + interrupt-names =3D "eri", "rxi", "txi", "tei"; + clocks =3D <&cpg CPG_MOD 93>, <&cpg CPG_MOD 94>, + <&cpg CPG_MOD 95>, <&cpg CPG_MOD 96>, + <&cpg CPG_MOD 97>; + clock-names =3D "bus", "tclk", "tclk_div64", + "tclk_div16", "tclk_div4"; + power-domains =3D <&cpg>; + resets =3D <&cpg 129>, <&cpg 130>; + reset-names =3D "presetn", "tresetn"; + status =3D "disabled"; + }; + + rsci1: serial@12801000 { + compatible =3D "renesas,r9a09g047-rscif"; + reg =3D <0 0x12801000 0 0x400>; + interrupts =3D , + , + , + ; + interrupt-names =3D "eri", "rxi", "txi", "tei"; + clocks =3D <&cpg CPG_MOD 98>, <&cpg CPG_MOD 99>, + <&cpg CPG_MOD 100>, <&cpg CPG_MOD 101>, + <&cpg CPG_MOD 102>; + clock-names =3D "bus", "tclk", "tclk_div64", + "tclk_div16", "tclk_div4"; + power-domains =3D <&cpg>; + resets =3D <&cpg 131>, <&cpg 132>; + reset-names =3D "presetn", "tresetn"; + status =3D "disabled"; + }; + + rsci2: serial@12801400 { + compatible =3D "renesas,r9a09g047-rscif"; + reg =3D <0 0x12801400 0 0x400>; + interrupts =3D , + , + , + ; + interrupt-names =3D "eri", "rxi", "txi", "tei"; + clocks =3D <&cpg CPG_MOD 103>, <&cpg CPG_MOD 104>, + <&cpg CPG_MOD 105>, <&cpg CPG_MOD 106>, + <&cpg CPG_MOD 107>; + clock-names =3D "bus", "tclk", "tclk_div64", + "tclk_div16", "tclk_div4"; + power-domains =3D <&cpg>; + resets =3D <&cpg 133>, <&cpg 134>; + reset-names =3D "presetn", "tresetn"; + status =3D "disabled"; + }; + + rsci3: serial@12801800 { + compatible =3D "renesas,r9a09g047-rscif"; + reg =3D <0 0x12801800 0 0x400>; + interrupts =3D , + , + , + ; + interrupt-names =3D "eri", "rxi", "txi", "tei"; + clocks =3D <&cpg CPG_MOD 108>, <&cpg CPG_MOD 109>, + <&cpg CPG_MOD 110>, <&cpg CPG_MOD 111>, + <&cpg CPG_MOD 112>; + clock-names =3D "bus", "tclk", "tclk_div64", + "tclk_div16", "tclk_div4"; + power-domains =3D <&cpg>; + resets =3D <&cpg 135>, <&cpg 136>; + reset-names =3D "presetn", "tresetn"; + status =3D "disabled"; + }; + + rsci4: serial@12801c00 { + compatible =3D "renesas,r9a09g047-rscif"; + reg =3D <0 0x12801c00 0 0x400>; + interrupts =3D , + , + , + ; + interrupt-names =3D "eri", "rxi", "txi", "tei"; + clocks =3D <&cpg CPG_MOD 113>, <&cpg CPG_MOD 114>, + <&cpg CPG_MOD 115>, <&cpg CPG_MOD 116>, + <&cpg CPG_MOD 117>; + clock-names =3D "bus", "tclk", "tclk_div64", + "tclk_div16", "tclk_div4"; + power-domains =3D <&cpg>; + resets =3D <&cpg 137>, <&cpg 138>; + reset-names =3D "presetn", "tresetn"; + status =3D "disabled"; + }; + + rsci5: serial@12802000 { + compatible =3D "renesas,r9a09g047-rscif"; + reg =3D <0 0x12802000 0 0x400>; + interrupts =3D , + , + , + ; + interrupt-names =3D "eri", "rxi", "txi", "tei"; + clocks =3D <&cpg CPG_MOD 118>, <&cpg CPG_MOD 119>, + <&cpg CPG_MOD 120>, <&cpg CPG_MOD 121>, + <&cpg CPG_MOD 122>; + clock-names =3D "bus", "tclk", "tclk_div64", + "tclk_div16", "tclk_div4"; + power-domains =3D <&cpg>; + resets =3D <&cpg 139>, <&cpg 140>; + reset-names =3D "presetn", "tresetn"; + status =3D "disabled"; + }; + + rsci6: serial@12802400 { + compatible =3D "renesas,r9a09g047-rscif"; + reg =3D <0 0x12802400 0 0x400>; + interrupts =3D , + , + , + ; + interrupt-names =3D "eri", "rxi", "txi", "tei"; + clocks =3D <&cpg CPG_MOD 123>, <&cpg CPG_MOD 124>, + <&cpg CPG_MOD 125>, <&cpg CPG_MOD 126>, + <&cpg CPG_MOD 127>; + clock-names =3D "bus", "tclk", "tclk_div64", + "tclk_div16", "tclk_div4"; + power-domains =3D <&cpg>; + resets =3D <&cpg 141>, <&cpg 142>; + reset-names =3D "presetn", "tresetn"; + status =3D "disabled"; + }; + + rsci7: serial@12802800 { + compatible =3D "renesas,r9a09g047-rscif"; + reg =3D <0 0x12802800 0 0x400>; + interrupts =3D , + , + , + ; + interrupt-names =3D "eri", "rxi", "txi", "tei"; + clocks =3D <&cpg CPG_MOD 128>, <&cpg CPG_MOD 129>, + <&cpg CPG_MOD 130>, <&cpg CPG_MOD 131>, + <&cpg CPG_MOD 132>; + clock-names =3D "bus", "tclk", "tclk_div64", + "tclk_div16", "tclk_div4"; + power-domains =3D <&cpg>; + resets =3D <&cpg 143>, <&cpg 144>; + reset-names =3D "presetn", "tresetn"; + status =3D "disabled"; + }; + + rsci8: serial@12802c00 { + compatible =3D "renesas,r9a09g047-rscif"; + reg =3D <0 0x12802c00 0 0x400>; + interrupts =3D , + , + , + ; + interrupt-names =3D "eri", "rxi", "txi", "tei"; + clocks =3D <&cpg CPG_MOD 133>, <&cpg CPG_MOD 134>, + <&cpg CPG_MOD 135>, <&cpg CPG_MOD 136>, + <&cpg CPG_MOD 137>; + clock-names =3D "bus", "tclk", "tclk_div64", + "tclk_div16", "tclk_div4"; + power-domains =3D <&cpg>; + resets =3D <&cpg 145>, <&cpg 146>; + reset-names =3D "presetn", "tresetn"; + status =3D "disabled"; + }; + + rsci9: serial@12803000 { + compatible =3D "renesas,r9a09g047-rscif"; + reg =3D <0 0x12803000 0 0x400>; + interrupts =3D , + , + , + ; + interrupt-names =3D "eri", "rxi", "txi", "tei"; + clocks =3D <&cpg CPG_MOD 138>, <&cpg CPG_MOD 139>, + <&cpg CPG_MOD 140>, <&cpg CPG_MOD 141>, + <&cpg CPG_MOD 142>; + clock-names =3D "bus", "tclk", "tclk_div64", + "tclk_div16", "tclk_div4"; + power-domains =3D <&cpg>; + resets =3D <&cpg 147>, <&cpg 148>; + reset-names =3D "presetn", "tresetn"; + status =3D "disabled"; + }; + gpu: gpu@14850000 { compatible =3D "renesas,r9a09g047-mali", "arm,mali-bifrost"; --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2D06F324B17; Mon, 27 Oct 2025 15:47:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580057; cv=none; b=hZl3nOvrquE7fX6bd//yYnwcBriv8y8bAo75JEmRg0HNN/LowTwrfzrbnBzxLzxDy4gajVjBECtqT2LN89xuvJ+PvRdSDQMc/bdR9DKoEBWc6eX53G27IWVr04j0scJkyIflKUz06MxusbV65tzfiGNNXpBi+E6EDb1Tuc8HSJY= ARC-Message-Signature: i=1; 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Tue, 28 Oct 2025 00:47:30 +0900 (JST) From: Biju Das To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Biju Das , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das Subject: [PATCH 18/19] arm64: dts: renesas: renesas-smarc2: Move aliases to board DTS Date: Mon, 27 Oct 2025 15:46:05 +0000 Message-ID: <20251027154615.115759-19-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" SMARC2 board dtsi is common for multiple SoCs. So Move aliases to board DTS as SoC may have different IPs for a given alias. eg: RZ/G3S does not have RSCI interface. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts | 6 ++++++ arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi | 6 ------ 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts b/arch/arm6= 4/boot/dts/renesas/r9a09g047e57-smarc.dts index 08e814c03fa8..12cd488f5dfa 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts @@ -36,6 +36,12 @@ / { compatible =3D "renesas,smarc2-evk", "renesas,rzg3e-smarcm", "renesas,r9a09g047e57", "renesas,r9a09g047"; =20 + aliases { + i2c0 =3D &i2c0; + serial3 =3D &scif0; + mmc1 =3D &sdhi1; + }; + vqmmc_sd1_pvdd: regulator-vqmmc-sd1-pvdd { compatible =3D "regulator-gpio"; regulator-name =3D "SD1_PVDD"; diff --git a/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi b/arch/arm64/b= oot/dts/renesas/renesas-smarc2.dtsi index 58561da3007a..a296c2c1c7ab 100644 --- a/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi +++ b/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi @@ -37,12 +37,6 @@ chosen { stdout-path =3D "serial3:115200n8"; }; =20 - aliases { - i2c0 =3D &i2c0; - serial3 =3D &scif0; - mmc1 =3D &sdhi1; - }; - can_transceiver0: can-phy0 { compatible =3D "ti,tcan1042"; #phy-cells =3D <0>; --=20 2.43.0 From nobody Mon Feb 9 01:35:01 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E23D230EF90; Mon, 27 Oct 2025 15:47:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580060; cv=none; b=DaVpajw6pl4FjMgImLbkatFjLIKY31bVg8t6tsDQot9nPdrGXgJNECw+ZVOwggjUyZAapZnPpECunW8YMNzzQOkAEDdKUt6UCVdHLgExSXyJZ7lqb4BgYv6X7DEYakYe2PgY9DCegrbT2T8Q9fLw4J6zl2bnz0b+nzqnJK9OhAQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761580060; c=relaxed/simple; bh=mGUciF3i4HcZ9+i4FTS11qFbyqz1m1Y2M7eeaaypznk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rxy2BJyoGlJF6tGwuWP5y3ki6UNbLOxLcmwjvoVYP2YLDEk4rFRk3cySpRbmA21UF7N+YFClsEyQ3kNWakpqOPpuQ0fO2c4CDBHQU8+C2Ou1HxbyHnW+IpRfFB764EZj1F1ZUfg/tT9y72XdAyr094vGRdBzZph4NMFSdJb3Vhk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: vsWKUWx0QWKb8+Q5uTh5+g== X-CSE-MsgGUID: 3dnCNAGhSP6s5dIbzapN/A== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 28 Oct 2025 00:47:37 +0900 Received: from localhost.localdomain (unknown [10.226.93.103]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id ACEB5400A67C; Tue, 28 Oct 2025 00:47:34 +0900 (JST) From: Biju Das To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Biju Das , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das Subject: [PATCH 19/19] arm64: dts: renesas: renesas-smarc2: Enable rsci{2,4,9} nodes Date: Mon, 27 Oct 2025 15:46:06 +0000 Message-ID: <20251027154615.115759-20-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> References: <20251027154615.115759-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Enable device rsci{2,4,9} nodes for the RZ SMARC Carrier-II Board. Signed-off-by: Biju Das --- .../boot/dts/renesas/r9a09g047e57-smarc.dts | 40 +++++++++++++++++++ .../boot/dts/renesas/renesas-smarc2.dtsi | 12 ++++++ 2 files changed, 52 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts b/arch/arm6= 4/boot/dts/renesas/r9a09g047e57-smarc.dts index 12cd488f5dfa..301eb6d47861 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts @@ -38,6 +38,9 @@ / { =20 aliases { i2c0 =3D &i2c0; + serial0 =3D &rsci4; + serial1 =3D &rsci9; + serial2 =3D &rsci2; serial3 =3D &scif0; mmc1 =3D &sdhi1; }; @@ -141,6 +144,26 @@ nmi_pins: nmi { input-schmitt-enable; }; =20 + rsci2_pins: rsci2 { + pinmux =3D , /* SER2_TX */ + , /* SER2_RX */ + , /* SER2_CTS# */ + ; /* SER2_RTS# */ + bias-pull-up; + }; + + rsci4_pins: rsci4 { + pinmux =3D , /* SER0_TX */ + ; /* SER0_RX */ + bias-pull-up; + }; + + rsci9_pins: rsci9 { + pinmux =3D , /* SER1_TX */ + ; /* SER1_RX */ + bias-pull-up; + }; + scif_pins: scif { pins =3D "SCIF_TXD", "SCIF_RXD"; renesas,output-impedance =3D <1>; @@ -172,6 +195,23 @@ sd1-data { }; }; =20 +&rsci2 { + pinctrl-0 =3D <&rsci2_pins>; + pinctrl-names =3D "default"; + + uart-has-rtscts; +}; + +&rsci4 { + pinctrl-0 =3D <&rsci4_pins>; + pinctrl-names =3D "default"; +}; + +&rsci9 { + pinctrl-0 =3D <&rsci9_pins>; + pinctrl-names =3D "default"; +}; + &scif0 { pinctrl-0 =3D <&scif_pins>; pinctrl-names =3D "default"; diff --git a/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi b/arch/arm64/b= oot/dts/renesas/renesas-smarc2.dtsi index a296c2c1c7ab..305215cdaeb3 100644 --- a/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi +++ b/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi @@ -89,6 +89,18 @@ &i2c0 { clock-frequency =3D <400000>; }; =20 +&rsci2 { + status =3D "okay"; +}; + +&rsci4 { + status =3D "okay"; +}; + +&rsci9 { + status =3D "okay"; +}; + &scif0 { status =3D "okay"; }; --=20 2.43.0