[PATCH 0/3] x86: Fix kexec 5-level to 4-level paging transition

Usama Arif posted 3 patches 3 months, 2 weeks ago
There is a newer version of this series
arch/x86/boot/compressed/pgtable_64.c   | 8 +++++---
arch/x86/include/asm/pgtable_types.h    | 4 ++--
drivers/firmware/efi/libstub/x86-5lvl.c | 5 ++++-
3 files changed, 11 insertions(+), 6 deletions(-)
[PATCH 0/3] x86: Fix kexec 5-level to 4-level paging transition
Posted by Usama Arif 3 months, 2 weeks ago
This series addresses critical bugs in the kexec path when transitioning
from a kernel using 5-level page tables to one using 4-level page tables.

The root cause is improper handling of PGD entry value during the page level
transition. Specifically p4d value is masked with PAGE_MASK instead of
PTE_PFN_MASK, failing to account for high-order software bits like
_PAGE_BIT_NOPTISHADOW (bit 58).

When bit 58 (_PAGE_BIT_NOPTISHADOW) is set in the source kernel, the target
4-level kernel doesn't recognize it and fails to mask it properly, leading
to kexec failure.

This series fixes the issue in three parts:

Patch 1: Fixes the x86 boot compressed code path by replacing direct CR3
dereferencing with read_cr3_pa() and using PTE_PFN_MASK instead
of PAGE_MASK.

Patch 2: Applies the same fix to the EFI stub code path. (Done in a
separate patch as Fixes tag is different).

Patch 3: Moves _PAGE_BIT_NOPTISHADOW from bit 58 (_PAGE_BIT_SOFTW5) to
bit 9 (_PAGE_BIT_SOFTW1), which is already properly masked by
older kernels. This provides backward compatibility without
requiring patches 1 and 2 to be applied to all existing kernel versions,
which is not feasible for production systems or live patching.

Co-developed-by: Kiryl Shutsemau <kas@kernel.org>
Signed-off-by: Kiryl Shutsemau <kas@kernel.org>
Signed-off-by: Usama Arif <usamaarif642@gmail.com>
Reported-by: Michael van der Westhuizen <rmikey@meta.com>
Reported-by: Tobias Fleig <tfleig@meta.com>

The patches are based on aaa9c3550b60d6259d6ea8b1175ade8d1242444e (next-20251022)
 
Usama Arif (3):
  x86/boot: Fix page table access in 5-level to 4-level paging
    transition
  efi/libstub: Fix page table access in 5-level to 4-level paging
    transition
  x86/mm: Move _PAGE_BIT_NOPTISHADOW from bit 58 to bit 9

 arch/x86/boot/compressed/pgtable_64.c   | 8 +++++---
 arch/x86/include/asm/pgtable_types.h    | 4 ++--
 drivers/firmware/efi/libstub/x86-5lvl.c | 5 ++++-
 3 files changed, 11 insertions(+), 6 deletions(-)

-- 
2.47.3
Re: [PATCH 0/3] x86: Fix kexec 5-level to 4-level paging transition
Posted by Usama Arif 3 months, 2 weeks ago

On 22/10/2025 23:06, Usama Arif wrote:
> This series addresses critical bugs in the kexec path when transitioning
> from a kernel using 5-level page tables to one using 4-level page tables.
> 
> The root cause is improper handling of PGD entry value during the page level
> transition. Specifically p4d value is masked with PAGE_MASK instead of
> PTE_PFN_MASK, failing to account for high-order software bits like
> _PAGE_BIT_NOPTISHADOW (bit 58).

s/p4d value/PGD entry value/ for consistency.