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[PATCH v5 1/3] dt-bindings: interrupt-controller: aspeed,ast2700: Add support for INTC hierarchy

Ryan Chen posted 3 patches 3 months, 2 weeks ago
[PATCH v5 1/3] dt-bindings: interrupt-controller: aspeed,ast2700: Add support for INTC hierarchy
Posted by Ryan Chen 3 months, 2 weeks ago 
AST2700 contains two-level interrupt controllers (INTC0 and INTC1),
each with its own register space and handling different sets of
peripherals.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
---
 .../aspeed,ast2700-intc0.yaml                 | 97 +++++++++++++++++++
 .../aspeed,ast2700-intc1.yaml                 | 94 ++++++++++++++++++
 2 files changed, 191 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc0.yaml
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc1.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc0.yaml b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc0.yaml
new file mode 100644
index 000000000000..93a5b142b0a2
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc0.yaml
@@ -0,0 +1,97 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc0.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+maintainers:
+  - Ryan Chen <ryan_chen@aspeedtech.com>
+
+title: ASPEED AST2700 Interrupt Controller 0
+
+description:
+  This interrupt controller hardware is first level interrupt controller that
+  is hooked to the GIC interrupt controller. It's useful to combine multiple
+  interrupt sources into 1 interrupt to GIC interrupt controller.
+
+properties:
+  compatible:
+    const: aspeed,ast2700-intc0
+
+  reg:
+    maxItems: 1
+
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 1
+
+  ranges: true
+
+patternProperties:
+  "^interrupt-controller@":
+    type: object
+    description: A child interrupt controller node
+    additionalProperties: false
+
+    properties:
+      compatible:
+        enum:
+          - aspeed,ast2700-intc0-ic
+
+      reg:
+        maxItems: 1
+
+      '#interrupt-cells':
+        const: 1
+
+      interrupt-controller: true
+
+      interrupts:
+        minItems: 1
+        maxItems: 10
+
+    required:
+      - compatible
+      - reg
+      - interrupt-controller
+      - '#interrupt-cells'
+      - interrupts
+
+required:
+  - compatible
+  - reg
+  - '#address-cells'
+  - '#size-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    intc0: interrupt-controller@12100000 {
+        compatible = "aspeed,ast2700-intc0";
+        reg = <0x12100000 0x4000>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges = <0x0 0x12100000 0x4000>;
+
+        intc0_11: interrupt-controller@1b00 {
+            #interrupt-cells = <1>;
+            interrupt-controller;
+            compatible = "aspeed,ast2700-intc0-ic";
+            reg = <0x1b00 0x10>;
+            interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
+                         <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>,
+                         <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>,
+                         <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>,
+                         <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
+                         <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
+                         <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+                         <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
+                         <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
+                         <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
+        };
+    };
\ No newline at end of file
diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc1.yaml b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc1.yaml
new file mode 100644
index 000000000000..2f807d074211
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc1.yaml
@@ -0,0 +1,94 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc1.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+maintainers:
+  - Ryan Chen <ryan_chen@aspeedtech.com>
+
+title: ASPEED AST2700 Interrupt Controller 1
+
+description:
+  This interrupt controller hardware is second level interrupt controller that
+  is hooked to a parent interrupt controller. It's useful to combine multiple
+  interrupt sources into 1 interrupt to parent interrupt controller.
+
+properties:
+  compatible:
+    const: aspeed,ast2700-intc1
+
+  reg:
+    maxItems: 1
+
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 1
+
+  ranges: true
+
+patternProperties:
+  "^interrupt-controller@":
+    type: object
+    description: A child interrupt controller node
+    additionalProperties: false
+
+    properties:
+      compatible:
+        enum:
+          - aspeed,ast2700-intc1-ic
+
+      reg:
+        maxItems: 1
+
+      '#interrupt-cells':
+        const: 1
+
+      interrupt-controller: true
+
+      interrupts-extended:
+        minItems: 1
+        maxItems: 1
+
+    required:
+      - compatible
+      - reg
+      - interrupt-controller
+      - '#interrupt-cells'
+      - interrupts-extended
+
+required:
+  - compatible
+  - reg
+  - '#address-cells'
+  - '#size-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    intc1: interrupt-controller@14c18000 {
+        compatible = "aspeed,ast2700-intc1";
+        reg = <0x14c18000 0x400>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges = <0x0 0x14c18000 0x400>;
+
+        intc1_0: interrupt-controller@100 {
+            compatible = "aspeed,ast2700-intc1-ic";
+            reg = <0x100 0x10>;
+            #interrupt-cells = <1>;
+            interrupt-controller;
+            interrupts-extended = <&intc0_11 0>;
+        };
+
+        intc1_1: interrupt-controller@110 {
+            compatible = "aspeed,ast2700-intc1-ic";
+            reg = <0x110 0x10>;
+            #interrupt-cells = <1>;
+            interrupt-controller;
+            interrupts-extended = <&intc0_11 1>;
+        };
+    };
\ No newline at end of file
-- 
2.34.1
Re: [PATCH v5 1/3] dt-bindings: interrupt-controller: aspeed,ast2700: Add support for INTC hierarchy
Posted by Rob Herring 3 months, 2 weeks ago 
On Wed, Oct 22, 2025 at 02:55:05PM +0800, Ryan Chen wrote:
> AST2700 contains two-level interrupt controllers (INTC0 and INTC1),
> each with its own register space and handling different sets of
> peripherals.

This is a mess!

How does this relate to the existing "aspeed,ast2700-intc-ic"? Its 
schema has a block diagram of connections which I can understand. This 
does not.

The use of child nodes here is questionable. A variable number of 
interrupt banks is not a reason to have child nodes. I'm only guessing 
that's what's happening here because you haven't explained it.

> 
> Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
> ---
>  .../aspeed,ast2700-intc0.yaml                 | 97 +++++++++++++++++++
>  .../aspeed,ast2700-intc1.yaml                 | 94 ++++++++++++++++++
>  2 files changed, 191 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc0.yaml
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc1.yaml
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc0.yaml b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc0.yaml
> new file mode 100644
> index 000000000000..93a5b142b0a2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc0.yaml
> @@ -0,0 +1,97 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc0.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +maintainers:
> +  - Ryan Chen <ryan_chen@aspeedtech.com>
> +
> +title: ASPEED AST2700 Interrupt Controller 0
> +
> +description:
> +  This interrupt controller hardware is first level interrupt controller that
> +  is hooked to the GIC interrupt controller. It's useful to combine multiple
> +  interrupt sources into 1 interrupt to GIC interrupt controller.
> +
> +properties:
> +  compatible:
> +    const: aspeed,ast2700-intc0
> +
> +  reg:
> +    maxItems: 1
> +
> +  '#address-cells':
> +    const: 1
> +
> +  '#size-cells':
> +    const: 1
> +
> +  ranges: true
> +
> +patternProperties:
> +  "^interrupt-controller@":
> +    type: object
> +    description: A child interrupt controller node
> +    additionalProperties: false
> +
> +    properties:
> +      compatible:
> +        enum:
> +          - aspeed,ast2700-intc0-ic
> +
> +      reg:
> +        maxItems: 1
> +
> +      '#interrupt-cells':
> +        const: 1
> +
> +      interrupt-controller: true
> +
> +      interrupts:
> +        minItems: 1
> +        maxItems: 10

What are the 10 different interrupts? You have to define what each one 
is.

> +
> +    required:
> +      - compatible
> +      - reg
> +      - interrupt-controller
> +      - '#interrupt-cells'
> +      - interrupts
> +
> +required:
> +  - compatible
> +  - reg
> +  - '#address-cells'
> +  - '#size-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +    intc0: interrupt-controller@12100000 {

This node is not an interrupt-controller.

> +        compatible = "aspeed,ast2700-intc0";
> +        reg = <0x12100000 0x4000>;
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +        ranges = <0x0 0x12100000 0x4000>;
> +
> +        intc0_11: interrupt-controller@1b00 {
> +            #interrupt-cells = <1>;
> +            interrupt-controller;
> +            compatible = "aspeed,ast2700-intc0-ic";
> +            reg = <0x1b00 0x10>;
> +            interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
> +                         <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>,
> +                         <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>,
> +                         <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>,
> +                         <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
> +                         <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
> +                         <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
> +                         <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
> +                         <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
> +                         <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
> +        };
> +    };
> \ No newline at end of file

Fix.

> diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc1.yaml b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc1.yaml
> new file mode 100644
> index 000000000000..2f807d074211
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc1.yaml
> @@ -0,0 +1,94 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc1.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +maintainers:
> +  - Ryan Chen <ryan_chen@aspeedtech.com>
> +
> +title: ASPEED AST2700 Interrupt Controller 1
> +
> +description:
> +  This interrupt controller hardware is second level interrupt controller that
> +  is hooked to a parent interrupt controller. It's useful to combine multiple
> +  interrupt sources into 1 interrupt to parent interrupt controller.
> +
> +properties:
> +  compatible:
> +    const: aspeed,ast2700-intc1
> +
> +  reg:
> +    maxItems: 1
> +
> +  '#address-cells':
> +    const: 1
> +
> +  '#size-cells':
> +    const: 1
> +
> +  ranges: true
> +
> +patternProperties:
> +  "^interrupt-controller@":
> +    type: object
> +    description: A child interrupt controller node
> +    additionalProperties: false
> +
> +    properties:
> +      compatible:
> +        enum:
> +          - aspeed,ast2700-intc1-ic
> +
> +      reg:
> +        maxItems: 1
> +
> +      '#interrupt-cells':
> +        const: 1
> +
> +      interrupt-controller: true
> +
> +      interrupts-extended:
> +        minItems: 1
> +        maxItems: 1
> +
> +    required:
> +      - compatible
> +      - reg
> +      - interrupt-controller
> +      - '#interrupt-cells'
> +      - interrupts-extended
> +
> +required:
> +  - compatible
> +  - reg
> +  - '#address-cells'
> +  - '#size-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    intc1: interrupt-controller@14c18000 {
> +        compatible = "aspeed,ast2700-intc1";
> +        reg = <0x14c18000 0x400>;
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +        ranges = <0x0 0x14c18000 0x400>;
> +
> +        intc1_0: interrupt-controller@100 {
> +            compatible = "aspeed,ast2700-intc1-ic";
> +            reg = <0x100 0x10>;
> +            #interrupt-cells = <1>;
> +            interrupt-controller;
> +            interrupts-extended = <&intc0_11 0>;
> +        };
> +
> +        intc1_1: interrupt-controller@110 {
> +            compatible = "aspeed,ast2700-intc1-ic";
> +            reg = <0x110 0x10>;
> +            #interrupt-cells = <1>;
> +            interrupt-controller;
> +            interrupts-extended = <&intc0_11 1>;
> +        };
> +    };
> \ No newline at end of file
> -- 
> 2.34.1
>
Re: [PATCH v5 1/3] dt-bindings: interrupt-controller: aspeed,ast2700: Add support for INTC hierarchy
Posted by Rob Herring (Arm) 3 months, 2 weeks ago 
On Wed, 22 Oct 2025 14:55:05 +0800, Ryan Chen wrote:
> AST2700 contains two-level interrupt controllers (INTC0 and INTC1),
> each with its own register space and handling different sets of
> peripherals.
> 
> Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
> ---
>  .../aspeed,ast2700-intc0.yaml                 | 97 +++++++++++++++++++
>  .../aspeed,ast2700-intc1.yaml                 | 94 ++++++++++++++++++
>  2 files changed, 191 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc0.yaml
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc1.yaml
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:
./Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc1.yaml:94:7: [error] no new line character at the end of file (new-line-at-end-of-file)
./Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc0.yaml:97:7: [error] no new line character at the end of file (new-line-at-end-of-file)

dtschema/dtc warnings/errors:

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20251022065507.1152071-2-ryan_chen@aspeedtech.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

Patchew 2.1-devel-b67e4c2

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