Some bits in SCTLR2_EL1 that control system behavior can be
configured on a per-task basis (e.g., fields related to FEAT_CPA2).
To support future use of these fields, SCTLR2_EL1 is maintained
per task.
On platforms without FEAT_SCTLR2 support, there is no functional
change and only minimal performance overhead.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
---
arch/arm64/include/asm/processor.h | 3 +++
arch/arm64/kernel/process.c | 9 +++++++++
2 files changed, 12 insertions(+)
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index 61d62bfd5a7b..e066116735c6 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -184,6 +184,7 @@ struct thread_struct {
u64 mte_ctrl;
#endif
u64 sctlr_user;
+ u64 sctlr2_user;
u64 svcr;
u64 tpidr2_el0;
u64 por_el0;
@@ -258,6 +259,8 @@ static inline void task_set_sve_vl_onexec(struct task_struct *task,
(SCTLR_ELx_ENIA | SCTLR_ELx_ENIB | SCTLR_ELx_ENDA | SCTLR_ELx_ENDB | \
SCTLR_EL1_TCF0_MASK)
+#define SCTLR2_USER_MASK (0)
+
static inline void arch_thread_struct_whitelist(unsigned long *offset,
unsigned long *size)
{
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index 96482a1412c6..e54f192c0629 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -698,6 +698,11 @@ void update_sctlr_el1(u64 sctlr)
isb();
}
+static void update_sctlr2_el1(u64 sctlr2)
+{
+ sysreg_clear_set_s(SYS_SCTLR2_EL1, SCTLR2_USER_MASK, sctlr2);
+}
+
/*
* Thread switching.
*/
@@ -737,6 +742,10 @@ struct task_struct *__switch_to(struct task_struct *prev,
if (prev->thread.sctlr_user != next->thread.sctlr_user)
update_sctlr_el1(next->thread.sctlr_user);
+ if (alternative_has_cap_unlikely(ARM64_HAS_SCTLR2) &&
+ prev->thread.sctlr2_user != next->thread.sctlr2_user)
+ update_sctlr2_el1(next->thread.sctlr2_user);
+
/* the actual thread switch */
last = cpu_switch_to(prev, next);
--
LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}