From nobody Thu Oct 2 12:05:12 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id D2A9533AEB7; Wed, 17 Sep 2025 14:56:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758121005; cv=none; b=SGNaDkVBzM9fpYBo9iPGmuaYP4/8IVddHVu151hzOb03Tu7G24q2IgW/z6QRDVJbw878hXmCXzKbe/NmNqG6XbGAIe6Xixlzk1m+efPmDffBOLZ/WLLdkOnMg0yub+7y+VzdfjUzBl/52nCtghEnKWQ3tzcqxA6WTd0LTCmtAVM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758121005; c=relaxed/simple; bh=jpG4OioajyvO9e69rzujynWFs3I89Xv/VGW/yDdnHLY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=JSE3VGRDHrmi9dK2bL/CY+d38VjER+UBF11H3kjBEcuNeYcmeGXTfpY2EU7/ZPzo0PKnk3jCvFarABb8htlbcwIsqfcLnYzzNwIlh/Fi0kgpBzG/lRkaVzSqxa0A8sK7boCah/IZAuXXy62Sqbmq39Vx2T48qaXHrq6DjfDlJ/0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1A134267F; Wed, 17 Sep 2025 07:56:35 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C6D8D3F66E; Wed, 17 Sep 2025 07:56:39 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, will@kernel.org, broonie@kernel.org, oliver.upton@linux.dev, anshuman.khandual@arm.com, robh@kernel.org, james.morse@arm.com, mark.rutland@arm.com, joey.gouly@arm.com, Dave.Martin@arm.com, ahmed.genidi@arm.com, kevin.brodsky@arm.com, scott@os.amperecomputing.com, mbenes@suse.cz, james.clark@linaro.org, frederic@kernel.org, rafael@kernel.org, pavel@kernel.org, ryan.roberts@arm.com, suzuki.poulose@arm.com, maz@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, kvmarm@lists.linux.dev, Yeoreum Yun Subject: [PATCH v5 5/6] arm64: make the per-task SCTLR2_EL1 Date: Wed, 17 Sep 2025 15:56:17 +0100 Message-Id: <20250917145618.1232329-6-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250917145618.1232329-1-yeoreum.yun@arm.com> References: <20250917145618.1232329-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Some bits in SCTLR2_EL1 that control system behavior can be configured on a per-task basis (e.g., fields related to FEAT_CPA2). To support future use of these fields, SCTLR2_EL1 is maintained per task. On platforms without FEAT_SCTLR2 support, there is no functional change and only minimal performance overhead. Signed-off-by: Yeoreum Yun --- arch/arm64/include/asm/processor.h | 3 +++ arch/arm64/kernel/process.c | 9 +++++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/pr= ocessor.h index 61d62bfd5a7b..e066116735c6 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -184,6 +184,7 @@ struct thread_struct { u64 mte_ctrl; #endif u64 sctlr_user; + u64 sctlr2_user; u64 svcr; u64 tpidr2_el0; u64 por_el0; @@ -258,6 +259,8 @@ static inline void task_set_sve_vl_onexec(struct task_s= truct *task, (SCTLR_ELx_ENIA | SCTLR_ELx_ENIB | SCTLR_ELx_ENDA | SCTLR_ELx_ENDB | \ SCTLR_EL1_TCF0_MASK) =20 +#define SCTLR2_USER_MASK (0) + static inline void arch_thread_struct_whitelist(unsigned long *offset, unsigned long *size) { diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 96482a1412c6..e54f192c0629 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -698,6 +698,11 @@ void update_sctlr_el1(u64 sctlr) isb(); } =20 +static void update_sctlr2_el1(u64 sctlr2) +{ + sysreg_clear_set_s(SYS_SCTLR2_EL1, SCTLR2_USER_MASK, sctlr2); +} + /* * Thread switching. */ @@ -737,6 +742,10 @@ struct task_struct *__switch_to(struct task_struct *pr= ev, if (prev->thread.sctlr_user !=3D next->thread.sctlr_user) update_sctlr_el1(next->thread.sctlr_user); =20 + if (alternative_has_cap_unlikely(ARM64_HAS_SCTLR2) && + prev->thread.sctlr2_user !=3D next->thread.sctlr2_user) + update_sctlr2_el1(next->thread.sctlr2_user); + /* the actual thread switch */ last =3D cpu_switch_to(prev, next); =20 --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}