[v1] irqchip/sifive-plic: avoid interrupt ID 0 handling during suspend/resume

[PATCH] irqchip/sifive-plic: avoid interrupt ID 0 handling during suspend/resume

Posted by Lucas Zampieri 2 weeks, 2 days ago

To: linux-kernel@vger.kernel.org
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Samuel Holland <samuel.holland@sifive.com>
Cc: stable@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Cc: Thomas Gleixner <tglx@linutronix.de>

According to the PLIC specification[1], global interrupt sources are
assigned small unsigned integer identifiers beginning at the value 1.
An interrupt ID of 0 is reserved to mean "no interrupt".

The current plic_irq_resume() and plic_irq_suspend() functions incorrectly
starts the loop from index 0, which could access the reserved interrupt ID
0 register space.
This fix changes the loop to start from index 1, skipping the reserved
interrupt ID 0 as per the PLIC specification.

This prevents potential undefined behavior when accessing the reserved
register space during suspend/resume cycles.

Fixes: e80f0b6a2cf3 ("irqchip/irq-sifive-plic: Add syscore callbacks for hibernation")
Co-developed-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Lucas Zampieri <lzampier@redhat.com>

[1] https://github.com/riscv/riscv-plic-spec/releases/tag/1.0.0
---
 drivers/irqchip/irq-sifive-plic.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index bf69a4802b71..1c2b4d2575ac 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -252,7 +252,7 @@ static int plic_irq_suspend(void)
 
 	priv = per_cpu_ptr(&plic_handlers, smp_processor_id())->priv;
 
-	for (i = 0; i < priv->nr_irqs; i++) {
+	for (i = 1; i < priv->nr_irqs; i++) {
 		__assign_bit(i, priv->prio_save,
 			     readl(priv->regs + PRIORITY_BASE + i * PRIORITY_PER_ID));
 	}
@@ -283,7 +283,7 @@ static void plic_irq_resume(void)
 
 	priv = per_cpu_ptr(&plic_handlers, smp_processor_id())->priv;
 
-	for (i = 0; i < priv->nr_irqs; i++) {
+	for (i = 1; i < priv->nr_irqs; i++) {
 		index = BIT_WORD(i);
 		writel((priv->prio_save[index] & BIT_MASK(i)) ? 1 : 0,
 		       priv->regs + PRIORITY_BASE + i * PRIORITY_PER_ID);
-- 
2.51.0

Re: [PATCH] irqchip/sifive-plic: avoid interrupt ID 0 handling during suspend/resume

Posted by Thomas Gleixner 1 week, 4 days ago

On Mon, Sep 15 2025 at 17:28, Lucas Zampieri wrote:

> To: linux-kernel@vger.kernel.org
> Cc: Paul Walmsley <paul.walmsley@sifive.com>
> Cc: Samuel Holland <samuel.holland@sifive.com>
> Cc: stable@vger.kernel.org
> Cc: linux-riscv@lists.infradead.org
> Cc: Thomas Gleixner <tglx@linutronix.de>

How is this Cc list relevant in explaining the changes here?

> According to the PLIC specification[1], global interrupt sources are
> assigned small unsigned integer identifiers beginning at the value 1.
> An interrupt ID of 0 is reserved to mean "no interrupt".
>
> The current plic_irq_resume() and plic_irq_suspend() functions incorrectly
> starts the loop from index 0, which could access the reserved interrupt ID
> 0 register space.
> This fix changes the loop to start from index 1, skipping the reserved
> interrupt ID 0 as per the PLIC specification.

s/This fix changes/Change/

And please separate this from the explanation above.

https://www.kernel.org/doc/html/latest/process/maintainer-tip.html#patch-submission-notes

> This prevents potential undefined behavior when accessing the reserved
> register space during suspend/resume cycles.
>
> Fixes: e80f0b6a2cf3 ("irqchip/irq-sifive-plic: Add syscore callbacks for hibernation")
> Co-developed-by: Jia Wang <wangjia@ultrarisc.com>
> Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
> Signed-off-by: Lucas Zampieri <lzampier@redhat.com>
>
> [1] https://github.com/riscv/riscv-plic-spec/releases/tag/1.0.0

Link: .....

This [1] stuff is just annoying.

> ---
>  drivers/irqchip/irq-sifive-plic.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
> index bf69a4802b71..1c2b4d2575ac 100644
> --- a/drivers/irqchip/irq-sifive-plic.c
> +++ b/drivers/irqchip/irq-sifive-plic.c
> @@ -252,7 +252,7 @@ static int plic_irq_suspend(void)
>  
>  	priv = per_cpu_ptr(&plic_handlers, smp_processor_id())->priv;
>  
> -	for (i = 0; i < priv->nr_irqs; i++) {
> +	for (i = 1; i < priv->nr_irqs; i++) {

This lacks a comment explaining this non-obvious 'i = 1'.

Thanks,

        tglx