Add all nodes and connections required to make USB3 work on M1-based
Apple machines.
Co-developed-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Sven Peter <sven@kernel.org>
---
arch/arm64/boot/dts/apple/t8103-j274.dts | 12 +++
arch/arm64/boot/dts/apple/t8103-j293.dts | 12 +++
arch/arm64/boot/dts/apple/t8103-j313.dts | 12 +++
arch/arm64/boot/dts/apple/t8103-j456.dts | 12 +++
arch/arm64/boot/dts/apple/t8103-j457.dts | 12 +++
arch/arm64/boot/dts/apple/t8103-jxxx.dtsi | 137 ++++++++++++++++++++++++++++++
arch/arm64/boot/dts/apple/t8103.dtsi | 105 +++++++++++++++++++++++
7 files changed, 302 insertions(+)
diff --git a/arch/arm64/boot/dts/apple/t8103-j274.dts b/arch/arm64/boot/dts/apple/t8103-j274.dts
index 1c3e37f86d46d7b5d733717b47c4b57dc55e1201..968fe22163d4431fe5e7049854687e61e0ec50f1 100644
--- a/arch/arm64/boot/dts/apple/t8103-j274.dts
+++ b/arch/arm64/boot/dts/apple/t8103-j274.dts
@@ -29,6 +29,18 @@ &wifi0 {
brcm,board-type = "apple,atlantisb";
};
+/*
+ * Provide labels for the USB type C ports.
+ */
+
+&typec0 {
+ label = "USB-C Back-left";
+};
+
+&typec1 {
+ label = "USB-C Back-right";
+};
+
/*
* Force the bus number assignments so that we can declare some of the
* on-board devices and properties that are populated by the bootloader
diff --git a/arch/arm64/boot/dts/apple/t8103-j293.dts b/arch/arm64/boot/dts/apple/t8103-j293.dts
index 5b3c42e9f0e6776241bf746d3458766e44e3639a..678f89c3d47fbf2d0705b46bb8feba3fa018ca7a 100644
--- a/arch/arm64/boot/dts/apple/t8103-j293.dts
+++ b/arch/arm64/boot/dts/apple/t8103-j293.dts
@@ -46,6 +46,18 @@ &wifi0 {
brcm,board-type = "apple,honshu";
};
+/*
+ * Provide labels for the USB type C ports.
+ */
+
+&typec0 {
+ label = "USB-C Left-back";
+};
+
+&typec1 {
+ label = "USB-C Left-front";
+};
+
&i2c2 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/apple/t8103-j313.dts b/arch/arm64/boot/dts/apple/t8103-j313.dts
index 97a4344d8dca685708aff136af92a1b316f3c3dd..bce9b911009e2b0caa9d8b2222cd1e8c3215f3b9 100644
--- a/arch/arm64/boot/dts/apple/t8103-j313.dts
+++ b/arch/arm64/boot/dts/apple/t8103-j313.dts
@@ -41,3 +41,15 @@ &wifi0 {
&fpwm1 {
status = "okay";
};
+
+/*
+ * Provide labels for the USB type C ports.
+ */
+
+&typec0 {
+ label = "USB-C Left-back";
+};
+
+&typec1 {
+ label = "USB-C Left-front";
+};
diff --git a/arch/arm64/boot/dts/apple/t8103-j456.dts b/arch/arm64/boot/dts/apple/t8103-j456.dts
index 58c8e43789b4861544e20c717124ede3327be010..9983e11cacdf19d0a92ede108ceac21b7a02d5da 100644
--- a/arch/arm64/boot/dts/apple/t8103-j456.dts
+++ b/arch/arm64/boot/dts/apple/t8103-j456.dts
@@ -47,6 +47,18 @@ hpm3: usb-pd@3c {
};
};
+/*
+ * Provide labels for the USB type C ports.
+ */
+
+&typec0 {
+ label = "USB-C Back-right";
+};
+
+&typec1 {
+ label = "USB-C Back-right-middle";
+};
+
/*
* Force the bus number assignments so that we can declare some of the
* on-board devices and properties that are populated by the bootloader
diff --git a/arch/arm64/boot/dts/apple/t8103-j457.dts b/arch/arm64/boot/dts/apple/t8103-j457.dts
index 152f95fd49a2118093396838fbd8b6bd1b518f81..a622ff607d407519000d1526b7244419a59644a3 100644
--- a/arch/arm64/boot/dts/apple/t8103-j457.dts
+++ b/arch/arm64/boot/dts/apple/t8103-j457.dts
@@ -29,6 +29,18 @@ &wifi0 {
brcm,board-type = "apple,santorini";
};
+/*
+ * Provide labels for the USB type C ports.
+ */
+
+&typec0 {
+ label = "USB-C Back-right";
+};
+
+&typec1 {
+ label = "USB-C Back-left";
+};
+
/*
* Force the bus number assignments so that we can declare some of the
* on-board devices and properties that are populated by the bootloader
diff --git a/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi b/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi
index 0c8206156bfefda8a32c869787b2e0c8e67a9d17..758b2196954bc139c201d25298444f59c7832ea5 100644
--- a/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi
+++ b/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi
@@ -15,6 +15,8 @@ aliases {
serial0 = &serial0;
serial2 = &serial2;
wifi0 = &wifi0;
+ atcphy0 = &atcphy0;
+ atcphy1 = &atcphy1;
};
chosen {
@@ -53,6 +55,30 @@ hpm0: usb-pd@38 {
interrupt-parent = <&pinctrl_ap>;
interrupts = <106 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
+
+ typec0: connector {
+ compatible = "usb-c-connector";
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ typec0_connector_hs: endpoint {
+ remote-endpoint = <&dwc3_0_hs>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ typec0_connector_ss: endpoint {
+ remote-endpoint = <&atcphy0_typec_lanes>;
+ };
+ };
+ };
+ };
};
hpm1: usb-pd@3f {
@@ -61,6 +87,117 @@ hpm1: usb-pd@3f {
interrupt-parent = <&pinctrl_ap>;
interrupts = <106 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
+
+ typec1: connector {
+ compatible = "usb-c-connector";
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ typec1_connector_hs: endpoint {
+ remote-endpoint = <&dwc3_1_hs>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ typec1_connector_ss: endpoint {
+ remote-endpoint = <&atcphy1_typec_lanes>;
+ };
+ };
+ };
+ };
+ };
+};
+
+/* USB controllers */
+&dwc3_0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dwc3_0_hs: endpoint {
+ remote-endpoint = <&typec0_connector_hs>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dwc3_0_ss: endpoint {
+ remote-endpoint = <&atcphy0_usb3>;
+ };
+ };
+ };
+};
+
+&dwc3_1 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dwc3_1_hs: endpoint {
+ remote-endpoint = <&typec1_connector_hs>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dwc3_1_ss: endpoint {
+ remote-endpoint = <&atcphy1_usb3>;
+ };
+ };
+ };
+};
+
+/* Type-C PHYs */
+&atcphy0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ atcphy0_typec_lanes: endpoint {
+ remote-endpoint = <&typec0_connector_ss>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ atcphy0_usb3: endpoint {
+ remote-endpoint = <&dwc3_0_ss>;
+ };
+ };
+ };
+};
+
+&atcphy1 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ atcphy1_typec_lanes: endpoint {
+ remote-endpoint = <&typec1_connector_ss>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ atcphy1_usb3: endpoint {
+ remote-endpoint = <&dwc3_1_ss>;
+ };
+ };
};
};
diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi
index 589ddc0397995ecf6fc11b135164229ab1ee7cf8..f22a1feaf459ddf1601ce7374c2aa0c216b371a1 100644
--- a/arch/arm64/boot/dts/apple/t8103.dtsi
+++ b/arch/arm64/boot/dts/apple/t8103.dtsi
@@ -10,6 +10,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/phy/phy.h>
#include <dt-bindings/pinctrl/apple.h>
#include <dt-bindings/spmi/spmi.h>
@@ -972,6 +973,110 @@ nvme@27bcc0000 {
resets = <&ps_ans2>;
};
+ dwc3_0: usb@382280000 {
+ compatible = "apple,t8103-dwc3";
+ reg = <0x3 0x82280000 0x0 0xcd00>, <0x3 0x8228cd00 0x0 0x3200>;
+ reg-names = "dwc3-core", "dwc3-apple";
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 777 IRQ_TYPE_LEVEL_HIGH>;
+ dr_mode = "otg";
+ usb-role-switch;
+ role-switch-default-mode = "host";
+ iommus = <&dwc3_0_dart_0 0>, <&dwc3_0_dart_1 1>;
+ power-domains = <&ps_atc0_usb>;
+ resets = <&atcphy0>;
+ phys = <&atcphy0 PHY_TYPE_USB2>, <&atcphy0 PHY_TYPE_USB3>;
+ phy-names = "usb2-phy", "usb3-phy";
+ };
+
+ dwc3_0_dart_0: iommu@382f00000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x3 0x82f00000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ power-domains = <&ps_atc0_usb>;
+ };
+
+ dwc3_0_dart_1: iommu@382f80000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x3 0x82f80000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ power-domains = <&ps_atc0_usb>;
+ };
+
+ atcphy0: phy@383000000 {
+ compatible = "apple,t8103-atcphy";
+ reg = <0x3 0x83000000 0x0 0x4c000>,
+ <0x3 0x83050000 0x0 0x8000>,
+ <0x3 0x80000000 0x0 0x4000>,
+ <0x3 0x82a90000 0x0 0x4000>,
+ <0x3 0x82a84000 0x0 0x4000>;
+ reg-names = "core", "lpdptx", "axi2af", "usb2phy",
+ "pipehandler";
+
+ #phy-cells = <1>;
+ #reset-cells = <0>;
+
+ orientation-switch;
+ mode-switch;
+ power-domains = <&ps_atc0_usb>;
+ };
+
+ dwc3_1: usb@502280000 {
+ compatible = "apple,t8103-dwc3";
+ reg = <0x5 0x02280000 0x0 0xcd00>, <0x5 0x0228cd00 0x0 0x3200>;
+ reg-names = "dwc3-core", "dwc3-apple";
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 857 IRQ_TYPE_LEVEL_HIGH>;
+ dr_mode = "otg";
+ usb-role-switch;
+ role-switch-default-mode = "host";
+ iommus = <&dwc3_1_dart_0 0>, <&dwc3_1_dart_1 1>;
+ power-domains = <&ps_atc1_usb>;
+ resets = <&atcphy1>;
+ phys = <&atcphy1 PHY_TYPE_USB2>, <&atcphy1 PHY_TYPE_USB3>;
+ phy-names = "usb2-phy", "usb3-phy";
+ };
+
+ dwc3_1_dart_0: iommu@502f00000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x5 0x02f00000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ power-domains = <&ps_atc1_usb>;
+ };
+
+ dwc3_1_dart_1: iommu@502f80000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x5 0x02f80000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ power-domains = <&ps_atc1_usb>;
+ };
+
+ atcphy1: phy@503000000 {
+ compatible = "apple,t8103-atcphy";
+ reg = <0x5 0x03000000 0x0 0x4c000>,
+ <0x5 0x03050000 0x0 0x8000>,
+ <0x5 0x0 0x0 0x4000>,
+ <0x5 0x02a90000 0x0 0x4000>,
+ <0x5 0x02a84000 0x0 0x4000>;
+ reg-names = "core", "lpdptx", "axi2af", "usb2phy",
+ "pipehandler";
+
+ #phy-cells = <1>;
+ #reset-cells = <0>;
+
+ orientation-switch;
+ mode-switch;
+ power-domains = <&ps_atc1_usb>;
+ };
+
pcie0_dart_0: iommu@681008000 {
compatible = "apple,t8103-dart";
reg = <0x6 0x81008000 0x0 0x4000>;
--
2.34.1
On Sat, Sep 06, 2025 at 03:43:33PM +0000, Sven Peter wrote: > Add all nodes and connections required to make USB3 work on M1-based > Apple machines. > > Co-developed-by: Hector Martin <marcan@marcan.st> > Signed-off-by: Hector Martin <marcan@marcan.st> > Signed-off-by: Sven Peter <sven@kernel.org> > --- > arch/arm64/boot/dts/apple/t8103-j274.dts | 12 +++ > arch/arm64/boot/dts/apple/t8103-j293.dts | 12 +++ > arch/arm64/boot/dts/apple/t8103-j313.dts | 12 +++ > arch/arm64/boot/dts/apple/t8103-j456.dts | 12 +++ > arch/arm64/boot/dts/apple/t8103-j457.dts | 12 +++ > arch/arm64/boot/dts/apple/t8103-jxxx.dtsi | 137 ++++++++++++++++++++++++++++++ > arch/arm64/boot/dts/apple/t8103.dtsi | 105 +++++++++++++++++++++++ > 7 files changed, 302 insertions(+) Please do not combine DTS patches in patchsets for Greg (e.g. USB). Greg expressed that many times, that he takes all or nothing, and DTS cannot go via driver branches/trees. Best regards, Krzysztof
On 07.09.25 11:47, Krzysztof Kozlowski wrote: > On Sat, Sep 06, 2025 at 03:43:33PM +0000, Sven Peter wrote: >> Add all nodes and connections required to make USB3 work on M1-based >> Apple machines. >> >> Co-developed-by: Hector Martin <marcan@marcan.st> >> Signed-off-by: Hector Martin <marcan@marcan.st> >> Signed-off-by: Sven Peter <sven@kernel.org> >> --- >> arch/arm64/boot/dts/apple/t8103-j274.dts | 12 +++ >> arch/arm64/boot/dts/apple/t8103-j293.dts | 12 +++ >> arch/arm64/boot/dts/apple/t8103-j313.dts | 12 +++ >> arch/arm64/boot/dts/apple/t8103-j456.dts | 12 +++ >> arch/arm64/boot/dts/apple/t8103-j457.dts | 12 +++ >> arch/arm64/boot/dts/apple/t8103-jxxx.dtsi | 137 ++++++++++++++++++++++++++++++ >> arch/arm64/boot/dts/apple/t8103.dtsi | 105 +++++++++++++++++++++++ >> 7 files changed, 302 insertions(+) > > Please do not combine DTS patches in patchsets for Greg (e.g. USB). Greg > expressed that many times, that he takes all or nothing, and DTS cannot > go via driver branches/trees. Okay, thanks for the hint. I wasn't aware that he prefers related patches that go through a different tree to be split off. Best, Sven
> Please do not combine DTS patches in patchsets for Greg (e.g. USB). Greg > expressed that many times, that he takes all or nothing, and DTS cannot > go via driver branches/trees. From the cover letter, emphasis mine: > With the dwc3 glue driver this series can now also be merged independently > once it's ready: Patches 1-4 can go through the dwc3 tree, 5-15 through > tipd, 16-18 should go together through the phy tree, and I'll take the > DTS changes through my tree. **If everyone's happy with the overall > approach here I can also just send these as individual series**
On 07/09/2025 14:43, Alyssa Anne Rosenzweig wrote: >> Please do not combine DTS patches in patchsets for Greg (e.g. USB). Greg >> expressed that many times, that he takes all or nothing, and DTS cannot >> go via driver branches/trees. > > From the cover letter, emphasis mine: This changes nothing. Please read replies from Greg how he takes patches. > >> With the dwc3 glue driver this series can now also be merged independently >> once it's ready: Patches 1-4 can go through the dwc3 tree, 5-15 through >> tipd, 16-18 should go together through the phy tree, and I'll take the >> DTS changes through my tree. **If everyone's happy with the overall >> approach here I can also just send these as individual series** Best regards, Krzysztof
On Sun, Sep 07, 2025 at 08:43:32AM -0400, Alyssa Anne Rosenzweig wrote: > > Please do not combine DTS patches in patchsets for Greg (e.g. USB). Greg > > expressed that many times, that he takes all or nothing, and DTS cannot > > go via driver branches/trees. > > >From the cover letter, emphasis mine: > > > With the dwc3 glue driver this series can now also be merged independently > > once it's ready: Patches 1-4 can go through the dwc3 tree, 5-15 through > > tipd, 16-18 should go together through the phy tree, and I'll take the > > DTS changes through my tree. **If everyone's happy with the overall > > approach here I can also just send these as individual series** > That's great, but a major pain in the butt for any maintainer. It would require me to manually pick out the patches to be added to my tree and manually apply them? We have good tools now, b4, that wants to take a whole patch series. And you want me to take a whole patch series, as I can now add the info that is in 00/XX to the "merge point" of a big patch series to preserve the information that is provided here. So you loose out if you that is not preserved in the tree, and you make more work for maintainers to try to sift through just what should, and should not, be taken. Remember, some of us maintainers get 1000+ emails a day to do something with. Our development process is optimized for our most limited resource, maintainers, not developers, sorry. Think about it if you were on the receiving end of this, what would you want to see present for you to be able to review and then apply this to your tree? So please, split patches up into "one series per tree". It's the only sane way for us to work. Yes, it's a pain for platform/dts stuff at times, but for everything else, it works really well. thanks, greg k-h
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