From nobody Tue Sep 9 11:44:50 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC7BF2F4A16; Sat, 6 Sep 2025 15:43:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757173420; cv=none; b=P1j5wLst5P49ZGehMD+3C703tjR+ovMMU/TVjKqfadqIRpOvVO6DSQidEKSRtk+wLVvJbyo9fslougZXdjTAl4LTarbNuWUrn0gz+/PXcHrawC6tKIyX29VgJ42rZ6EnvRFF/9B1Cx3iOJrmH0RvzMUsz43YncO3ZJxqECz5LjE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757173420; c=relaxed/simple; bh=1cAbo9qjTQz9D7gtBYoRZ1si0Ch/NYth8AtFWmyYid0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SjhQARiwKjjkWravVRbFgbMVd+ePj572n1U3l1J/5tJ94grdOJoTr5wDDrqUpBzmtzt6YfiAnn1soal8YggA/RHu04lxaueYrFQs+t4nypD5Tk99wdKkThY+qSsq4ZVl2KjIF5flnVT5HyD2wC5mrq3Xljx2gx1Hrqzst09jS2Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=CLhdTWN7; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="CLhdTWN7" Received: by smtp.kernel.org (Postfix) with ESMTPS id 9322DC4CEF9; Sat, 6 Sep 2025 15:43:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757173420; bh=1cAbo9qjTQz9D7gtBYoRZ1si0Ch/NYth8AtFWmyYid0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=CLhdTWN7518b2YOZowl6uCZwUxi++4k1F1qckpDAxy8CETpIqc4fiRIn+Bx1NVlAW Mv3if92PKSZvnlGyZIH5c/nZBvIEGadIsml2nw7Qr4HFnuXOlSb8bsbHdSdTx8mFfd 9uL4RkhrRUcQSi37RwbtfhjztXy9R/otvtbFlpW55u3wbLTgKMeR/ByAKIhgSFz/Ac E+TA0d3rSOczq+vaKq3QWzPiRj7xjIedG66OxxwENd79o0nix6Z3yXcmkmbHKb8OTD hnA+8lmn7p7wUwfZHDC94E/lNpqN2xGH/fp8uTmY2tUlr3yB78HlIFSUfG7OzIFaGV UXpqLD5jbLDzA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E6E6CA1012; Sat, 6 Sep 2025 15:43:40 +0000 (UTC) From: Sven Peter Date: Sat, 06 Sep 2025 15:43:33 +0000 Subject: [PATCH v2 20/22] arm64: dts: apple: t8103: Add Apple Type-C PHY and dwc3 nodes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250906-atcphy-6-17-v2-20-52c348623ef6@kernel.org> References: <20250906-atcphy-6-17-v2-0-52c348623ef6@kernel.org> In-Reply-To: <20250906-atcphy-6-17-v2-0-52c348623ef6@kernel.org> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Felipe Balbi , Janne Grunau , Alyssa Rosenzweig , Neal Gompa , Vinod Koul , Kishon Vijay Abraham I , Thinh Nguyen , Heikki Krogerus , Philipp Zabel , Frank Li , Ran Wang , Peter Chen Cc: linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, Sven Peter , Hector Martin X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=10863; i=sven@kernel.org; h=from:subject:message-id; bh=1cAbo9qjTQz9D7gtBYoRZ1si0Ch/NYth8AtFWmyYid0=; b=owGbwMvMwCHmIlirolUq95LxtFoSQ8aesGUd8VN/rhB+X1KvfeIja8NKqZa5Qt3LlUofZdj8b ReLnSDbUcrCIMbBICumyLJ9v73pk4dvBJduuvQeZg4rE8gQBi5OAZjI0hxGhoY4D2Z+vlOprPzJ Qt6+p85FqGetYyvMKCybvuFz5LSPjAx/+P/md1wKfh367VPJrUdKwqxh6b39r4/Pn5ySeMz2PrM rNwA= X-Developer-Key: i=sven@kernel.org; a=openpgp; fpr=A1E3E34A2B3C820DBC4955E5993B08092F131F93 X-Endpoint-Received: by B4 Relay for sven@kernel.org/default with auth_id=407 Add all nodes and connections required to make USB3 work on M1-based Apple machines. Co-developed-by: Hector Martin Signed-off-by: Hector Martin Signed-off-by: Sven Peter --- arch/arm64/boot/dts/apple/t8103-j274.dts | 12 +++ arch/arm64/boot/dts/apple/t8103-j293.dts | 12 +++ arch/arm64/boot/dts/apple/t8103-j313.dts | 12 +++ arch/arm64/boot/dts/apple/t8103-j456.dts | 12 +++ arch/arm64/boot/dts/apple/t8103-j457.dts | 12 +++ arch/arm64/boot/dts/apple/t8103-jxxx.dtsi | 137 ++++++++++++++++++++++++++= ++++ arch/arm64/boot/dts/apple/t8103.dtsi | 105 +++++++++++++++++++++++ 7 files changed, 302 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t8103-j274.dts b/arch/arm64/boot/dts= /apple/t8103-j274.dts index 1c3e37f86d46d7b5d733717b47c4b57dc55e1201..968fe22163d4431fe5e70498546= 87e61e0ec50f1 100644 --- a/arch/arm64/boot/dts/apple/t8103-j274.dts +++ b/arch/arm64/boot/dts/apple/t8103-j274.dts @@ -29,6 +29,18 @@ &wifi0 { brcm,board-type =3D "apple,atlantisb"; }; =20 +/* + * Provide labels for the USB type C ports. + */ + +&typec0 { + label =3D "USB-C Back-left"; +}; + +&typec1 { + label =3D "USB-C Back-right"; +}; + /* * Force the bus number assignments so that we can declare some of the * on-board devices and properties that are populated by the bootloader diff --git a/arch/arm64/boot/dts/apple/t8103-j293.dts b/arch/arm64/boot/dts= /apple/t8103-j293.dts index 5b3c42e9f0e6776241bf746d3458766e44e3639a..678f89c3d47fbf2d0705b46bb8f= eba3fa018ca7a 100644 --- a/arch/arm64/boot/dts/apple/t8103-j293.dts +++ b/arch/arm64/boot/dts/apple/t8103-j293.dts @@ -46,6 +46,18 @@ &wifi0 { brcm,board-type =3D "apple,honshu"; }; =20 +/* + * Provide labels for the USB type C ports. + */ + +&typec0 { + label =3D "USB-C Left-back"; +}; + +&typec1 { + label =3D "USB-C Left-front"; +}; + &i2c2 { status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/apple/t8103-j313.dts b/arch/arm64/boot/dts= /apple/t8103-j313.dts index 97a4344d8dca685708aff136af92a1b316f3c3dd..bce9b911009e2b0caa9d8b2222c= d1e8c3215f3b9 100644 --- a/arch/arm64/boot/dts/apple/t8103-j313.dts +++ b/arch/arm64/boot/dts/apple/t8103-j313.dts @@ -41,3 +41,15 @@ &wifi0 { &fpwm1 { status =3D "okay"; }; + +/* + * Provide labels for the USB type C ports. + */ + +&typec0 { + label =3D "USB-C Left-back"; +}; + +&typec1 { + label =3D "USB-C Left-front"; +}; diff --git a/arch/arm64/boot/dts/apple/t8103-j456.dts b/arch/arm64/boot/dts= /apple/t8103-j456.dts index 58c8e43789b4861544e20c717124ede3327be010..9983e11cacdf19d0a92ede108ce= ac21b7a02d5da 100644 --- a/arch/arm64/boot/dts/apple/t8103-j456.dts +++ b/arch/arm64/boot/dts/apple/t8103-j456.dts @@ -47,6 +47,18 @@ hpm3: usb-pd@3c { }; }; =20 +/* + * Provide labels for the USB type C ports. + */ + +&typec0 { + label =3D "USB-C Back-right"; +}; + +&typec1 { + label =3D "USB-C Back-right-middle"; +}; + /* * Force the bus number assignments so that we can declare some of the * on-board devices and properties that are populated by the bootloader diff --git a/arch/arm64/boot/dts/apple/t8103-j457.dts b/arch/arm64/boot/dts= /apple/t8103-j457.dts index 152f95fd49a2118093396838fbd8b6bd1b518f81..a622ff607d407519000d1526b72= 44419a59644a3 100644 --- a/arch/arm64/boot/dts/apple/t8103-j457.dts +++ b/arch/arm64/boot/dts/apple/t8103-j457.dts @@ -29,6 +29,18 @@ &wifi0 { brcm,board-type =3D "apple,santorini"; }; =20 +/* + * Provide labels for the USB type C ports. + */ + +&typec0 { + label =3D "USB-C Back-right"; +}; + +&typec1 { + label =3D "USB-C Back-left"; +}; + /* * Force the bus number assignments so that we can declare some of the * on-board devices and properties that are populated by the bootloader diff --git a/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi b/arch/arm64/boot/dt= s/apple/t8103-jxxx.dtsi index 0c8206156bfefda8a32c869787b2e0c8e67a9d17..758b2196954bc139c201d252984= 44f59c7832ea5 100644 --- a/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi +++ b/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi @@ -15,6 +15,8 @@ aliases { serial0 =3D &serial0; serial2 =3D &serial2; wifi0 =3D &wifi0; + atcphy0 =3D &atcphy0; + atcphy1 =3D &atcphy1; }; =20 chosen { @@ -53,6 +55,30 @@ hpm0: usb-pd@38 { interrupt-parent =3D <&pinctrl_ap>; interrupts =3D <106 IRQ_TYPE_LEVEL_LOW>; interrupt-names =3D "irq"; + + typec0: connector { + compatible =3D "usb-c-connector"; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + typec0_connector_hs: endpoint { + remote-endpoint =3D <&dwc3_0_hs>; + }; + }; + port@1 { + reg =3D <1>; + typec0_connector_ss: endpoint { + remote-endpoint =3D <&atcphy0_typec_lanes>; + }; + }; + }; + }; }; =20 hpm1: usb-pd@3f { @@ -61,6 +87,117 @@ hpm1: usb-pd@3f { interrupt-parent =3D <&pinctrl_ap>; interrupts =3D <106 IRQ_TYPE_LEVEL_LOW>; interrupt-names =3D "irq"; + + typec1: connector { + compatible =3D "usb-c-connector"; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + typec1_connector_hs: endpoint { + remote-endpoint =3D <&dwc3_1_hs>; + }; + }; + + port@1 { + reg =3D <1>; + typec1_connector_ss: endpoint { + remote-endpoint =3D <&atcphy1_typec_lanes>; + }; + }; + }; + }; + }; +}; + +/* USB controllers */ +&dwc3_0 { + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + dwc3_0_hs: endpoint { + remote-endpoint =3D <&typec0_connector_hs>; + }; + }; + + port@1 { + reg =3D <1>; + dwc3_0_ss: endpoint { + remote-endpoint =3D <&atcphy0_usb3>; + }; + }; + }; +}; + +&dwc3_1 { + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + dwc3_1_hs: endpoint { + remote-endpoint =3D <&typec1_connector_hs>; + }; + }; + + port@1 { + reg =3D <1>; + dwc3_1_ss: endpoint { + remote-endpoint =3D <&atcphy1_usb3>; + }; + }; + }; +}; + +/* Type-C PHYs */ +&atcphy0 { + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + atcphy0_typec_lanes: endpoint { + remote-endpoint =3D <&typec0_connector_ss>; + }; + }; + + port@1 { + reg =3D <1>; + atcphy0_usb3: endpoint { + remote-endpoint =3D <&dwc3_0_ss>; + }; + }; + }; +}; + +&atcphy1 { + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + atcphy1_typec_lanes: endpoint { + remote-endpoint =3D <&typec1_connector_ss>; + }; + }; + + port@1 { + reg =3D <1>; + atcphy1_usb3: endpoint { + remote-endpoint =3D <&dwc3_1_ss>; + }; + }; }; }; =20 diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/app= le/t8103.dtsi index 589ddc0397995ecf6fc11b135164229ab1ee7cf8..f22a1feaf459ddf1601ce7374c2= aa0c216b371a1 100644 --- a/arch/arm64/boot/dts/apple/t8103.dtsi +++ b/arch/arm64/boot/dts/apple/t8103.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include #include #include =20 @@ -972,6 +973,110 @@ nvme@27bcc0000 { resets =3D <&ps_ans2>; }; =20 + dwc3_0: usb@382280000 { + compatible =3D "apple,t8103-dwc3"; + reg =3D <0x3 0x82280000 0x0 0xcd00>, <0x3 0x8228cd00 0x0 0x3200>; + reg-names =3D "dwc3-core", "dwc3-apple"; + interrupt-parent =3D <&aic>; + interrupts =3D ; + dr_mode =3D "otg"; + usb-role-switch; + role-switch-default-mode =3D "host"; + iommus =3D <&dwc3_0_dart_0 0>, <&dwc3_0_dart_1 1>; + power-domains =3D <&ps_atc0_usb>; + resets =3D <&atcphy0>; + phys =3D <&atcphy0 PHY_TYPE_USB2>, <&atcphy0 PHY_TYPE_USB3>; + phy-names =3D "usb2-phy", "usb3-phy"; + }; + + dwc3_0_dart_0: iommu@382f00000 { + compatible =3D "apple,t8103-dart"; + reg =3D <0x3 0x82f00000 0x0 0x4000>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + #iommu-cells =3D <1>; + power-domains =3D <&ps_atc0_usb>; + }; + + dwc3_0_dart_1: iommu@382f80000 { + compatible =3D "apple,t8103-dart"; + reg =3D <0x3 0x82f80000 0x0 0x4000>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + #iommu-cells =3D <1>; + power-domains =3D <&ps_atc0_usb>; + }; + + atcphy0: phy@383000000 { + compatible =3D "apple,t8103-atcphy"; + reg =3D <0x3 0x83000000 0x0 0x4c000>, + <0x3 0x83050000 0x0 0x8000>, + <0x3 0x80000000 0x0 0x4000>, + <0x3 0x82a90000 0x0 0x4000>, + <0x3 0x82a84000 0x0 0x4000>; + reg-names =3D "core", "lpdptx", "axi2af", "usb2phy", + "pipehandler"; + + #phy-cells =3D <1>; + #reset-cells =3D <0>; + + orientation-switch; + mode-switch; + power-domains =3D <&ps_atc0_usb>; + }; + + dwc3_1: usb@502280000 { + compatible =3D "apple,t8103-dwc3"; + reg =3D <0x5 0x02280000 0x0 0xcd00>, <0x5 0x0228cd00 0x0 0x3200>; + reg-names =3D "dwc3-core", "dwc3-apple"; + interrupt-parent =3D <&aic>; + interrupts =3D ; + dr_mode =3D "otg"; + usb-role-switch; + role-switch-default-mode =3D "host"; + iommus =3D <&dwc3_1_dart_0 0>, <&dwc3_1_dart_1 1>; + power-domains =3D <&ps_atc1_usb>; + resets =3D <&atcphy1>; + phys =3D <&atcphy1 PHY_TYPE_USB2>, <&atcphy1 PHY_TYPE_USB3>; + phy-names =3D "usb2-phy", "usb3-phy"; + }; + + dwc3_1_dart_0: iommu@502f00000 { + compatible =3D "apple,t8103-dart"; + reg =3D <0x5 0x02f00000 0x0 0x4000>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + #iommu-cells =3D <1>; + power-domains =3D <&ps_atc1_usb>; + }; + + dwc3_1_dart_1: iommu@502f80000 { + compatible =3D "apple,t8103-dart"; + reg =3D <0x5 0x02f80000 0x0 0x4000>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + #iommu-cells =3D <1>; + power-domains =3D <&ps_atc1_usb>; + }; + + atcphy1: phy@503000000 { + compatible =3D "apple,t8103-atcphy"; + reg =3D <0x5 0x03000000 0x0 0x4c000>, + <0x5 0x03050000 0x0 0x8000>, + <0x5 0x0 0x0 0x4000>, + <0x5 0x02a90000 0x0 0x4000>, + <0x5 0x02a84000 0x0 0x4000>; + reg-names =3D "core", "lpdptx", "axi2af", "usb2phy", + "pipehandler"; + + #phy-cells =3D <1>; + #reset-cells =3D <0>; + + orientation-switch; + mode-switch; + power-domains =3D <&ps_atc1_usb>; + }; + pcie0_dart_0: iommu@681008000 { compatible =3D "apple,t8103-dart"; reg =3D <0x6 0x81008000 0x0 0x4000>; --=20 2.34.1