arch/arm64/boot/dts/tesla/fsd.dtsi | 540 +++++++++++++++++++++++++++++ 1 file changed, 540 insertions(+)
The Tesla FSD SoC CSIS IP bundles MIPI CSI-2 link controller and video
capture interface. Add nodes describing the MIPI CSI-2 link controller
and video capture interface.
Signed-off-by: Inbaraj E <inbaraj.e@samsung.com>
---
Changes since v2:
- Changed generic node name
- Fixed node ordering
Here is patch link for v2:
https://lore.kernel.org/linux-media/20250814140943.22531-1-inbaraj.e@samsung.com/
This patch is dependent on below patchset
https://lore.kernel.org/linux-media/20250822002734.23516-1-laurent.pinchart@ideasonboard.com/T/#t
arch/arm64/boot/dts/tesla/fsd.dtsi | 540 +++++++++++++++++++++++++++++
1 file changed, 540 insertions(+)
diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi
index a5ebb3f9b18f..22afcf5a5dda 100644
--- a/arch/arm64/boot/dts/tesla/fsd.dtsi
+++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
@@ -485,6 +485,546 @@ sysreg_cam: system-controller@12630000 {
reg = <0x0 0x12630000 0x0 0x500>;
};
+ mipicsi0: csi@12640000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x12640000 0x0 0x124>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI0_0_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI0_0_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ tesla,syscon-csis = <&sysreg_cam 0x40c>;
+ fsl,num-channels = <4>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_0_out: endpoint {
+ remote-endpoint = <&csis_in_0>;
+ };
+ };
+ };
+ };
+
+ csis0: csis@12641000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x12641000 0x0 0x44c>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI0_0_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI0_0_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+
+ port {
+ csis_in_0: endpoint {
+ remote-endpoint = <&mipi_csis_0_out>;
+ };
+ };
+ };
+
+ mipicsi1: csi@12650000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x12650000 0x0 0x124>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI0_1_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI0_1_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ tesla,syscon-csis = <&sysreg_cam 0x40c>;
+ fsl,num-channels = <4>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_1_out: endpoint {
+ remote-endpoint = <&csis_in_1>;
+ };
+ };
+ };
+ };
+
+ csis1: csis@12651000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x12651000 0x0 0x44c>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI0_1_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI0_1_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+
+ port {
+ csis_in_1: endpoint {
+ remote-endpoint = <&mipi_csis_1_out>;
+ };
+ };
+ };
+
+ mipicsi2: csi@12660000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x12660000 0x0 0x124>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI0_2_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI0_2_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ tesla,syscon-csis = <&sysreg_cam 0x40c>;
+ fsl,num-channels = <4>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_2_out: endpoint {
+ remote-endpoint = <&csis_in_2>;
+ };
+ };
+ };
+ };
+
+ csis2: csis@12661000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x12661000 0x0 0x44c>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI0_2_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI0_2_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+
+ port {
+ csis_in_2: endpoint {
+ remote-endpoint = <&mipi_csis_2_out>;
+ };
+ };
+ };
+
+ mipicsi3: csi@12670000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x12670000 0x0 0x124>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI0_3_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI0_3_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ tesla,syscon-csis = <&sysreg_cam 0x40c>;
+ fsl,num-channels = <4>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_3_out: endpoint {
+ remote-endpoint = <&csis_in_3>;
+ };
+ };
+ };
+ };
+
+ csis3: csis@12671000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x12671000 0x0 0x44c>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI0_3_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI0_3_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+
+ port {
+ csis_in_3: endpoint {
+ remote-endpoint = <&mipi_csis_3_out>;
+ };
+ };
+ };
+
+ mipicsi4: csi@12680000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x12680000 0x0 0x124>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI1_0_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI1_0_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ tesla,syscon-csis = <&sysreg_cam 0x40c>;
+ fsl,num-channels = <4>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_4_out: endpoint {
+ remote-endpoint = <&csis_in_4>;
+ };
+ };
+ };
+ };
+
+ csis4: csis@12681000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x12681000 0x0 0x44c>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI1_0_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI1_0_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+
+ port {
+ csis_in_4: endpoint {
+ remote-endpoint = <&mipi_csis_4_out>;
+ };
+ };
+ };
+
+ mipicsi5: csi@12690000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x12690000 0x0 0x124>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI1_1_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI1_1_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ tesla,syscon-csis = <&sysreg_cam 0x40c>;
+ fsl,num-channels = <4>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_5_out: endpoint {
+ remote-endpoint = <&csis_in_5>;
+ };
+ };
+ };
+ };
+
+ csis5: csis@12691000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x12691000 0x0 0x44c>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI1_1_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI1_1_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+
+ port {
+ csis_in_5: endpoint {
+ remote-endpoint = <&mipi_csis_5_out>;
+ };
+ };
+ };
+
+ mipicsi6: csi@126a0000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x126a0000 0x0 0x124>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI1_2_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI1_2_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ tesla,syscon-csis = <&sysreg_cam 0x40c>;
+ fsl,num-channels = <4>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_6_out: endpoint {
+ remote-endpoint = <&csis_in_6>;
+ };
+ };
+ };
+ };
+
+ csis6: csis@126a1000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x126a1000 0x0 0x44c>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI1_2_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI1_2_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+
+ port {
+ csis_in_6: endpoint {
+ remote-endpoint = <&mipi_csis_6_out>;
+ };
+ };
+ };
+
+ mipicsi7: csi@126b0000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x126b0000 0x0 0x124>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI1_3_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI1_3_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ tesla,syscon-csis = <&sysreg_cam 0x40c>;
+ fsl,num-channels = <4>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_7_out: endpoint {
+ remote-endpoint = <&csis_in_7>;
+ };
+ };
+ };
+ };
+
+ csis7: csis@126b1000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x126b1000 0x0 0x44c>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI1_3_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI1_3_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+
+ port {
+ csis_in_7: endpoint {
+ remote-endpoint = <&mipi_csis_7_out>;
+ };
+ };
+ };
+
+ mipicsi8: csi@126c0000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x126c0000 0x0 0x124>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI2_0_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI2_0_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ tesla,syscon-csis = <&sysreg_cam 0x40c>;
+ fsl,num-channels = <4>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_8_out: endpoint {
+ remote-endpoint = <&csis_in_8>;
+ };
+ };
+ };
+ };
+
+ csis8: csis@126c1000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x126c1000 0x0 0x44c>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI2_0_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI2_0_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+
+ port {
+ csis_in_8: endpoint {
+ remote-endpoint = <&mipi_csis_8_out>;
+ };
+ };
+ };
+
+ mipicsi9: csi@126d0000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x126d0000 0x0 0x124>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI2_1_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI2_1_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ tesla,syscon-csis = <&sysreg_cam 0x40c>;
+ fsl,num-channels = <4>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_9_out: endpoint {
+ remote-endpoint = <&csis_in_9>;
+ };
+ };
+ };
+ };
+
+ csis9: csis@126d1000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x126d1000 0x0 0x44c>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI2_1_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI2_1_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+
+ port {
+ csis_in_9: endpoint {
+ remote-endpoint = <&mipi_csis_9_out>;
+ };
+ };
+ };
+
+ mipicsi10: csi@126e0000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x126e0000 0x0 0x124>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI2_2_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI2_2_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ tesla,syscon-csis = <&sysreg_cam 0x40c>;
+ fsl,num-channels = <4>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_10_out: endpoint {
+ remote-endpoint = <&csis_in_10>;
+ };
+ };
+ };
+ };
+
+ csis10: csis@126e1000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x126e1000 0x0 0x44c>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI2_2_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI2_2_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+
+ port {
+ csis_in_10: endpoint {
+ remote-endpoint = <&mipi_csis_10_out>;
+ };
+ };
+ };
+
+ mipicsi11: csi@126f0000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x126f0000 0x0 0x124>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI2_3_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI2_3_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ tesla,syscon-csis = <&sysreg_cam 0x40c>;
+ fsl,num-channels = <4>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_11_out: endpoint {
+ remote-endpoint = <&csis_in_11>;
+ };
+ };
+ };
+ };
+
+ csis11: csis@126f1000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x126f1000 0x0 0x44c>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI2_3_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI2_3_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+
+ port {
+ csis_in_11: endpoint {
+ remote-endpoint = <&mipi_csis_11_out>;
+ };
+ };
+ };
+
clock_mfc: clock-controller@12810000 {
compatible = "tesla,fsd-clock-mfc";
reg = <0x0 0x12810000 0x0 0x3000>;
--
2.49.0On Thu, 28 Aug 2025 14:09:26 +0530, Inbaraj E wrote: > The Tesla FSD SoC CSIS IP bundles MIPI CSI-2 link controller and video > capture interface. Add nodes describing the MIPI CSI-2 link controller > and video capture interface. > > Signed-off-by: Inbaraj E <inbaraj.e@samsung.com> > --- > > Changes since v2: > - Changed generic node name > - Fixed node ordering > > Here is patch link for v2: > https://lore.kernel.org/linux-media/20250814140943.22531-1-inbaraj.e@samsung.com/ > > This patch is dependent on below patchset > https://lore.kernel.org/linux-media/20250822002734.23516-1-laurent.pinchart@ideasonboard.com/T/#t > > arch/arm64/boot/dts/tesla/fsd.dtsi | 540 +++++++++++++++++++++++++++++ > 1 file changed, 540 insertions(+) > My bot found new DTB warnings on the .dts files added or changed in this series. Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments. If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date: pip3 install dtschema --upgrade This patch series was applied (using b4) to base: Base: attempting to guess base-commit... Base: tags/next-20250828 (exact match) If this is not the correct base, please add 'base-commit' tag (or use b4 which does this automatically) New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/tesla/' for 20250828083926.16849-1-inbaraj.e@samsung.com: arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csi@12640000: failed to match any schema with compatible: ['tesla,fsd-mipi-csi2'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csis@12641000: failed to match any schema with compatible: ['tesla,fsd-csis-media'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csi@12650000: failed to match any schema with compatible: ['tesla,fsd-mipi-csi2'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csis@12651000: failed to match any schema with compatible: ['tesla,fsd-csis-media'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csi@12660000: failed to match any schema with compatible: ['tesla,fsd-mipi-csi2'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csis@12661000: failed to match any schema with compatible: ['tesla,fsd-csis-media'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csi@12670000: failed to match any schema with compatible: ['tesla,fsd-mipi-csi2'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csis@12671000: failed to match any schema with compatible: ['tesla,fsd-csis-media'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csi@12680000: failed to match any schema with compatible: ['tesla,fsd-mipi-csi2'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csis@12681000: failed to match any schema with compatible: ['tesla,fsd-csis-media'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csi@12690000: failed to match any schema with compatible: ['tesla,fsd-mipi-csi2'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csis@12691000: failed to match any schema with compatible: ['tesla,fsd-csis-media'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csi@126a0000: failed to match any schema with compatible: ['tesla,fsd-mipi-csi2'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csis@126a1000: failed to match any schema with compatible: ['tesla,fsd-csis-media'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csi@126b0000: failed to match any schema with compatible: ['tesla,fsd-mipi-csi2'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csis@126b1000: failed to match any schema with compatible: ['tesla,fsd-csis-media'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csi@126c0000: failed to match any schema with compatible: ['tesla,fsd-mipi-csi2'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csis@126c1000: failed to match any schema with compatible: ['tesla,fsd-csis-media'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csi@126d0000: failed to match any schema with compatible: ['tesla,fsd-mipi-csi2'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csis@126d1000: failed to match any schema with compatible: ['tesla,fsd-csis-media'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csi@126e0000: failed to match any schema with compatible: ['tesla,fsd-mipi-csi2'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csis@126e1000: failed to match any schema with compatible: ['tesla,fsd-csis-media'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csi@126f0000: failed to match any schema with compatible: ['tesla,fsd-mipi-csi2'] arch/arm64/boot/dts/tesla/fsd-evb.dtb: /soc@0/csis@126f1000: failed to match any schema with compatible: ['tesla,fsd-csis-media']
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