Add cppc_get_perf_ctrls() to read performance control register values.
Rename existing APIs for clarity as:
- To distinguish between:
- Feedback counters (fb_ctrs): Read-only performance monitoring data.
- Performance controls (perf_ctrls): Read-write config registers.
- cppc_set_epp_perf() updates both EPP and Autonomous Selection.
API's renamed:
- cppc_set_perf() to cppc_set_perf_ctrls().
- cppc_get_perf_ctrs() to cppc_get_perf_fb_ctrs().
- cppc_get_perf_ctrs_sample() to cppc_get_perf_fb_ctrs_sample().
- cppc_set_epp_perf() to cppc_set_epp_and_autosel().
Remove redundant energy_perf field from 'struct cppc_perf_caps' since
the same information is available in 'struct cppc_perf_ctrls' which is
actively used.
All existing callers are updated to maintain compatibility.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
---
drivers/acpi/cppc_acpi.c | 95 +++++++++++++++++++++++++++++-----
drivers/cpufreq/amd-pstate.c | 2 +-
drivers/cpufreq/cppc_cpufreq.c | 26 +++++-----
include/acpi/cppc_acpi.h | 18 ++++---
4 files changed, 106 insertions(+), 35 deletions(-)
diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
index 6b649031808f..24baaa298af3 100644
--- a/drivers/acpi/cppc_acpi.c
+++ b/drivers/acpi/cppc_acpi.c
@@ -58,7 +58,7 @@ struct cppc_pcc_data {
/*
* Lock to provide controlled access to the PCC channel.
*
- * For performance critical usecases(currently cppc_set_perf)
+ * For performance critical usecases(currently cppc_set_perf_ctrls)
* We need to take read_lock and check if channel belongs to OSPM
* before reading or writing to PCC subspace
* We need to take write_lock before transferring the channel
@@ -182,8 +182,8 @@ show_cppc_data(cppc_get_perf_caps, cppc_perf_caps, guaranteed_perf);
show_cppc_data(cppc_get_perf_caps, cppc_perf_caps, lowest_freq);
show_cppc_data(cppc_get_perf_caps, cppc_perf_caps, nominal_freq);
-show_cppc_data(cppc_get_perf_ctrs, cppc_perf_fb_ctrs, reference_perf);
-show_cppc_data(cppc_get_perf_ctrs, cppc_perf_fb_ctrs, wraparound_time);
+show_cppc_data(cppc_get_perf_fb_ctrs, cppc_perf_fb_ctrs, reference_perf);
+show_cppc_data(cppc_get_perf_fb_ctrs, cppc_perf_fb_ctrs, wraparound_time);
/* Check for valid access_width, otherwise, fallback to using bit_width */
#define GET_BIT_WIDTH(reg) ((reg)->access_width ? (8 << ((reg)->access_width - 1)) : (reg)->bit_width)
@@ -202,7 +202,7 @@ static ssize_t show_feedback_ctrs(struct kobject *kobj,
struct cppc_perf_fb_ctrs fb_ctrs = {0};
int ret;
- ret = cppc_get_perf_ctrs(cpc_ptr->cpu_id, &fb_ctrs);
+ ret = cppc_get_perf_fb_ctrs(cpc_ptr->cpu_id, &fb_ctrs);
if (ret)
return ret;
@@ -1427,7 +1427,7 @@ EXPORT_SYMBOL_GPL(cppc_get_perf_caps);
*
* CPPC has flexibility about how CPU performance counters are accessed.
* One of the choices is PCC regions, which can have a high access latency. This
- * routine allows callers of cppc_get_perf_ctrs() to know this ahead of time.
+ * routine allows callers of cppc_get_perf_fb_ctrs() to know this ahead of time.
*
* Return: true if any of the counters are in PCC regions, false otherwise
*/
@@ -1465,13 +1465,13 @@ bool cppc_perf_ctrs_in_pcc(void)
EXPORT_SYMBOL_GPL(cppc_perf_ctrs_in_pcc);
/**
- * cppc_get_perf_ctrs - Read a CPU's performance feedback counters.
+ * cppc_get_perf_fb_ctrs - Read a CPU's performance feedback counters.
* @cpunum: CPU from which to read counters.
* @perf_fb_ctrs: ptr to cppc_perf_fb_ctrs. See cppc_acpi.h
*
* Return: 0 for success with perf_fb_ctrs populated else -ERRNO.
*/
-int cppc_get_perf_ctrs(int cpunum, struct cppc_perf_fb_ctrs *perf_fb_ctrs)
+int cppc_get_perf_fb_ctrs(int cpunum, struct cppc_perf_fb_ctrs *perf_fb_ctrs)
{
struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpunum);
struct cpc_register_resource *delivered_reg, *reference_reg,
@@ -1542,13 +1542,13 @@ int cppc_get_perf_ctrs(int cpunum, struct cppc_perf_fb_ctrs *perf_fb_ctrs)
up_write(&pcc_ss_data->pcc_lock);
return ret;
}
-EXPORT_SYMBOL_GPL(cppc_get_perf_ctrs);
+EXPORT_SYMBOL_GPL(cppc_get_perf_fb_ctrs);
/*
* Set Energy Performance Preference Register value through
* Performance Controls Interface
*/
-int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable)
+int cppc_set_epp_and_autosel(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable)
{
int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu);
struct cpc_register_resource *epp_set_reg;
@@ -1599,7 +1599,7 @@ int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable)
return ret;
}
-EXPORT_SYMBOL_GPL(cppc_set_epp_perf);
+EXPORT_SYMBOL_GPL(cppc_set_epp_and_autosel);
/**
* cppc_set_epp() - Write the EPP register.
@@ -1731,15 +1731,82 @@ int cppc_set_enable(int cpu, bool enable)
return cppc_set_reg_val(cpu, ENABLE, enable);
}
EXPORT_SYMBOL_GPL(cppc_set_enable);
+/**
+ * cppc_get_perf_ctrls - Get a CPU's performance controls.
+ * @cpu: CPU for which to get performance controls.
+ * @perf_ctrls: ptr to cppc_perf_ctrls. See cppc_acpi.h
+ *
+ * Return: 0 for success with perf_ctrls, -ERRNO otherwise.
+ */
+int cppc_get_perf_ctrls(int cpu, struct cppc_perf_ctrls *perf_ctrls)
+{
+ struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu);
+ struct cpc_register_resource *desired_perf_reg, *min_perf_reg, *max_perf_reg,
+ *energy_perf_reg;
+ u64 max, min, desired_perf, energy_perf;
+ int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu);
+ struct cppc_pcc_data *pcc_ss_data = NULL;
+ int ret = 0, regs_in_pcc = 0;
+
+ if (!cpc_desc) {
+ pr_debug("No CPC descriptor for CPU:%d\n", cpu);
+ return -ENODEV;
+ }
+
+ desired_perf_reg = &cpc_desc->cpc_regs[DESIRED_PERF];
+ min_perf_reg = &cpc_desc->cpc_regs[MIN_PERF];
+ max_perf_reg = &cpc_desc->cpc_regs[MAX_PERF];
+ energy_perf_reg = &cpc_desc->cpc_regs[ENERGY_PERF];
+
+ /* Are any of the regs PCC ?*/
+ if (CPC_IN_PCC(desired_perf_reg) || CPC_IN_PCC(min_perf_reg) ||
+ CPC_IN_PCC(max_perf_reg) || CPC_IN_PCC(energy_perf_reg)) {
+ if (pcc_ss_id < 0) {
+ pr_debug("Invalid pcc_ss_id\n");
+ return -ENODEV;
+ }
+ pcc_ss_data = pcc_data[pcc_ss_id];
+ regs_in_pcc = 1;
+ down_write(&pcc_ss_data->pcc_lock);
+ /* Ring doorbell once to update PCC subspace */
+ if (send_pcc_cmd(pcc_ss_id, CMD_READ) < 0) {
+ ret = -EIO;
+ goto out_err;
+ }
+ }
+
+ /* Read optional elements if present */
+ if (CPC_SUPPORTED(max_perf_reg))
+ cpc_read(cpu, max_perf_reg, &max);
+ perf_ctrls->max_perf = max;
+
+ if (CPC_SUPPORTED(min_perf_reg))
+ cpc_read(cpu, min_perf_reg, &min);
+ perf_ctrls->min_perf = min;
+
+ if (CPC_SUPPORTED(desired_perf_reg))
+ cpc_read(cpu, desired_perf_reg, &desired_perf);
+ perf_ctrls->desired_perf = desired_perf;
+
+ if (CPC_SUPPORTED(energy_perf_reg))
+ cpc_read(cpu, energy_perf_reg, &energy_perf);
+ perf_ctrls->energy_perf = energy_perf;
+
+out_err:
+ if (regs_in_pcc)
+ up_write(&pcc_ss_data->pcc_lock);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(cppc_get_perf_ctrls);
/**
- * cppc_set_perf - Set a CPU's performance controls.
+ * cppc_set_perf_ctrls - Set a CPU's performance controls.
* @cpu: CPU for which to set performance controls.
* @perf_ctrls: ptr to cppc_perf_ctrls. See cppc_acpi.h
*
* Return: 0 for success, -ERRNO otherwise.
*/
-int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls)
+int cppc_set_perf_ctrls(int cpu, struct cppc_perf_ctrls *perf_ctrls)
{
struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu);
struct cpc_register_resource *desired_reg, *min_perf_reg, *max_perf_reg;
@@ -1803,7 +1870,7 @@ int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls)
/*
* This is Phase-II where we transfer the ownership of PCC to Platform
*
- * Short Summary: Basically if we think of a group of cppc_set_perf
+ * Short Summary: Basically if we think of a group of cppc_set_perf_ctrls
* requests that happened in short overlapping interval. The last CPU to
* come out of Phase-I will enter Phase-II and ring the doorbell.
*
@@ -1862,7 +1929,7 @@ int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls)
}
return ret;
}
-EXPORT_SYMBOL_GPL(cppc_set_perf);
+EXPORT_SYMBOL_GPL(cppc_set_perf_ctrls);
/**
* cppc_get_transition_latency - returns frequency transition latency in ns
diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index bbc27ef9edf7..b98539d1a6aa 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -355,7 +355,7 @@ static int shmem_set_epp(struct cpufreq_policy *policy, u8 epp)
return 0;
perf_ctrls.energy_perf = epp;
- ret = cppc_set_epp_perf(cpudata->cpu, &perf_ctrls, 1);
+ ret = cppc_set_epp_and_autosel(cpudata->cpu, &perf_ctrls, 1);
if (ret) {
pr_debug("failed to set energy perf value (%d)\n", ret);
return ret;
diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c
index ecbeb12f46e6..e4666836306d 100644
--- a/drivers/cpufreq/cppc_cpufreq.c
+++ b/drivers/cpufreq/cppc_cpufreq.c
@@ -81,7 +81,7 @@ static void cppc_scale_freq_workfn(struct kthread_work *work)
cppc_fi = container_of(work, struct cppc_freq_invariance, work);
cpu_data = cppc_fi->cpu_data;
- if (cppc_get_perf_ctrs(cppc_fi->cpu, &fb_ctrs)) {
+ if (cppc_get_perf_fb_ctrs(cppc_fi->cpu, &fb_ctrs)) {
pr_warn("%s: failed to read perf counters\n", __func__);
return;
}
@@ -115,7 +115,7 @@ static void cppc_scale_freq_tick(void)
struct cppc_freq_invariance *cppc_fi = &per_cpu(cppc_freq_inv, smp_processor_id());
/*
- * cppc_get_perf_ctrs() can potentially sleep, call that from the right
+ * cppc_get_perf_fb_ctrs() can potentially sleep, call that from the right
* context.
*/
irq_work_queue(&cppc_fi->irq_work);
@@ -141,7 +141,7 @@ static void cppc_cpufreq_cpu_fie_init(struct cpufreq_policy *policy)
kthread_init_work(&cppc_fi->work, cppc_scale_freq_workfn);
init_irq_work(&cppc_fi->irq_work, cppc_irq_work);
- ret = cppc_get_perf_ctrs(cpu, &cppc_fi->prev_perf_fb_ctrs);
+ ret = cppc_get_perf_fb_ctrs(cpu, &cppc_fi->prev_perf_fb_ctrs);
if (ret) {
pr_warn("%s: failed to read perf counters for cpu:%d: %d\n",
__func__, cpu, ret);
@@ -271,7 +271,7 @@ static int cppc_cpufreq_set_target(struct cpufreq_policy *policy,
freqs.new = target_freq;
cpufreq_freq_transition_begin(policy, &freqs);
- ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls);
+ ret = cppc_set_perf_ctrls(cpu, &cpu_data->perf_ctrls);
cpufreq_freq_transition_end(policy, &freqs, ret != 0);
if (ret)
@@ -291,7 +291,7 @@ static unsigned int cppc_cpufreq_fast_switch(struct cpufreq_policy *policy,
desired_perf = cppc_khz_to_perf(&cpu_data->perf_caps, target_freq);
cpu_data->perf_ctrls.desired_perf = desired_perf;
- ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls);
+ ret = cppc_set_perf_ctrls(cpu, &cpu_data->perf_ctrls);
if (ret) {
pr_debug("Failed to set target on CPU:%d. ret:%d\n",
@@ -640,7 +640,7 @@ static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
policy->cur = cppc_perf_to_khz(caps, caps->highest_perf);
cpu_data->perf_ctrls.desired_perf = caps->highest_perf;
- ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls);
+ ret = cppc_set_perf_ctrls(cpu, &cpu_data->perf_ctrls);
if (ret) {
pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
caps->highest_perf, cpu, ret);
@@ -666,7 +666,7 @@ static void cppc_cpufreq_cpu_exit(struct cpufreq_policy *policy)
cpu_data->perf_ctrls.desired_perf = caps->lowest_perf;
- ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls);
+ ret = cppc_set_perf_ctrls(cpu, &cpu_data->perf_ctrls);
if (ret)
pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
caps->lowest_perf, cpu, ret);
@@ -705,19 +705,19 @@ static int cppc_perf_from_fbctrs(struct cppc_perf_fb_ctrs *fb_ctrs_t0,
return (reference_perf * delta_delivered) / delta_reference;
}
-static int cppc_get_perf_ctrs_sample(int cpu,
- struct cppc_perf_fb_ctrs *fb_ctrs_t0,
- struct cppc_perf_fb_ctrs *fb_ctrs_t1)
+static int cppc_get_perf_fb_ctrs_sample(int cpu,
+ struct cppc_perf_fb_ctrs *fb_ctrs_t0,
+ struct cppc_perf_fb_ctrs *fb_ctrs_t1)
{
int ret;
- ret = cppc_get_perf_ctrs(cpu, fb_ctrs_t0);
+ ret = cppc_get_perf_fb_ctrs(cpu, fb_ctrs_t0);
if (ret)
return ret;
udelay(2); /* 2usec delay between sampling */
- return cppc_get_perf_ctrs(cpu, fb_ctrs_t1);
+ return cppc_get_perf_fb_ctrs(cpu, fb_ctrs_t1);
}
static unsigned int cppc_cpufreq_get_rate(unsigned int cpu)
@@ -735,7 +735,7 @@ static unsigned int cppc_cpufreq_get_rate(unsigned int cpu)
cpufreq_cpu_put(policy);
- ret = cppc_get_perf_ctrs_sample(cpu, &fb_ctrs_t0, &fb_ctrs_t1);
+ ret = cppc_get_perf_fb_ctrs_sample(cpu, &fb_ctrs_t0, &fb_ctrs_t1);
if (ret) {
if (ret == -EFAULT)
/* Any of the associated CPPC regs is 0. */
diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h
index 20f3d62e7a16..2f2dbeeced65 100644
--- a/include/acpi/cppc_acpi.h
+++ b/include/acpi/cppc_acpi.h
@@ -119,7 +119,6 @@ struct cppc_perf_caps {
u32 lowest_nonlinear_perf;
u32 lowest_freq;
u32 nominal_freq;
- u32 energy_perf;
bool auto_sel;
};
@@ -150,8 +149,9 @@ struct cppc_cpudata {
extern int cppc_get_desired_perf(int cpunum, u64 *desired_perf);
extern int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf);
extern int cppc_get_highest_perf(int cpunum, u64 *highest_perf);
-extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs);
-extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls);
+extern int cppc_get_perf_fb_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs);
+extern int cppc_get_perf_ctrls(int cpu, struct cppc_perf_ctrls *perf_ctrls);
+extern int cppc_set_perf_ctrls(int cpu, struct cppc_perf_ctrls *perf_ctrls);
extern int cppc_set_enable(int cpu, bool enable);
extern int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps);
extern bool cppc_perf_ctrs_in_pcc(void);
@@ -166,7 +166,7 @@ extern bool cpc_supported_by_cpu(void);
extern int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val);
extern int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val);
extern int cppc_get_epp_perf(int cpunum, u64 *epp_perf);
-extern int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable);
+extern int cppc_set_epp_and_autosel(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable);
extern int cppc_set_epp(int cpu, u64 epp_val);
extern int cppc_get_auto_act_window(int cpu, u64 *auto_act_window);
extern int cppc_set_auto_act_window(int cpu, u64 auto_act_window);
@@ -188,11 +188,15 @@ static inline int cppc_get_highest_perf(int cpunum, u64 *highest_perf)
{
return -EOPNOTSUPP;
}
-static inline int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs)
+static inline int cppc_get_perf_fb_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs)
+{
+ return -EOPNOTSUPP;
+}
+static inline int cppc_get_perf_ctrls(int cpu, struct cppc_perf_ctrls *perf_ctrls)
{
return -EOPNOTSUPP;
}
-static inline int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls)
+static inline int cppc_set_perf_ctrls(int cpu, struct cppc_perf_ctrls *perf_ctrls)
{
return -EOPNOTSUPP;
}
@@ -232,7 +236,7 @@ static inline int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)
{
return -EOPNOTSUPP;
}
-static inline int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable)
+static inline int cppc_set_epp_and_autosel(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable)
{
return -EOPNOTSUPP;
}
--
2.34.1Hi Sumit,
kernel test robot noticed the following build errors:
[auto build test ERROR on rafael-pm/linux-next]
[also build test ERROR on rafael-pm/bleeding-edge linus/master v6.17-rc3 next-20250825]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Sumit-Gupta/ACPI-CPPC-add-perf-control-read-API-and-clarify-naming/20250824-040531
base: https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git linux-next
patch link: https://lore.kernel.org/r/20250823200121.1320197-2-sumitg%40nvidia.com
patch subject: [PATCH v2 1/7] ACPI: CPPC: add perf control read API and clarify naming
config: x86_64-kexec (https://download.01.org/0day-ci/archive/20250826/202508260711.I7imWLTG-lkp@intel.com/config)
compiler: clang version 20.1.8 (https://github.com/llvm/llvm-project 87f0227cb60147a26a1eeb4fb06e3b505e9c7261)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250826/202508260711.I7imWLTG-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202508260711.I7imWLTG-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/cpufreq/amd-pstate.c:524:8: error: call to undeclared function 'cppc_set_perf'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
524 | ret = cppc_set_perf(cpudata->cpu, &perf_ctrls);
| ^
drivers/cpufreq/amd-pstate.c:524:8: note: did you mean 'cppc_set_epp'?
include/acpi/cppc_acpi.h:170:12: note: 'cppc_set_epp' declared here
170 | extern int cppc_set_epp(int cpu, u64 epp_val);
| ^
1 error generated.
vim +/cppc_set_perf +524 drivers/cpufreq/amd-pstate.c
e059c184da47e9 Huang Rui 2021-12-24 480
77fbea69b0ffad Mario Limonciello 2024-12-09 481 static int shmem_update_perf(struct cpufreq_policy *policy, u8 min_perf,
555bbe67a622b2 Dhananjay Ugwekar 2025-02-05 482 u8 des_perf, u8 max_perf, u8 epp, bool fast_switch)
e059c184da47e9 Huang Rui 2021-12-24 483 {
77fbea69b0ffad Mario Limonciello 2024-12-09 484 struct amd_cpudata *cpudata = policy->driver_data;
e059c184da47e9 Huang Rui 2021-12-24 485 struct cppc_perf_ctrls perf_ctrls;
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 486 u64 value, prev;
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 487 int ret;
e059c184da47e9 Huang Rui 2021-12-24 488
fff395796917ac Mario Limonciello 2024-12-09 489 if (cppc_state == AMD_PSTATE_ACTIVE) {
77fbea69b0ffad Mario Limonciello 2024-12-09 490 int ret = shmem_set_epp(policy, epp);
fff395796917ac Mario Limonciello 2024-12-09 491
fff395796917ac Mario Limonciello 2024-12-09 492 if (ret)
fff395796917ac Mario Limonciello 2024-12-09 493 return ret;
fff395796917ac Mario Limonciello 2024-12-09 494 }
fff395796917ac Mario Limonciello 2024-12-09 495
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 496 value = prev = READ_ONCE(cpudata->cppc_req_cached);
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 497
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 498 value &= ~(AMD_CPPC_MAX_PERF_MASK | AMD_CPPC_MIN_PERF_MASK |
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 499 AMD_CPPC_DES_PERF_MASK | AMD_CPPC_EPP_PERF_MASK);
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 500 value |= FIELD_PREP(AMD_CPPC_MAX_PERF_MASK, max_perf);
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 501 value |= FIELD_PREP(AMD_CPPC_DES_PERF_MASK, des_perf);
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 502 value |= FIELD_PREP(AMD_CPPC_MIN_PERF_MASK, min_perf);
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 503 value |= FIELD_PREP(AMD_CPPC_EPP_PERF_MASK, epp);
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 504
77fbea69b0ffad Mario Limonciello 2024-12-09 505 if (trace_amd_pstate_epp_perf_enabled()) {
77fbea69b0ffad Mario Limonciello 2024-12-09 506 union perf_cached perf = READ_ONCE(cpudata->perf);
77fbea69b0ffad Mario Limonciello 2024-12-09 507
77fbea69b0ffad Mario Limonciello 2024-12-09 508 trace_amd_pstate_epp_perf(cpudata->cpu,
77fbea69b0ffad Mario Limonciello 2024-12-09 509 perf.highest_perf,
77fbea69b0ffad Mario Limonciello 2024-12-09 510 epp,
77fbea69b0ffad Mario Limonciello 2024-12-09 511 min_perf,
77fbea69b0ffad Mario Limonciello 2024-12-09 512 max_perf,
77fbea69b0ffad Mario Limonciello 2024-12-09 513 policy->boost_enabled,
77fbea69b0ffad Mario Limonciello 2024-12-09 514 value != prev);
77fbea69b0ffad Mario Limonciello 2024-12-09 515 }
77fbea69b0ffad Mario Limonciello 2024-12-09 516
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 517 if (value == prev)
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 518 return 0;
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 519
e059c184da47e9 Huang Rui 2021-12-24 520 perf_ctrls.max_perf = max_perf;
e059c184da47e9 Huang Rui 2021-12-24 521 perf_ctrls.min_perf = min_perf;
e059c184da47e9 Huang Rui 2021-12-24 522 perf_ctrls.desired_perf = des_perf;
e059c184da47e9 Huang Rui 2021-12-24 523
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 @524 ret = cppc_set_perf(cpudata->cpu, &perf_ctrls);
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 525 if (ret)
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 526 return ret;
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 527
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 528 WRITE_ONCE(cpudata->cppc_req_cached, value);
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 529
9f5daa2f2f6ddd Mario Limonciello 2024-12-09 530 return 0;
e059c184da47e9 Huang Rui 2021-12-24 531 }
e059c184da47e9 Huang Rui 2021-12-24 532
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
On Sat, Aug 23, 2025 at 10:02 PM Sumit Gupta <sumitg@nvidia.com> wrote: > > Add cppc_get_perf_ctrls() to read performance control register values. > Rename existing APIs for clarity as: > - To distinguish between: > - Feedback counters (fb_ctrs): Read-only performance monitoring data. > - Performance controls (perf_ctrls): Read-write config registers. > - cppc_set_epp_perf() updates both EPP and Autonomous Selection. > > API's renamed: > - cppc_set_perf() to cppc_set_perf_ctrls(). > - cppc_get_perf_ctrs() to cppc_get_perf_fb_ctrs(). > - cppc_get_perf_ctrs_sample() to cppc_get_perf_fb_ctrs_sample(). > - cppc_set_epp_perf() to cppc_set_epp_and_autosel(). > Remove redundant energy_perf field from 'struct cppc_perf_caps' since > the same information is available in 'struct cppc_perf_ctrls' which is > actively used. > > All existing callers are updated to maintain compatibility. First, this is too much in one patch IMV and second, I honestly don't see a reason for the renames above. This generally makes tracking the code changes history harder. Thanks!
On 26/08/25 00:03, Rafael J. Wysocki wrote: > External email: Use caution opening links or attachments > > > On Sat, Aug 23, 2025 at 10:02 PM Sumit Gupta <sumitg@nvidia.com> wrote: >> Add cppc_get_perf_ctrls() to read performance control register values. >> Rename existing APIs for clarity as: >> - To distinguish between: >> - Feedback counters (fb_ctrs): Read-only performance monitoring data. >> - Performance controls (perf_ctrls): Read-write config registers. >> - cppc_set_epp_perf() updates both EPP and Autonomous Selection. >> >> API's renamed: >> - cppc_set_perf() to cppc_set_perf_ctrls(). >> - cppc_get_perf_ctrs() to cppc_get_perf_fb_ctrs(). >> - cppc_get_perf_ctrs_sample() to cppc_get_perf_fb_ctrs_sample(). >> - cppc_set_epp_perf() to cppc_set_epp_and_autosel(). >> Remove redundant energy_perf field from 'struct cppc_perf_caps' since >> the same information is available in 'struct cppc_perf_ctrls' which is >> actively used. >> >> All existing callers are updated to maintain compatibility. > First, this is too much in one patch IMV and second, I honestly don't > see a reason for the renames above. > > This generally makes tracking the code changes history harder. > > Thanks! Did the renaming for clarity and better readability. If we don't want to do that then i can drop the renaming and keep other changes. Also, split this patch into two as below: Patch1: Add cppc_get_perf() API. Patch2: - Update both EPP and Autonomous Selection in cppc_set_epp_perf(). - Remove redundant energy_perf field from 'struct cppc_perf_caps'. Thank you, Sumit Gupta
On Mon, Sep 1, 2025 at 3:46 PM Sumit Gupta <sumitg@nvidia.com> wrote: > > > On 26/08/25 00:03, Rafael J. Wysocki wrote: > > External email: Use caution opening links or attachments > > > > > > On Sat, Aug 23, 2025 at 10:02 PM Sumit Gupta <sumitg@nvidia.com> wrote: > >> Add cppc_get_perf_ctrls() to read performance control register values. > >> Rename existing APIs for clarity as: > >> - To distinguish between: > >> - Feedback counters (fb_ctrs): Read-only performance monitoring data. > >> - Performance controls (perf_ctrls): Read-write config registers. > >> - cppc_set_epp_perf() updates both EPP and Autonomous Selection. > >> > >> API's renamed: > >> - cppc_set_perf() to cppc_set_perf_ctrls(). > >> - cppc_get_perf_ctrs() to cppc_get_perf_fb_ctrs(). > >> - cppc_get_perf_ctrs_sample() to cppc_get_perf_fb_ctrs_sample(). > >> - cppc_set_epp_perf() to cppc_set_epp_and_autosel(). > >> Remove redundant energy_perf field from 'struct cppc_perf_caps' since > >> the same information is available in 'struct cppc_perf_ctrls' which is > >> actively used. > >> > >> All existing callers are updated to maintain compatibility. > > > > First, this is too much in one patch IMV and second, I honestly don't > > see a reason for the renames above. > > > > This generally makes tracking the code changes history harder. > > > > Thanks! > > Did the renaming for clarity and better readability. > If we don't want to do that then i can drop the renaming and keep other > changes. Please do. > Also, split this patch into two as below: > Patch1: Add cppc_get_perf() API. > > Patch2: > - Update both EPP and Autonomous Selection in > cppc_set_epp_perf(). > - Remove redundant energy_perf field from 'struct > cppc_perf_caps'. Sounds reasonable to me. Thanks!
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