.../devicetree/bindings/arm/aspeed/aspeed.yaml | 1 + arch/arm/boot/dts/aspeed/Makefile | 1 + .../boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dts | 1078 ++++++++++++++++++++ .../dts/aspeed/nvidia-mgx-cx8-switch-north.dtsi | 80 ++ .../dts/aspeed/nvidia-mgx-cx8-switch-south.dtsi | 80 ++ 5 files changed, 1240 insertions(+)
Patch 1 Adds the binding for the Nvidia mgx cx8 switchboard Patch 2 Adds dtsi's for the mgx cx8 switchboard itself Patch 3 Adds the dts for the mgx cx8 switchboard motherboard reference implementation. This is an Aspeed AST2600 based reference implementation for a BMC managing an Nvidia mgx cx8 switchboard. Dtsi files are broken out for managing the mgx cx8 switchboard over i2c, so that others may reuse these if they choose to implement their own board. There are two dtsi files since the i2c topology is not symmetric between busses going to the mgx cx8 switchboard. Reference to Ast2600 SoC [1]. Link: https://www.aspeedtech.com/server_ast2600/ [1] Signed-off-by: Marc Olberding <molberding@nvidia.com> --- Marc Olberding (3): dt-bindings: arm: aspeed: Add Nvidia's mgx4u BMC ARM: dts: aspeed: Add device tree includes for the cx8 switchboard ARM: dts: aspeed: Add device tree for mgx4u BMC .../devicetree/bindings/arm/aspeed/aspeed.yaml | 1 + arch/arm/boot/dts/aspeed/Makefile | 1 + .../boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dts | 1078 ++++++++++++++++++++ .../dts/aspeed/nvidia-mgx-cx8-switch-north.dtsi | 80 ++ .../dts/aspeed/nvidia-mgx-cx8-switch-south.dtsi | 80 ++ 5 files changed, 1240 insertions(+) --- base-commit: 7bac2c97af4078d7a627500c9bcdd5b033f97718 change-id: 20250813-mgx4u_devicetree-c2e130607089 Best regards, -- Marc Olberding <molberding@nvidia.com>
On Fri, 15 Aug 2025 12:45:54 -0700, Marc Olberding wrote: > Patch 1 Adds the binding for the Nvidia mgx cx8 switchboard > Patch 2 Adds dtsi's for the mgx cx8 switchboard itself > Patch 3 Adds the dts for the mgx cx8 switchboard motherboard reference implementation. > > This is an Aspeed AST2600 based reference implementation for a BMC > managing an Nvidia mgx cx8 switchboard. Dtsi files are broken out for > managing the mgx cx8 switchboard over i2c, so that others may reuse these > if they choose to implement their own board. There are two dtsi files > since the i2c topology is not symmetric between busses going to the mgx cx8 > switchboard. > > Reference to Ast2600 SoC [1]. > > Link: https://www.aspeedtech.com/server_ast2600/ [1] > > > Signed-off-by: Marc Olberding <molberding@nvidia.com> > --- > Marc Olberding (3): > dt-bindings: arm: aspeed: Add Nvidia's mgx4u BMC > ARM: dts: aspeed: Add device tree includes for the cx8 switchboard > ARM: dts: aspeed: Add device tree for mgx4u BMC > > .../devicetree/bindings/arm/aspeed/aspeed.yaml | 1 + > arch/arm/boot/dts/aspeed/Makefile | 1 + > .../boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dts | 1078 ++++++++++++++++++++ > .../dts/aspeed/nvidia-mgx-cx8-switch-north.dtsi | 80 ++ > .../dts/aspeed/nvidia-mgx-cx8-switch-south.dtsi | 80 ++ > 5 files changed, 1240 insertions(+) > --- > base-commit: 7bac2c97af4078d7a627500c9bcdd5b033f97718 > change-id: 20250813-mgx4u_devicetree-c2e130607089 > > Best regards, > -- > Marc Olberding <molberding@nvidia.com> > > > My bot found new DTB warnings on the .dts files added or changed in this series. Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments. If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date: pip3 install dtschema --upgrade This patch series was applied (using b4) to base: Base: using specified base-commit 7bac2c97af4078d7a627500c9bcdd5b033f97718 If this is not the correct base, please add 'base-commit' tag (or use b4 which does this automatically) New warnings running 'make CHECK_DTBS=y for arch/arm/boot/dts/aspeed/' for 20250815-mgx4u_devicetree-v1-0-66db6fa5a7e4@nvidia.com: arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: timer (arm,armv7-timer): 'clocks' does not match any of the regexes: '^pinctrl-[0-9]+$' from schema $id: http://devicetree.org/schemas/timer/arm,arch_timer.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: /sdram@1e6e0000: failed to match any schema with compatible: ['aspeed,ast2600-sdram-edac', 'syscon'] arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: bus@1e600000 (aspeed,ast2600-ahbc): compatible: ['aspeed,ast2600-ahbc', 'syscon'] is too long from schema $id: http://devicetree.org/schemas/bus/aspeed,ast2600-ahbc.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: spi@1e630000 (aspeed,ast2600-spi): Unevaluated properties are not allowed ('fmc-spi-user-mode' was unexpected) from schema $id: http://devicetree.org/schemas/spi/aspeed,ast2600-fmc.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: syscon@1e6e2000 (aspeed,ast2600-scu): 'smp-memram@180' does not match any of the regexes: '^interrupt-controller@[0-9a-f]+$', '^p2a-control@[0-9a-f]+$', '^pinctrl(@[0-9a-f]+)?$', '^pinctrl-[0-9]+$', '^silicon-id@[0-9a-f]+$' from schema $id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: /ahb/apb@1e6e0000/syscon@1e6e2000/smp-memram@180: failed to match any schema with compatible: ['aspeed,ast2600-smpmem'] arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: /ahb/apb@1e6e0000/display@1e6e6000: failed to match any schema with compatible: ['aspeed,ast2600-gfx', 'syscon'] arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: adc@1e6e9000 (aspeed,ast2600-adc0): 'interrupts' does not match any of the regexes: '^pinctrl-[0-9]+$' from schema $id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: adc@1e6e9100 (aspeed,ast2600-adc1): 'interrupts' does not match any of the regexes: '^pinctrl-[0-9]+$' from schema $id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: crypto@1e6fa000 (aspeed,ast2600-acry): 'aspeed,ahbc' does not match any of the regexes: '^pinctrl-[0-9]+$' from schema $id: http://devicetree.org/schemas/crypto/aspeed,ast2600-acry.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: sdc@1e740000 (aspeed,ast2600-sd-controller): sdhci@1e740100:compatible: ['aspeed,ast2600-sdhci', 'sdhci'] is too long from schema $id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: sdc@1e740000 (aspeed,ast2600-sd-controller): sdhci@1e740200:compatible: ['aspeed,ast2600-sdhci', 'sdhci'] is too long from schema $id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: /ahb/sdc@1e740000/sdhci@1e740100: failed to match any schema with compatible: ['aspeed,ast2600-sdhci', 'sdhci'] arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: /ahb/sdc@1e740000/sdhci@1e740200: failed to match any schema with compatible: ['aspeed,ast2600-sdhci', 'sdhci'] arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: /ahb/apb@1e780000/timer@1e782000: failed to match any schema with compatible: ['aspeed,ast2600-timer'] arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: lpc@1e789000 (aspeed,ast2600-lpc-v2): reg-io-width: 4 is not of type 'object' from schema $id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: lpc@1e789000 (aspeed,ast2600-lpc-v2): lpc-snoop@80: 'clocks' does not match any of the regexes: '^pinctrl-[0-9]+$' from schema $id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: kcs@24 (aspeed,ast2500-kcs-bmc-v2): 'clocks' does not match any of the regexes: '^pinctrl-[0-9]+$' from schema $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: kcs@28 (aspeed,ast2500-kcs-bmc-v2): 'clocks' does not match any of the regexes: '^pinctrl-[0-9]+$' from schema $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: kcs@2c (aspeed,ast2500-kcs-bmc-v2): 'clocks' does not match any of the regexes: '^pinctrl-[0-9]+$' from schema $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: kcs@114 (aspeed,ast2500-kcs-bmc-v2): 'clocks' does not match any of the regexes: '^pinctrl-[0-9]+$' from schema $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: /ahb/apb@1e780000/lpc@1e789000/lhc@a0: failed to match any schema with compatible: ['aspeed,ast2600-lhc'] arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: /ahb/apb@1e780000/lpc@1e789000/ibt@140: failed to match any schema with compatible: ['aspeed,ast2600-ibt-bmc'] arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: fsi@1e79b000 (aspeed,ast2600-fsi-master): compatible: ['aspeed,ast2600-fsi-master', 'fsi-master'] is too long from schema $id: http://devicetree.org/schemas/fsi/aspeed,ast2600-fsi-master.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: /ahb/apb@1e790000/fsi@1e79b000: failed to match any schema with compatible: ['aspeed,ast2600-fsi-master', 'fsi-master'] arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: fsi@1e79b100 (aspeed,ast2600-fsi-master): compatible: ['aspeed,ast2600-fsi-master', 'fsi-master'] is too long from schema $id: http://devicetree.org/schemas/fsi/aspeed,ast2600-fsi-master.yaml# arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: /ahb/apb@1e790000/fsi@1e79b100: failed to match any schema with compatible: ['aspeed,ast2600-fsi-master', 'fsi-master'] arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dtb: /ahb/apb@1e790000/dma-controller@1e79e000: failed to match any schema with compatible: ['aspeed,ast2600-udma']
On Fri, Aug 15, 2025 at 06:38:54PM -0500, Rob Herring (Arm) wrote: > > On Fri, 15 Aug 2025 12:45:54 -0700, Marc Olberding wrote: > > Patch 1 Adds the binding for the Nvidia mgx cx8 switchboard > > Patch 2 Adds dtsi's for the mgx cx8 switchboard itself > > Patch 3 Adds the dts for the mgx cx8 switchboard motherboard reference implementation. > > > > This is an Aspeed AST2600 based reference implementation for a BMC > > managing an Nvidia mgx cx8 switchboard. Dtsi files are broken out for > > managing the mgx cx8 switchboard over i2c, so that others may reuse these > > if they choose to implement their own board. There are two dtsi files > > since the i2c topology is not symmetric between busses going to the mgx cx8 > > switchboard. > > > > Reference to Ast2600 SoC [1]. > > > > Link: https://www.aspeedtech.com/server_ast2600/ [1] > > > > > > Signed-off-by: Marc Olberding <molberding@nvidia.com> > > --- > > Marc Olberding (3): > > dt-bindings: arm: aspeed: Add Nvidia's mgx4u BMC > > ARM: dts: aspeed: Add device tree includes for the cx8 switchboard > > ARM: dts: aspeed: Add device tree for mgx4u BMC > > > > .../devicetree/bindings/arm/aspeed/aspeed.yaml | 1 + > > arch/arm/boot/dts/aspeed/Makefile | 1 + > > .../boot/dts/aspeed/aspeed-bmc-nvidia-mgx4u.dts | 1078 ++++++++++++++++++++ > > .../dts/aspeed/nvidia-mgx-cx8-switch-north.dtsi | 80 ++ > > .../dts/aspeed/nvidia-mgx-cx8-switch-south.dtsi | 80 ++ > > 5 files changed, 1240 insertions(+) > > --- > > base-commit: 7bac2c97af4078d7a627500c9bcdd5b033f97718 next-20250521!? Why are you using linux-next from 3 months ago? Base your patches on the latest rc1 unless you have some dependency on post rc1 changes. Usually that means you need to base your tree on the maintainer's tree the series applies to (ASpeed in this case). The *current* linux-next is a shortcut for that. Rob
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