Hi Udit,
On 8/15/2025 8:05 AM, Kumar, Udit wrote:
>
> On 8/15/2025 4:08 AM, Beleswar Padhi wrote:
>> This reverts commit 9f3814a7c06b7c7296cf8c1622078ad71820454b.
>>
>> The C6x carveouts are reversed intentionally. This is due to the
>> requirement to keep the DMA memory region as non-cached, however the
>> minimum granular cache region for C6x is 16MB. So, C66x_0 marks the
>> entire C66x_1 16MB memory carveouts as non-cached, and uses the DMA
>> memory region of C66x_1 as its own, and vice-versa.
>
> Sorry , but i failed to understand how this swap helps in making
> region non-cached.
This swap does not make region non-cached. This ensures the correct
carveouts are registered for each remote processor (rproc), which is
necessary to ensure VRING buffers are allocated from correct address
space for IPC.
Without this patch, the VRINGs would be allocated from rproc's own
DMA carveout, which would be *cached* from rproc's view.
Refer to the line in the commit message:
"and uses the DMA memory region of C66x_1 as its own, and vice-versa."
Marking a region as non-cached from a rproc's view is done by its
firmware itself via a linker script.
Thanks,
Beleswar
>
> 16MB logic is understood.
>
>>
>> This was also called out in the original commit which introduced these
>> reversed carveouts:
>> "The minimum granularity on the Cache settings on C66x DSP cores
>> is 16MB, so the DMA memory regions are chosen such that they are
>> in separate 16MB regions for each DSP, while reserving a total
>> of 16 MB for each DSP and not changing the overall DSP
>> remoteproc carveouts."
>>
>> Fixes: 9f3814a7c06b ("arm64: dts: ti: k3-j721e-sk: Fix reversed C6x
>> carveout locations")
>> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
>> ---
>> arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 6 ++++--
>> 1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
>> b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
>> index ffef3d1cfd55..9882bb1e8097 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
>> @@ -120,7 +120,8 @@ main_r5fss1_core1_memory_region:
>> r5f-memory@a5100000 {
>> no-map;
>> };
>> - c66_0_dma_memory_region: c66-dma-memory@a6000000 {
>> + /* Carveout locations are flipped due to caching */
>> + c66_1_dma_memory_region: c66-dma-memory@a6000000 {
>> compatible = "shared-dma-pool";
>> reg = <0x00 0xa6000000 0x00 0x100000>;
>> no-map;
>> @@ -132,7 +133,8 @@ c66_0_memory_region: c66-memory@a6100000 {
>> no-map;
>> };
>> - c66_1_dma_memory_region: c66-dma-memory@a7000000 {
>> + /* Carveout locations are flipped due to caching */
>> + c66_0_dma_memory_region: c66-dma-memory@a7000000 {
>> compatible = "shared-dma-pool";
>> reg = <0x00 0xa7000000 0x00 0x100000>;
>> no-map;