There is a csi dma and csis interface that bundles together to allow
csi2 capture.
Signed-off-by: Inbaraj E <inbaraj.e@samsung.com>
---
arch/arm64/boot/dts/tesla/fsd-evb.dts | 96 +++++
arch/arm64/boot/dts/tesla/fsd.dtsi | 552 ++++++++++++++++++++++++++
2 files changed, 648 insertions(+)
diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts
index 9ff22e1c8723..dcc9a138cdb9 100644
--- a/arch/arm64/boot/dts/tesla/fsd-evb.dts
+++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts
@@ -130,3 +130,99 @@ &serial_0 {
&ufs {
status = "okay";
};
+
+&mipicsis0 {
+ status = "okay";
+};
+
+&mipicsis1 {
+ status = "okay";
+};
+
+&mipicsis2 {
+ status = "okay";
+};
+
+&mipicsis3 {
+ status = "okay";
+};
+
+&mipicsis4 {
+ status = "okay";
+};
+
+&mipicsis5 {
+ status = "okay";
+};
+
+&mipicsis6 {
+ status = "okay";
+};
+
+&mipicsis7 {
+ status = "okay";
+};
+
+&mipicsis8 {
+ status = "okay";
+};
+
+&mipicsis9 {
+ status = "okay";
+};
+
+&mipicsis10 {
+ status = "okay";
+};
+
+&mipicsis11 {
+ status = "okay";
+};
+
+&csis0 {
+ status = "okay";
+};
+
+&csis1 {
+ status = "okay";
+};
+
+&csis2 {
+ status = "okay";
+};
+
+&csis3 {
+ status = "okay";
+};
+
+&csis4 {
+ status = "okay";
+};
+
+&csis5 {
+ status = "okay";
+};
+
+&csis6 {
+ status = "okay";
+};
+
+&csis7 {
+ status = "okay";
+};
+
+&csis8 {
+ status = "okay";
+};
+
+&csis9 {
+ status = "okay";
+};
+
+&csis10 {
+ status = "okay";
+};
+
+&csis11 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi
index a5ebb3f9b18f..a83503e9c502 100644
--- a/arch/arm64/boot/dts/tesla/fsd.dtsi
+++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
@@ -493,6 +493,558 @@ clock_mfc: clock-controller@12810000 {
clock-names = "fin_pll";
};
+ mipicsis0: mipi-csis@12640000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x12640000 0x0 0x124>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI0_0_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI0_0_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ samsung,syscon-csis = <&sysreg_cam 0x40c>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_0_out: endpoint {
+ remote-endpoint = <&csis_in_0>;
+ };
+ };
+ };
+ };
+
+ csis0: csis@12641000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x12641000 0x0 0x44c>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI0_0_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI0_0_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+ status = "disabled";
+
+ port {
+ csis_in_0: endpoint {
+ remote-endpoint = <&mipi_csis_0_out>;
+ };
+ };
+ };
+
+ mipicsis1: mipi-csis@12650000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x12650000 0x0 0x124>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI0_1_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI0_1_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ samsung,syscon-csis = <&sysreg_cam 0x40c>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_1_out: endpoint {
+ remote-endpoint = <&csis_in_1>;
+ };
+ };
+ };
+ };
+
+ csis1: csis@12651000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x12651000 0x0 0x44c>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI0_1_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI0_1_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+ status = "disabled";
+
+ port {
+ csis_in_1: endpoint {
+ remote-endpoint = <&mipi_csis_1_out>;
+ };
+ };
+ };
+
+ mipicsis2: mipi-csis@12660000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x12660000 0x0 0x124>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI0_2_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI0_2_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ samsung,syscon-csis = <&sysreg_cam 0x40c>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_2_out: endpoint {
+ remote-endpoint = <&csis_in_2>;
+ };
+ };
+ };
+ };
+
+ csis2: csis@12661000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x12661000 0x0 0x44c>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI0_2_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI0_2_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+ status = "disabled";
+
+ port {
+ csis_in_2: endpoint {
+ remote-endpoint = <&mipi_csis_2_out>;
+ };
+ };
+ };
+
+ mipicsis3: mipi-csis@12670000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x12670000 0x0 0x124>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI0_3_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI0_3_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ samsung,syscon-csis = <&sysreg_cam 0x40c>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_3_out: endpoint {
+ remote-endpoint = <&csis_in_3>;
+ };
+ };
+ };
+ };
+
+ csis3: csis@12671000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x12671000 0x0 0x44c>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI0_3_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI0_3_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+ status = "disabled";
+
+ port {
+ csis_in_3: endpoint {
+ remote-endpoint = <&mipi_csis_3_out>;
+ };
+ };
+ };
+
+ mipicsis4: mipi-csis@12680000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x12680000 0x0 0x124>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI1_0_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI1_0_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ samsung,syscon-csis = <&sysreg_cam 0x40c>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_4_out: endpoint {
+ remote-endpoint = <&csis_in_4>;
+ };
+ };
+ };
+ };
+
+ csis4: csis@12681000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x12681000 0x0 0x44c>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI1_0_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI1_0_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+ status = "disabled";
+
+ port {
+ csis_in_4: endpoint {
+ remote-endpoint = <&mipi_csis_4_out>;
+ };
+ };
+ };
+
+ mipicsis5: mipi-csis@12690000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x12690000 0x0 0x124>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI1_1_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI1_1_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ samsung,syscon-csis = <&sysreg_cam 0x40c>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_5_out: endpoint {
+ remote-endpoint = <&csis_in_5>;
+ };
+ };
+ };
+ };
+
+ csis5: csis@12691000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x12691000 0x0 0x44c>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI1_1_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI1_1_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+ status = "disabled";
+
+ port {
+ csis_in_5: endpoint {
+ remote-endpoint = <&mipi_csis_5_out>;
+ };
+ };
+ };
+
+ mipicsis6: mipi-csis@126a0000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x126a0000 0x0 0x124>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI1_2_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI1_2_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ samsung,syscon-csis = <&sysreg_cam 0x40c>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_6_out: endpoint {
+ remote-endpoint = <&csis_in_6>;
+ };
+ };
+ };
+ };
+
+ csis6: csis@126a1000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x126a1000 0x0 0x44c>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI1_2_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI1_2_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+ status = "disabled";
+
+ port {
+ csis_in_6: endpoint {
+ remote-endpoint = <&mipi_csis_6_out>;
+ };
+ };
+ };
+
+ mipicsis7: mipi-csis@126b0000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x126b0000 0x0 0x124>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI1_3_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI1_3_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ samsung,syscon-csis = <&sysreg_cam 0x40c>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_7_out: endpoint {
+ remote-endpoint = <&csis_in_7>;
+ };
+ };
+ };
+ };
+
+ csis7: csis@126b1000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x126b1000 0x0 0x44c>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI1_3_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI1_3_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+ status = "disabled";
+
+ port {
+ csis_in_7: endpoint {
+ remote-endpoint = <&mipi_csis_7_out>;
+ };
+ };
+ };
+
+ mipicsis8: mipi-csis@126c0000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x126c0000 0x0 0x124>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI2_0_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI2_0_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ samsung,syscon-csis = <&sysreg_cam 0x40c>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_8_out: endpoint {
+ remote-endpoint = <&csis_in_8>;
+ };
+ };
+ };
+ };
+
+ csis8: csis@126c1000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x126c1000 0x0 0x44c>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI2_0_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI2_0_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+ status = "disabled";
+
+ port {
+ csis_in_8: endpoint {
+ remote-endpoint = <&mipi_csis_8_out>;
+ };
+ };
+ };
+
+ mipicsis9: mipi-csis@126d0000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x126d0000 0x0 0x124>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI2_1_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI2_1_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ samsung,syscon-csis = <&sysreg_cam 0x40c>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_9_out: endpoint {
+ remote-endpoint = <&csis_in_9>;
+ };
+ };
+ };
+ };
+
+ csis9: csis@126d1000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x126d1000 0x0 0x44c>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI2_1_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI2_1_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+ status = "disabled";
+
+ port {
+ csis_in_9: endpoint {
+ remote-endpoint = <&mipi_csis_9_out>;
+ };
+ };
+ };
+
+ mipicsis10: mipi-csis@126e0000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x126e0000 0x0 0x124>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI2_2_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI2_2_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ samsung,syscon-csis = <&sysreg_cam 0x40c>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_10_out: endpoint {
+ remote-endpoint = <&csis_in_10>;
+ };
+ };
+ };
+ };
+
+ csis10: csis@126e1000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x126e1000 0x0 0x44c>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI2_2_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI2_2_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+ status = "disabled";
+
+ port {
+ csis_in_10: endpoint {
+ remote-endpoint = <&mipi_csis_10_out>;
+ };
+ };
+ };
+
+ mipicsis11: mipi-csis@126f0000 {
+ compatible = "tesla,fsd-mipi-csi2";
+ reg = <0x0 0x126f0000 0x0 0x124>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI2_3_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI2_3_IPCLKPORT_I_PCLK>;
+ clock-names = "aclk", "pclk";
+ samsung,syscon-csis = <&sysreg_cam 0x40c>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csis_11_out: endpoint {
+ remote-endpoint = <&csis_in_11>;
+ };
+ };
+ };
+ };
+
+ csis11: csis@126f1000 {
+ compatible = "tesla,fsd-csis-media";
+ reg = <0x0 0x126f1000 0x0 0x44c>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_csi CAM_CSI2_3_IPCLKPORT_I_ACLK>,
+ <&clock_csi CAM_CSI2_3_IPCLKPORT_I_PCLK>,
+ <&clock_csi CAM_CSI_PLL>;
+ clock-names = "aclk", "pclk", "pll";
+ iommus = <&smmu_isp 0x0 0x0>;
+ status = "disabled";
+
+ port {
+ csis_in_11: endpoint {
+ remote-endpoint = <&mipi_csis_11_out>;
+ };
+ };
+ };
+
clock_peric: clock-controller@14010000 {
compatible = "tesla,fsd-clock-peric";
reg = <0x0 0x14010000 0x0 0x3000>;
--
2.49.0On 14/08/2025 16:09, Inbaraj E wrote:
> There is a csi dma and csis interface that bundles together to allow
CSI DMA?
What is CSIS?
> csi2 capture.
CSI2?
>
> Signed-off-by: Inbaraj E <inbaraj.e@samsung.com>
> ---
> arch/arm64/boot/dts/tesla/fsd-evb.dts | 96 +++++
> arch/arm64/boot/dts/tesla/fsd.dtsi | 552 ++++++++++++++++++++++++++
> 2 files changed, 648 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> index 9ff22e1c8723..dcc9a138cdb9 100644
> --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts
> +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> @@ -130,3 +130,99 @@ &serial_0 {
> &ufs {
> status = "okay";
> };
> +
> +&mipicsis0 {
> + status = "okay";
> +};
> +
> +&mipicsis1 {
> + status = "okay";
> +};
> +
> +&mipicsis2 {
> + status = "okay";
> +};
> +
> +&mipicsis3 {
> + status = "okay";
> +};
> +
> +&mipicsis4 {
> + status = "okay";
> +};
> +
> +&mipicsis5 {
> + status = "okay";
> +};
> +
> +&mipicsis6 {
> + status = "okay";
> +};
> +
> +&mipicsis7 {
> + status = "okay";
> +};
> +
> +&mipicsis8 {
> + status = "okay";
> +};
> +
> +&mipicsis9 {
> + status = "okay";
> +};
> +
> +&mipicsis10 {
> + status = "okay";
> +};
> +
> +&mipicsis11 {
> + status = "okay";
> +};
> +
> +&csis0 {
> + status = "okay";
> +};
> +
> +&csis1 {
> + status = "okay";
> +};
> +
> +&csis2 {
> + status = "okay";
> +};
> +
> +&csis3 {
> + status = "okay";
> +};
> +
> +&csis4 {
> + status = "okay";
> +};
> +
> +&csis5 {
> + status = "okay";
> +};
> +
> +&csis6 {
> + status = "okay";
> +};
> +
> +&csis7 {
> + status = "okay";
> +};
> +
> +&csis8 {
> + status = "okay";
> +};
> +
> +&csis9 {
> + status = "okay";
> +};
> +
> +&csis10 {
> + status = "okay";
> +};
> +
> +&csis11 {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi
> index a5ebb3f9b18f..a83503e9c502 100644
> --- a/arch/arm64/boot/dts/tesla/fsd.dtsi
> +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
> @@ -493,6 +493,558 @@ clock_mfc: clock-controller@12810000 {
> clock-names = "fin_pll";
> };
>
> + mipicsis0: mipi-csis@12640000 {
Messed ordering. See DTS coding style.
Node names should be generic. See also an explanation and list of
examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
What is csis?
> + compatible = "tesla,fsd-mipi-csi2";
> + reg = <0x0 0x12640000 0x0 0x124>;
> + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock_csi CAM_CSI0_0_IPCLKPORT_I_ACLK>,
> + <&clock_csi CAM_CSI0_0_IPCLKPORT_I_PCLK>;
> + clock-names = "aclk", "pclk";
> + samsung,syscon-csis = <&sysreg_cam 0x40c>;
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + mipi_csis_0_out: endpoint {
> + remote-endpoint = <&csis_in_0>;
> + };
> + };
> + };
> + };
> +
> + csis0: csis@12641000 {
> + compatible = "tesla,fsd-csis-media";
> + reg = <0x0 0x12641000 0x0 0x44c>;
> + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock_csi CAM_CSI0_0_IPCLKPORT_I_ACLK>,
> + <&clock_csi CAM_CSI0_0_IPCLKPORT_I_PCLK>,
> + <&clock_csi CAM_CSI_PLL>;
> + clock-names = "aclk", "pclk", "pll";
> + iommus = <&smmu_isp 0x0 0x0>;
> + status = "disabled";
> +
> + port {
> + csis_in_0: endpoint {
> + remote-endpoint = <&mipi_csis_0_out>;
> + };
> + };
> + };
> +
> + mipicsis1: mipi-csis@12650000 {
> + compatible = "tesla,fsd-mipi-csi2";
> + reg = <0x0 0x12650000 0x0 0x124>;
> + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock_csi CAM_CSI0_1_IPCLKPORT_I_ACLK>,
> + <&clock_csi CAM_CSI0_1_IPCLKPORT_I_PCLK>;
> + clock-names = "aclk", "pclk";
> + samsung,syscon-csis = <&sysreg_cam 0x40c>;
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + mipi_csis_1_out: endpoint {
> + remote-endpoint = <&csis_in_1>;
> + };
> + };
> + };
> + };
> +
> + csis1: csis@12651000 {
> + compatible = "tesla,fsd-csis-media";
> + reg = <0x0 0x12651000 0x0 0x44c>;
> + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock_csi CAM_CSI0_1_IPCLKPORT_I_ACLK>,
> + <&clock_csi CAM_CSI0_1_IPCLKPORT_I_PCLK>,
> + <&clock_csi CAM_CSI_PLL>;
> + clock-names = "aclk", "pclk", "pll";
> + iommus = <&smmu_isp 0x0 0x0>;
> + status = "disabled";
> +
> + port {
> + csis_in_1: endpoint {
> + remote-endpoint = <&mipi_csis_1_out>;
> + };
> + };
> + };
> +
> + mipicsis2: mipi-csis@12660000 {
> + compatible = "tesla,fsd-mipi-csi2";
> + reg = <0x0 0x12660000 0x0 0x124>;
> + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock_csi CAM_CSI0_2_IPCLKPORT_I_ACLK>,
> + <&clock_csi CAM_CSI0_2_IPCLKPORT_I_PCLK>;
> + clock-names = "aclk", "pclk";
> + samsung,syscon-csis = <&sysreg_cam 0x40c>;
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + mipi_csis_2_out: endpoint {
> + remote-endpoint = <&csis_in_2>;
> + };
> + };
> + };
> + };
> +
> + csis2: csis@12661000 {
What is CSIS? Seems like copy paste from other Samsung code, but isn't
this just CSI?
What is the meaning of this CSIS acronym?
Best regards,
Krzysztof
Hi Krzysztof,
Thanks for the review.
>
> On 14/08/2025 16:09, Inbaraj E wrote:
> > There is a csi dma and csis interface that bundles together to allow
>
> CSI DMA?
> What is CSIS?
>
> > csi2 capture.
>
> CSI2?
CSIS stands for Camera Serial Interface Slave.
Samsung v4.3 CSIS IP bundles both the CSIS link operation and the CSIS
DMA operation. The DMA-related operation are referred to as CSIS DMA and
are handled by the fsd-csis driver. The link related operations are
referred to simply as CSIS and are integrated into imx-mipi-csis driver.
I'll update the commit message and commit description accordingly,
and maintain consistency across the patches.
>
> >
> > Signed-off-by: Inbaraj E <inbaraj.e@samsung.com>
> > ---
> > arch/arm64/boot/dts/tesla/fsd-evb.dts | 96 +++++
> > +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
> > @@ -493,6 +493,558 @@ clock_mfc: clock-controller@12810000 {
> > clock-names = "fin_pll";
> > };
> >
> > + mipicsis0: mipi-csis@12640000 {
>
> Messed ordering. See DTS coding style.
I'll fix the ordering in next patchset.
>
> Node names should be generic. See also an explanation and list of examples
> (not exhaustive) in DT specification:
> https://protect2.fireeye.com/v1/url?k=a30d23f8-c28636dd-a30ca8b7-
> 74fe485cbff6-ee12f8a711c584c8&q=1&e=b96506d8-2d5d-4303-b9e8-
> 0e1189db1585&u=https%3A%2F%2Fdevicetree-
> specification.readthedocs.io%2Fen%2Flatest%2Fchapter2-devicetree-
> basics.html%23generic-names-recommendation
>
There is no generic name directly related to CSI apart from camera. That's
why I used mipi-csis. If preferred, I can move the name to csis or simply csi.
Please let me know which one is more appropriate.
Regards,
Inbaraj E
On 22/08/2025 15:57, Inbaraj E wrote:
>
> Hi Krzysztof,
>
> Thanks for the review.
>
>>
>> On 14/08/2025 16:09, Inbaraj E wrote:
>>> There is a csi dma and csis interface that bundles together to allow
>>
>> CSI DMA?
>> What is CSIS?
>>
>>> csi2 capture.
>>
>> CSI2?
>
> CSIS stands for Camera Serial Interface Slave.
Googling for "MIPI CSIS" gives me 0 results, so I still claim this is
not a generic name.
>
> Samsung v4.3 CSIS IP bundles both the CSIS link operation and the CSIS
> DMA operation. The DMA-related operation are referred to as CSIS DMA and
> are handled by the fsd-csis driver. The link related operations are
> referred to simply as CSIS and are integrated into imx-mipi-csis driver.
>
> I'll update the commit message and commit description accordingly,
> and maintain consistency across the patches.
>
>>
>>>
>>> Signed-off-by: Inbaraj E <inbaraj.e@samsung.com>
>>> ---
>>> arch/arm64/boot/dts/tesla/fsd-evb.dts | 96 +++++
>>> +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
>>> @@ -493,6 +493,558 @@ clock_mfc: clock-controller@12810000 {
>>> clock-names = "fin_pll";
>>> };
>>>
>>> + mipicsis0: mipi-csis@12640000 {
>>
>> Messed ordering. See DTS coding style.
>
> I'll fix the ordering in next patchset.
>
>>
>> Node names should be generic. See also an explanation and list of examples
>> (not exhaustive) in DT specification:
>> https://protect2.fireeye.com/v1/url?k=a30d23f8-c28636dd-a30ca8b7-
>> 74fe485cbff6-ee12f8a711c584c8&q=1&e=b96506d8-2d5d-4303-b9e8-
>> 0e1189db1585&u=https%3A%2F%2Fdevicetree-
>> specification.readthedocs.io%2Fen%2Flatest%2Fchapter2-devicetree-
>> basics.html%23generic-names-recommendation
>>
>
> There is no generic name directly related to CSI apart from camera. That's
> why I used mipi-csis. If preferred, I can move the name to csis or simply csi.
> Please let me know which one is more appropriate.
I don't think you really tried to solve this. How this device is called
in all other vendors?
Best regards,
Krzysztof
Hi Krzysztof, > > > > CSIS stands for Camera Serial Interface Slave. > > Googling for "MIPI CSIS" gives me 0 results, so I still claim this is not a generic > name. I checked other vendors (e.g: freescale), and they are using mipi-csi. I'll adopt for the same. > > > Regards, Inbaraj E
On 25/08/2025 15:05, Inbaraj E wrote: > Hi Krzysztof, > >>> >>> CSIS stands for Camera Serial Interface Slave. >> >> Googling for "MIPI CSIS" gives me 0 results, so I still claim this is not a generic >> name. > > I checked other vendors (e.g: freescale), and they are using mipi-csi. I'll adopt for the > same. > > Then it is just "csi"? Except that you have some other different nodes called "csi" as well, so two different devices are "csi"? Best regards, Krzysztof
On Tue, Aug 26, 2025 at 10:36:50AM +0200, Krzysztof Kozlowski wrote: > On 25/08/2025 15:05, Inbaraj E wrote: > > Hi Krzysztof, > > > >>> CSIS stands for Camera Serial Interface Slave. > >> > >> Googling for "MIPI CSIS" gives me 0 results, so I still claim this is not a generic > >> name. > > > > I checked other vendors (e.g: freescale), and they are using mipi-csi. I'll adopt for the > > same. > > Then it is just "csi"? Except that you have some other different nodes > called "csi" as well, so two different devices are "csi"? This one is high on my list of unfortunate name clashes. Many NXP SoCs (among others, I've seen that in other vendors too) have IP cores named "Camera Sensor Interface" that they abbreviate to "CSI". They are unrelated to the MIPI Camera Serial Interface. I won't blame NXP, as I think they may have started using the acronym before MIPI CSI became a big thing. -- Regards, Laurent Pinchart
Hi Krzysztof, >> Googling for "MIPI CSIS" gives me 0 results, so I still claim this is > >> not a generic name. > > > > I checked other vendors (e.g: freescale), and they are using mipi-csi. > > I'll adopt for the same. > > > > > > Then it is just "csi"? For the CSIS MIPI CSI-2 Rx handled by imx-mipi-csis driver, I'll keep node name as "csi" >Except that you have some other different nodes called > "csi" as well, so two different devices are "csi"? For CSIS video capture interface which is handled by fsd-csis driver I'll keep node name as "csis". If "csis " and "csi" is kind of confusing in the same dt, then I'll keep as "video". is it fine? Regards, Inbaraj E
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