Problem
=======
The current array of memory controller instances for Intel server EDAC
driver is sized using the macro NUM_IMC. Each time EDAC support is added
for a new CPU, NUM_IMC needs to be updated to ensure it is greater than
or equal to the number of memory controllers for the new CPU. This approach
is inconvenient and also results in memory waste for older CPUs with fewer
memory controllers.
Solution
========
Make the array of memory controller instances a flexible array and
determine its size from configuration data or at runtime.
Patches
=======
Patch 1~3: Refactor code to be independent of *NUM*_IMC macros.
Patch 4: Make the array of memory controller instances a flexible array.
Patch 5~7: Clean up and remove unused *NUM*_IMC macros.
Testing
=======
Pass basic testing on Cascade Lake, {Sapphire, Granite} Rapids server CPUs.
- Load and unload the {skx,i10nm_}edac driver.
- Receive events for memory correctable errors.
- Decode memory errors.
This patch series is on top of v6.16.
Qiuxu Zhuo (7):
EDAC/{skx_common,skx}: Use configuration data, not global macros
EDAC/skx_common: Move mc_mapping to be a field inside struct skx_imc
EDAC/skx_common: Swap memory controller index mapping
EDAC/skx_common: Make skx_dev->imc[] a flexible array
EDAC/skx_common: Remove redundant upper bound check for res->imc
EDAC/i10nm: Reallocate skx_dev list if preconfigured cnt != runtime cnt
EDAC/skx_common: Remove unused *NUM*_IMC macros
drivers/edac/i10nm_base.c | 13 +++++-----
drivers/edac/skx_base.c | 33 +++++++++++++++----------
drivers/edac/skx_common.c | 51 +++++++++++++++++++++++++--------------
drivers/edac/skx_common.h | 28 +++++++++------------
4 files changed, 72 insertions(+), 53 deletions(-)
base-commit: 038d61fd642278bab63ee8ef722c50d10ab01e8f
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2.43.0