.../devicetree/bindings/ufs/qcom,sc7280-ufshc.yaml | 149 +++++++++++++++++++ .../devicetree/bindings/ufs/qcom,ufs-common.yaml | 67 +++++++++ .../devicetree/bindings/ufs/qcom,ufs.yaml | 160 +++++---------------- 3 files changed, 251 insertions(+), 125 deletions(-)
The binding for Qualcomm SoC UFS controllers grew and it will grow
further. It already includes several conditionals, partially for
difference in handling encryption block (ICE, either as phandle or as IO
address space) but it will further grow for MCQ.
See also: lore.kernel.org/r/20250730082229.23475-1-quic_rdwivedi@quicinc.com
The question is whether SM8650 and SM8750 should have their own schemas,
but based on bindings above I think all devices here have MCQ?
Best regards,
Krzysztof
---
Krzysztof Kozlowski (2):
dt-bindings: ufs: qcom: Split common part to qcom,ufs-common.yaml
dt-bindings: ufs: qcom: Split SC7280 and similar
.../devicetree/bindings/ufs/qcom,sc7280-ufshc.yaml | 149 +++++++++++++++++++
.../devicetree/bindings/ufs/qcom,ufs-common.yaml | 67 +++++++++
.../devicetree/bindings/ufs/qcom,ufs.yaml | 160 +++++----------------
3 files changed, 251 insertions(+), 125 deletions(-)
---
base-commit: d7af19298454ed155f5cf67201a70f5cf836c842
change-id: 20250730-dt-bindings-ufs-qcom-980795ebd0aa
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
On 7/30/2025 6:05 PM, Krzysztof Kozlowski wrote: > The binding for Qualcomm SoC UFS controllers grew and it will grow > further. It already includes several conditionals, partially for > difference in handling encryption block (ICE, either as phandle or as IO > address space) but it will further grow for MCQ. > > See also: lore.kernel.org/r/20250730082229.23475-1-quic_rdwivedi@quicinc.com > > The question is whether SM8650 and SM8750 should have their own schemas, > but based on bindings above I think all devices here have MCQ? > > Best regards, > Krzysztof > Hi Krzysztof, If I understand correctly, you're splitting the YAML files based on MCQ (Multi-Circular Queue) support: -qcom,sc7280-ufshc.yaml includes targets that support MCQ -qcom,ufs-common.yaml includes common properties -qcom,ufs.yaml includes targets that do not support MCQ In future, if a new property applies to both some MCQ and some non-MCQ targets, we would need to update both YAML files. In the current implementation, we handle such cases using if-else conditions to include the new property. For reference, only SM8650 and SM8750 currently support MCQ, though more targets may be added later. Regarding the patch lore.kernel.org/r/20250730082229.23475-1-quic_rdwivedi@quicinc.com, instead of using two separate YAML files, we could use if-else conditions to differentiate the reg and reg-name properties between MCQ targets (SM8650 and SM8750) and non-MCQ targets (all others). Regards, Nitin > --- > Krzysztof Kozlowski (2): > dt-bindings: ufs: qcom: Split common part to qcom,ufs-common.yaml > dt-bindings: ufs: qcom: Split SC7280 and similar > > .../devicetree/bindings/ufs/qcom,sc7280-ufshc.yaml | 149 +++++++++++++++++++ > .../devicetree/bindings/ufs/qcom,ufs-common.yaml | 67 +++++++++ > .../devicetree/bindings/ufs/qcom,ufs.yaml | 160 +++++---------------- > 3 files changed, 251 insertions(+), 125 deletions(-) > --- > base-commit: d7af19298454ed155f5cf67201a70f5cf836c842 > change-id: 20250730-dt-bindings-ufs-qcom-980795ebd0aa > > Best regards,
On 30/07/2025 15:53, Nitin Rawat wrote: > > > On 7/30/2025 6:05 PM, Krzysztof Kozlowski wrote: >> The binding for Qualcomm SoC UFS controllers grew and it will grow >> further. It already includes several conditionals, partially for >> difference in handling encryption block (ICE, either as phandle or as IO >> address space) but it will further grow for MCQ. >> >> See also: lore.kernel.org/r/20250730082229.23475-1-quic_rdwivedi@quicinc.com >> >> The question is whether SM8650 and SM8750 should have their own schemas, >> but based on bindings above I think all devices here have MCQ? >> >> Best regards, >> Krzysztof >> > > > Hi Krzysztof, > > If I understand correctly, you're splitting the YAML files based on MCQ > (Multi-Circular Queue) support: Not entirely, I don't know which devices support MCQ. I split based on common parts in the binding. > > -qcom,sc7280-ufshc.yaml includes targets that support MCQ > -qcom,ufs-common.yaml includes common properties > -qcom,ufs.yaml includes targets that do not support MCQ > > > In future, if a new property applies to both some MCQ and some > non-MCQ targets, we would need to update both YAML files. In the current No > implementation, we handle such cases using if-else conditions to include > the new property. Hm? > > For reference, only SM8650 and SM8750 currently support MCQ, though more > targets may be added later. Are you sure? Are you claiming that SM8550 hardware does not support MCQ? > > Regarding the patch > lore.kernel.org/r/20250730082229.23475-1-quic_rdwivedi@quicinc.com, > instead of using two separate YAML files, we could use if-else > conditions to differentiate the reg and reg-name properties between MCQ > targets (SM8650 and SM8750) and non-MCQ targets (all others). It's a mess already and you want to make it messy. I already responded on that. Best regards, Krzysztof
On 7/30/2025 7:55 PM, Krzysztof Kozlowski wrote: > On 30/07/2025 15:53, Nitin Rawat wrote: >> >> >> On 7/30/2025 6:05 PM, Krzysztof Kozlowski wrote: >>> The binding for Qualcomm SoC UFS controllers grew and it will grow >>> further. It already includes several conditionals, partially for >>> difference in handling encryption block (ICE, either as phandle or as IO >>> address space) but it will further grow for MCQ. >>> >>> See also: lore.kernel.org/r/20250730082229.23475-1-quic_rdwivedi@quicinc.com >>> >>> The question is whether SM8650 and SM8750 should have their own schemas, >>> but based on bindings above I think all devices here have MCQ? >>> >>> Best regards, >>> Krzysztof >>> >> >> >> Hi Krzysztof, >> >> If I understand correctly, you're splitting the YAML files based on MCQ >> (Multi-Circular Queue) support: > > Not entirely, I don't know which devices support MCQ. I split based on > common parts in the binding. > >> >> -qcom,sc7280-ufshc.yaml includes targets that support MCQ >> -qcom,ufs-common.yaml includes common properties >> -qcom,ufs.yaml includes targets that do not support MCQ >> >> >> In future, if a new property applies to both some MCQ and some >> non-MCQ targets, we would need to update both YAML files. In the current > > No > >> implementation, we handle such cases using if-else conditions to include >> the new property. > > Hm? > >> >> For reference, only SM8650 and SM8750 currently support MCQ, though more >> targets may be added later. > > Are you sure? Are you claiming that SM8550 hardware does not support MCQ? Offcourse I can say that because I am working on Qualcomm UFS Driver. > >> >> Regarding the patch >> lore.kernel.org/r/20250730082229.23475-1-quic_rdwivedi@quicinc.com, >> instead of using two separate YAML files, we could use if-else >> conditions to differentiate the reg and reg-name properties between MCQ >> targets (SM8650 and SM8750) and non-MCQ targets (all others). > > It's a mess already and you want to make it messy. I already responded > on that. > > Best regards, > Krzysztof
On 31/07/2025 08:59, Nitin Rawat wrote: >> Hm? >> >>> >>> For reference, only SM8650 and SM8750 currently support MCQ, though more >>> targets may be added later. >> >> Are you sure? Are you claiming that SM8550 hardware does not support MCQ? > > Offcourse I can say that because I am working on Qualcomm UFS Driver. Qualcomm sent many patches which were not related to hardware at all, just based on drivers, so my question is completely valid based on previous experience with Qualcomm. Best regards, Krzysztof
On Thu, Jul 31, 2025 at 09:04:48AM GMT, Krzysztof Kozlowski wrote: > On 31/07/2025 08:59, Nitin Rawat wrote: > >> Hm? > >> > >>> > >>> For reference, only SM8650 and SM8750 currently support MCQ, though more > >>> targets may be added later. > >> > >> Are you sure? Are you claiming that SM8550 hardware does not support MCQ? > > > > Offcourse I can say that because I am working on Qualcomm UFS Driver. > > Qualcomm sent many patches which were not related to hardware at all, > just based on drivers, so my question is completely valid based on > previous experience with Qualcomm. > SM8550 indeed doesn't support MCQ. Even though it is based on UFSHCD 4.x, it doesn't support MCQ due to hardware design. MCQ support only starts from SM8650. - Mani -- மணிவண்ணன் சதாசிவம்
On 31/07/2025 16:09, Manivannan Sadhasivam wrote: > On Thu, Jul 31, 2025 at 09:04:48AM GMT, Krzysztof Kozlowski wrote: >> On 31/07/2025 08:59, Nitin Rawat wrote: >>>> Hm? >>>> >>>>> >>>>> For reference, only SM8650 and SM8750 currently support MCQ, though more >>>>> targets may be added later. >>>> >>>> Are you sure? Are you claiming that SM8550 hardware does not support MCQ? >>> >>> Offcourse I can say that because I am working on Qualcomm UFS Driver. >> >> Qualcomm sent many patches which were not related to hardware at all, >> just based on drivers, so my question is completely valid based on >> previous experience with Qualcomm. >> > > SM8550 indeed doesn't support MCQ. Even though it is based on UFSHCD 4.x, it > doesn't support MCQ due to hardware design. MCQ support only starts from SM8650. Yeah, I checked later in datasheets and programming guide. That's why I sent v2 and marked it in Patchwork as changes-requested. Best regards, Krzysztof
On Wed, Jul 30, 2025 at 04:25:06PM +0200, Krzysztof Kozlowski wrote: > On 30/07/2025 15:53, Nitin Rawat wrote: > > > > > > On 7/30/2025 6:05 PM, Krzysztof Kozlowski wrote: > >> The binding for Qualcomm SoC UFS controllers grew and it will grow > >> further. It already includes several conditionals, partially for > >> difference in handling encryption block (ICE, either as phandle or as IO > >> address space) but it will further grow for MCQ. > >> > >> See also: lore.kernel.org/r/20250730082229.23475-1-quic_rdwivedi@quicinc.com > >> > >> The question is whether SM8650 and SM8750 should have their own schemas, > >> but based on bindings above I think all devices here have MCQ? > >> > >> Best regards, > >> Krzysztof > >> > > > > > > Hi Krzysztof, > > > > If I understand correctly, you're splitting the YAML files based on MCQ > > (Multi-Circular Queue) support: > > Not entirely, I don't know which devices support MCQ. I split based on > common parts in the binding. I found the docs, so I'll send v2 with MCQ also separated. Best regards, Krzysztof
On 31-Jul-25 12:25 PM, Krzysztof Kozlowski wrote: > On Wed, Jul 30, 2025 at 04:25:06PM +0200, Krzysztof Kozlowski wrote: >> On 30/07/2025 15:53, Nitin Rawat wrote: >>> >>> >>> On 7/30/2025 6:05 PM, Krzysztof Kozlowski wrote: >>>> The binding for Qualcomm SoC UFS controllers grew and it will grow >>>> further. It already includes several conditionals, partially for >>>> difference in handling encryption block (ICE, either as phandle or as IO >>>> address space) but it will further grow for MCQ. >>>> >>>> See also: lore.kernel.org/r/20250730082229.23475-1-quic_rdwivedi@quicinc.com >>>> >>>> The question is whether SM8650 and SM8750 should have their own schemas, >>>> but based on bindings above I think all devices here have MCQ? >>>> >>>> Best regards, >>>> Krzysztof >>>> >>> >>> >>> Hi Krzysztof, >>> >>> If I understand correctly, you're splitting the YAML files based on MCQ >>> (Multi-Circular Queue) support: >> >> Not entirely, I don't know which devices support MCQ. I split based on >> common parts in the binding. > > I found the docs, so I'll send v2 with MCQ also separated. > Hi Krzysztof, Regarding my patch: lore.kernel.org/r/20250730082229.23475-1-quic_rdwivedi@quicinc.com I will post the next patchset on the top of your latest(v2) binding patch. Please let me know if you have any concern. Thanks, Ram. > Best regards, > Krzysztof >
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