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[PATCH 0/6] gpio: renesas: Add support for GPIO and related interrupts in RZ/N1 SoC

Herve Codina posted 6 patches 2 months, 1 week ago
There is a newer version of this series
.../bindings/gpio/snps,dw-apb-gpio.yaml       |   8 +-
.../soc/renesas/renesas,rzn1-gpioirqmux.yaml  |  99 ++++++++++
arch/arm/boot/dts/renesas/r9a06g032.dtsi      | 172 ++++++++++++++++++
drivers/of/irq.c                              |  70 +++++++
drivers/soc/renesas/Kconfig                   |   4 +
drivers/soc/renesas/Makefile                  |   1 +
drivers/soc/renesas/rzn1_irqmux.c             | 169 +++++++++++++++++
include/linux/of_irq.h                        |  11 ++
8 files changed, 533 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/soc/renesas/renesas,rzn1-gpioirqmux.yaml
create mode 100644 drivers/soc/renesas/rzn1_irqmux.c
[PATCH 0/6] gpio: renesas: Add support for GPIO and related interrupts in RZ/N1 SoC
Posted by Herve Codina 2 months, 1 week ago 
Hi,

This series adds support for GPIO and GPIO IRQ mux available in the
RZ/N1 SoCs.

The first two patches of the series add support for GPIO (binding update
and device-tree description).

Other patches are related to GPIO interrupts and GPIO IRQ multiplexer.

In the RZ/N1 SoCs, GPIO interrupts are wired to a GPIO IRQ multiplexer.

This multiplexer does nothing but select 8 GPIO IRQ lines out of the 96
available to wire them to the GIC input lines.

One upstreaming attempt have been done previously by Phil Edworthy [1]
but the series has never been applied.

Based on my understanding, I have fully reworked the driver proposed by
Phil and removed the IRQ domain. Indeed, the device doesn't handle
interrupts. It just routes signals.

Also, as an interrupt-map property is used, the driver cannot be
involved as an interrupt controller itself. It is a nexus node.

With that in mind, patch 3 is related to the binding, patch 4 introduces
an helper to parse the interrupt-map property. This parsing is needed by
the driver. Indeed, the lines routing is defined by the interrupt-map
property and the driver needs to set registers to apply this routing.

The last two patches are the driver itself and the RZ/N1 device-tree
description update to have the support for the GPIO interrupts.

[1] https://lore.kernel.org/all/20190219155511.28507-1-phil.edworthy@renesas.com/

Best regards,
Hervé

Herve Codina (6):
  dt-bindings: gpio: snps,dw-apb: Add support for Renesas RZ/N1
  ARM: dts: r9a06g032: Add GPIO controllers
  dt-bindings: soc: renesas: Add the Renesas RZ/N1 GPIO Interrupt
    Multiplexer
  of/irq: Introduce of_irq_foreach_imap
  soc: renesas: Add support for Renesas RZ/N1 GPIO Interrupt Multiplexer
  ARM: dts: r9a06g032: Add support for GPIO interrupts

 .../bindings/gpio/snps,dw-apb-gpio.yaml       |   8 +-
 .../soc/renesas/renesas,rzn1-gpioirqmux.yaml  |  99 ++++++++++
 arch/arm/boot/dts/renesas/r9a06g032.dtsi      | 172 ++++++++++++++++++
 drivers/of/irq.c                              |  70 +++++++
 drivers/soc/renesas/Kconfig                   |   4 +
 drivers/soc/renesas/Makefile                  |   1 +
 drivers/soc/renesas/rzn1_irqmux.c             | 169 +++++++++++++++++
 include/linux/of_irq.h                        |  11 ++
 8 files changed, 533 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/soc/renesas/renesas,rzn1-gpioirqmux.yaml
 create mode 100644 drivers/soc/renesas/rzn1_irqmux.c

-- 
2.50.1
Re: [PATCH 0/6] gpio: renesas: Add support for GPIO and related interrupts in RZ/N1 SoC
Posted by Wolfram Sang 2 months, 1 week ago 
Hi Hervé,

> This series adds support for GPIO and GPIO IRQ mux available in the
> RZ/N1 SoCs.

Yes, way cool! Very happy to see this upstreaming effort!

> The first two patches of the series add support for GPIO (binding update
> and device-tree description).

So, I started simple and used the first two patches to enable LEDs on
pins 92 and 93 on my board. I added this on top of patch 1+2:

diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
index 3258b2e27434..4790ffad578f 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
@@ -185,6 +185,12 @@ fixed-link {
 	};
 };
 
+&gpio1 {
+	pinctrl-0 = <&pins_gpio1>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
 &i2c2 {
 	pinctrl-0 = <&pins_i2c2>;
 	pinctrl-names = "default";
@@ -256,6 +262,11 @@ pins_cpld: pins-cpld {
 			 <RZN1_PINMUX(122, RZN1_FUNC_USB)>;
 	};
 
+	pins_gpio1: pins-gpio1 {
+		pinmux = <RZN1_PINMUX(92, RZN1_FUNC_GPIO)>,	/* GPIO1B[23] */
+			 <RZN1_PINMUX(93, RZN1_FUNC_GPIO)>;	/* GPIO1B[24] */
+	};
+
 	pins_eth3: pins_eth3 {
 		pinmux = <RZN1_PINMUX(36, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
 			 <RZN1_PINMUX(37, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>

to my board dts. The controller gets probed but I can't control the
LEDs. Neither with exported GPIOs (via sysfs) nor with a dedicated LED
node. Am I missing something obvious? The LEDs are attached to PL_GPIO92
and PL_GPIO93 which are mapped to GPIO1b[23] and GPIO1b[24]. That seems
to be in accordance with the datasheet. I hope I just overlooked
something simple. Some outputs, first /sys/kernel/debug/gpio:

	...
	gpiochip1: GPIOs 552-583, parent: platform/5000c000.gpio, 5000c000.gpio:

	gpiochip2: GPIOs 584-615, parent: platform/5000c000.gpio, 5000c000.gpio:
	 gpio-608 (                    |sysfs               ) out hi 

And /sys/kernel/debug/pinctrl/40067000.pinctrl/pinmux-pins:

	Pinmux settings per pin
	Format: pin (name): mux_owner gpio_owner hog?
	...
	pin 92 (pl_gpio92): 5000c000.gpio (GPIO UNCLAIMED) function pins-gpio1 group pins-gpio1
	pin 93 (pl_gpio93): 5000c000.gpio (GPIO UNCLAIMED) function pins-gpio1 group pins-gpio1

I wonder about the "(GPIO UNCLAIMED)" a little? How do you use it on
your board?

Thanks and happy hacking,

   Wolfram
Re: [PATCH 0/6] gpio: renesas: Add support for GPIO and related interrupts in RZ/N1 SoC
Posted by Herve Codina 2 months, 1 week ago 
Hi Wolfram,

On Sun, 27 Jul 2025 13:01:35 +0200
Wolfram Sang <wsa+renesas@sang-engineering.com> wrote:

> Hi Hervé,
> 
> > This series adds support for GPIO and GPIO IRQ mux available in the
> > RZ/N1 SoCs.  
> 
> Yes, way cool! Very happy to see this upstreaming effort!
> 
> > The first two patches of the series add support for GPIO (binding update
> > and device-tree description).  
> 
> So, I started simple and used the first two patches to enable LEDs on
> pins 92 and 93 on my board. I added this on top of patch 1+2:
> 
> diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
> index 3258b2e27434..4790ffad578f 100644
> --- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
> +++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
> @@ -185,6 +185,12 @@ fixed-link {
>  	};
>  };
>  
> +&gpio1 {
> +	pinctrl-0 = <&pins_gpio1>;
> +	pinctrl-names = "default";
> +	status = "okay";
> +};
> +
>  &i2c2 {
>  	pinctrl-0 = <&pins_i2c2>;
>  	pinctrl-names = "default";
> @@ -256,6 +262,11 @@ pins_cpld: pins-cpld {
>  			 <RZN1_PINMUX(122, RZN1_FUNC_USB)>;
>  	};
>  
> +	pins_gpio1: pins-gpio1 {
> +		pinmux = <RZN1_PINMUX(92, RZN1_FUNC_GPIO)>,	/* GPIO1B[23] */
> +			 <RZN1_PINMUX(93, RZN1_FUNC_GPIO)>;	/* GPIO1B[24] */
> +	};
> +
>  	pins_eth3: pins_eth3 {
>  		pinmux = <RZN1_PINMUX(36, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
>  			 <RZN1_PINMUX(37, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>
> 
> to my board dts. The controller gets probed but I can't control the
> LEDs. Neither with exported GPIOs (via sysfs) nor with a dedicated LED
> node. Am I missing something obvious? The LEDs are attached to PL_GPIO92
> and PL_GPIO93 which are mapped to GPIO1b[23] and GPIO1b[24]. That seems
> to be in accordance with the datasheet. I hope I just overlooked
> something simple. Some outputs, first /sys/kernel/debug/gpio:
> 
> 	...
> 	gpiochip1: GPIOs 552-583, parent: platform/5000c000.gpio, 5000c000.gpio:
> 
> 	gpiochip2: GPIOs 584-615, parent: platform/5000c000.gpio, 5000c000.gpio:
> 	 gpio-608 (                    |sysfs               ) out hi 
> 
> And /sys/kernel/debug/pinctrl/40067000.pinctrl/pinmux-pins:
> 
> 	Pinmux settings per pin
> 	Format: pin (name): mux_owner gpio_owner hog?
> 	...
> 	pin 92 (pl_gpio92): 5000c000.gpio (GPIO UNCLAIMED) function pins-gpio1 group pins-gpio1
> 	pin 93 (pl_gpio93): 5000c000.gpio (GPIO UNCLAIMED) function pins-gpio1 group pins-gpio1
> 
> I wonder about the "(GPIO UNCLAIMED)" a little? How do you use it on
> your board?
> 

Strange, I have a LED working on my side.

My LED is connected to gpio0b[9] (GPIO17).

I just used:
--- 8< ---
	gpio_leds {
		compatible = "gpio-leds";

		led_1g: led-0 {
			label = "led_1g";
			gpios = <&gpio0b 9 GPIO_ACTIVE_HIGH>;
		};
	};

	&gpio0 {
		pinctrl-0 = <&pins_gpio0>;
		pinctrl-names = "default";
		status = "okay";
	};

	&pinctrl{
		/*
		 * I have other pins used as GPIOs but my led is :
		 *    RZN1_PINMUX(17, RZN1_FUNC_GPIO)
		 */

		pins_gpio0: pins_gpio0 {
			pinmux = <
				RZN1_PINMUX(13, RZN1_FUNC_GPIO)	/* GPIO0B[7] */
				RZN1_PINMUX(14, RZN1_FUNC_GPIO)	/* GPIO0B[8] */
				RZN1_PINMUX(15, RZN1_FUNC_GPIO)	/* GPIO0A[6] */
				RZN1_PINMUX(16, RZN1_FUNC_GPIO)	/* GPIO0A[7] */
				RZN1_PINMUX(17, RZN1_FUNC_GPIO)	/* GPIO0B[9] */
				RZN1_PINMUX(18, RZN1_FUNC_GPIO)	/* GPIO0B[10] */
				RZN1_PINMUX(22, RZN1_FUNC_GPIO)	/* GPIO0A[9] */
				RZN1_PINMUX(23, RZN1_FUNC_GPIO)	/* GPIO0B[13] */
			>;
			drive-strength = <6>;
			bias-disable;
		pins_gpio0_pullup {
			pinmux = <
				RZN1_PINMUX(25, RZN1_FUNC_GPIO)	/* GPIO0B[14] - A70CI_EN_N */
				RZN1_PINMUX(26, RZN1_FUNC_GPIO)	/* GPIO0B[15] - A71CH_EN_N */
				RZN1_PINMUX(27, RZN1_FUNC_GPIO)	/* GPIO0A[11] - TRUST_M_EN_N */
				RZN1_PINMUX(28, RZN1_FUNC_GPIO)	/* GPIO0A[12] - TRUST_X_EN_N */
				RZN1_PINMUX(32, RZN1_FUNC_GPIO)	/* GPIO0B[19] - STMA100_EN_N*/
			>;
			drive-strength = <6>;
			bias-pull-up;
		};

	};
--- 8< ---

Of course with:
  CONFIG_GPIO_DWAPB=y
  CONFIG_LEDS_CLASS=y
  CONFIG_LEDS_GPIO=y

My led is accessible from the user-space without any issue:
  echo 255 > /sys/class/leds/led_1g/brightness

I have checked /sys/kernel/debug/pinctrl/40067000.pinctrl/pinmux-pins and
I have also the "(GPIO UNCLAIMED)":
	...
	pin 12 (pl_gpio12): (MUX UNCLAIMED) (GPIO UNCLAIMED)
	pin 13 (pl_gpio13): 5000b000.gpio (GPIO UNCLAIMED) function pins_gpio0 group pins_gpio0
	pin 14 (pl_gpio14): 5000b000.gpio (GPIO UNCLAIMED) function pins_gpio0 group pins_gpio0
	pin 15 (pl_gpio15): 5000b000.gpio (GPIO UNCLAIMED) function pins_gpio0 group pins_gpio0
	pin 16 (pl_gpio16): 5000b000.gpio (GPIO UNCLAIMED) function pins_gpio0 group pins_gpio0
	pin 17 (pl_gpio17): 5000b000.gpio (GPIO UNCLAIMED) function pins_gpio0 group pins_gpio0
	pin 18 (pl_gpio18): 5000b000.gpio (GPIO UNCLAIMED) function pins_gpio0 group pins_gpio0
	pin 19 (pl_gpio19): (MUX UNCLAIMED) (GPIO UNCLAIMED)
	pin 20 (pl_gpio20): (MUX UNCLAIMED) (GPIO UNCLAIMED)
	pin 21 (pl_gpio21): (MUX UNCLAIMED) (GPIO UNCLAIMED)
	pin 22 (pl_gpio22): 5000b000.gpio (GPIO UNCLAIMED) function pins_gpio0 group pins_gpio0
	pin 23 (pl_gpio23): 5000b000.gpio (GPIO UNCLAIMED) function pins_gpio0 group pins_gpio0
	pin 24 (pl_gpio24): (MUX UNCLAIMED) (GPIO UNCLAIMED)
	pin 25 (pl_gpio25): 5000b000.gpio (GPIO UNCLAIMED) function pins_gpio0 group pins_gpio0_pullup
	pin 26 (pl_gpio26): 5000b000.gpio (GPIO UNCLAIMED) function pins_gpio0 group pins_gpio0_pullup
	pin 27 (pl_gpio27): 5000b000.gpio (GPIO UNCLAIMED) function pins_gpio0 group pins_gpio0_pullup
	pin 28 (pl_gpio28): 5000b000.gpio (GPIO UNCLAIMED) function pins_gpio0 group pins_gpio0_pullup
	pin 29 (pl_gpio29): (MUX UNCLAIMED) (GPIO UNCLAIMED)
	pin 30 (pl_gpio30): (MUX UNCLAIMED) (GPIO UNCLAIMED)
	pin 31 (pl_gpio31): (MUX UNCLAIMED) (GPIO UNCLAIMED)
	pin 32 (pl_gpio32): 5000b000.gpio (GPIO UNCLAIMED) function pins_gpio0 group pins_gpio0_pullup
	pin 33 (pl_gpio33): (MUX UNCLAIMED) (GPIO UNCLAIMED)
	...

When you described the LED on your side, did you reference the GPIO using &gpio1b
for instance gpios = <&gpio1b 23 GPIO_ACTIVE_HIGH>;

For GPIO accesses from user space I used gpioget/gpioset tools from libgpiod
without any issues to read/write a GPIO.

Best regards,
Hervé
Re: [PATCH 0/6] gpio: renesas: Add support for GPIO and related interrupts in RZ/N1 SoC
Posted by Wolfram Sang 2 months ago 
Hi Herve,

> 			drive-strength = <6>;
> 			bias-disable;

So, I missed those but sadly it didn't make a difference.

> 
> I have checked /sys/kernel/debug/pinctrl/40067000.pinctrl/pinmux-pins and
> I have also the "(GPIO UNCLAIMED)":

Still looks wrong. But is unrelated to my problem.

> When you described the LED on your side, did you reference the GPIO using &gpio1b
> for instance gpios = <&gpio1b 23 GPIO_ACTIVE_HIGH>;

Yes.

> For GPIO accesses from user space I used gpioget/gpioset tools from libgpiod
> without any issues to read/write a GPIO.

I use the sysfs interface. Also tried without the LED subsystem by
directly using the GPIO sysfs interface. The 'gpio' file in debugfs
reflects my changes, alas the LED does not glow :(

I tried a little bit here and there to no avail. I also tried to build
the BSP kernel to see if the LEDs light up there. Couldn't get that
kernel to boot even.

Conclusion: My gut feeling tells me that your patches are okay and I am
doing something stupidly wrong. But I need to tackle this with focus and
not as a side-task. Sadly, I can't do this before my holidays (starting
tomorrow), so I can only do this at the end of this month. I will make
this a priority thing for 6.18, though. Finally GPIO on this SoC would
be awesome and allows me to enable way more devices on my board.

Sorry for no better news...

All the best,

   Wolfram
Re: [PATCH 0/6] gpio: renesas: Add support for GPIO and related interrupts in RZ/N1 SoC
Posted by Rob Herring (Arm) 2 months, 1 week ago 
On Fri, 25 Jul 2025 17:26:09 +0200, Herve Codina wrote:
> Hi,
> 
> This series adds support for GPIO and GPIO IRQ mux available in the
> RZ/N1 SoCs.
> 
> The first two patches of the series add support for GPIO (binding update
> and device-tree description).
> 
> Other patches are related to GPIO interrupts and GPIO IRQ multiplexer.
> 
> In the RZ/N1 SoCs, GPIO interrupts are wired to a GPIO IRQ multiplexer.
> 
> This multiplexer does nothing but select 8 GPIO IRQ lines out of the 96
> available to wire them to the GIC input lines.
> 
> One upstreaming attempt have been done previously by Phil Edworthy [1]
> but the series has never been applied.
> 
> Based on my understanding, I have fully reworked the driver proposed by
> Phil and removed the IRQ domain. Indeed, the device doesn't handle
> interrupts. It just routes signals.
> 
> Also, as an interrupt-map property is used, the driver cannot be
> involved as an interrupt controller itself. It is a nexus node.
> 
> With that in mind, patch 3 is related to the binding, patch 4 introduces
> an helper to parse the interrupt-map property. This parsing is needed by
> the driver. Indeed, the lines routing is defined by the interrupt-map
> property and the driver needs to set registers to apply this routing.
> 
> The last two patches are the driver itself and the RZ/N1 device-tree
> description update to have the support for the GPIO interrupts.
> 
> [1] https://lore.kernel.org/all/20190219155511.28507-1-phil.edworthy@renesas.com/
> 
> Best regards,
> Hervé
> 
> Herve Codina (6):
>   dt-bindings: gpio: snps,dw-apb: Add support for Renesas RZ/N1
>   ARM: dts: r9a06g032: Add GPIO controllers
>   dt-bindings: soc: renesas: Add the Renesas RZ/N1 GPIO Interrupt
>     Multiplexer
>   of/irq: Introduce of_irq_foreach_imap
>   soc: renesas: Add support for Renesas RZ/N1 GPIO Interrupt Multiplexer
>   ARM: dts: r9a06g032: Add support for GPIO interrupts
> 
>  .../bindings/gpio/snps,dw-apb-gpio.yaml       |   8 +-
>  .../soc/renesas/renesas,rzn1-gpioirqmux.yaml  |  99 ++++++++++
>  arch/arm/boot/dts/renesas/r9a06g032.dtsi      | 172 ++++++++++++++++++
>  drivers/of/irq.c                              |  70 +++++++
>  drivers/soc/renesas/Kconfig                   |   4 +
>  drivers/soc/renesas/Makefile                  |   1 +
>  drivers/soc/renesas/rzn1_irqmux.c             | 169 +++++++++++++++++
>  include/linux/of_irq.h                        |  11 ++
>  8 files changed, 533 insertions(+), 1 deletion(-)
>  create mode 100644 Documentation/devicetree/bindings/soc/renesas/renesas,rzn1-gpioirqmux.yaml
>  create mode 100644 drivers/soc/renesas/rzn1_irqmux.c
> 
> --
> 2.50.1
> 
> 
> 


My bot found new DTB warnings on the .dts files added or changed in this
series.

Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.

If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:

  pip3 install dtschema --upgrade


This patch series was applied (using b4) to base:
 Base: attempting to guess base-commit...
 Base: tags/v6.16-rc3-23-g03a28dc39838 (exact match)

If this is not the correct base, please add 'base-commit' tag
(or use b4 which does this automatically)

New warnings running 'make CHECK_DTBS=y for arch/arm/boot/dts/renesas/' for 20250725152618.32886-1-herve.codina@bootlin.com:

arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: gpio@5000b000 (renesas,r9a06g032-gpio): 'gpio@0', 'gpio@1' do not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', '^pinctrl-[0-9]+$'
	from schema $id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: gpio@5000c000 (renesas,r9a06g032-gpio): 'gpio@0', 'gpio@1' do not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', '^pinctrl-[0-9]+$'
	from schema $id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: gpio@5000d000 (renesas,r9a06g032-gpio): 'gpio@0', 'gpio@1' do not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', '^pinctrl-[0-9]+$'
	from schema $id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: gpio@5000b000 (renesas,r9a06g032-gpio): 'gpio@0', 'gpio@1' do not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', '^pinctrl-[0-9]+$'
	from schema $id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: gpio@5000c000 (renesas,r9a06g032-gpio): 'gpio@0', 'gpio@1' do not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', '^pinctrl-[0-9]+$'
	from schema $id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: gpio@5000d000 (renesas,r9a06g032-gpio): 'gpio@0', 'gpio@1' do not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', '^pinctrl-[0-9]+$'
	from schema $id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#

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