Add Epoch subsystem (EPSS) L3 scaling support on QCS8300 SoC.
Changes since V2:
- Dropped the dt-binding patch from series, as it has been picked into
linux-next
https://lore.kernel.org/all/20250711102540.143-2-raviteja.laggyshetty@oss.qualcomm.com/
- Squashed EPSS L3 provider node changes and CPU OPP table changes into
single patch [Konrad].
- Link to v2: https://lore.kernel.org/all/20250711102540.143-1-raviteja.laggyshetty@oss.qualcomm.com/
Changes since v1:
- Removed SoC specific compatible "qcom,qcs8300-epss-l3"
from driver and used SA8775P SoC compatible as fallback in devicetree.
- As the EPSS hardware in QCS8300 and SA8775P SoCs are same, a
family-specific compatible string for the SA8775P has been added to the
bindings. This avoids the need to explicitly listing each SoC in the
match table and the family-specific fallback compatible can be used
for SoCs sharing the same hardware.
- As suggested by konrad, added EPSS path handles for CPU nodes.
- Link to v1: https://lore.kernel.org/all/20250617090651.55-1-raviteja.laggyshetty@oss.qualcomm.com/
Raviteja Laggyshetty (1):
arm64: dts: qcom: qcs8300: Add EPSS l3 interconnect provider node and
CPUCP OPP tables to scale DDR/L3
arch/arm64/boot/dts/qcom/qcs8300.dtsi | 301 ++++++++++++++++++++++++++
1 file changed, 301 insertions(+)
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2.43.0