[PATCH v7 0/8] Enable QUPs and Serial on SA8255p Qualcomm platforms

Praveen Talari posted 8 patches 2 months, 2 weeks ago
.../serial/qcom,sa8255p-geni-uart.yaml        |  69 ++++
.../soc/qcom/qcom,sa8255p-geni-se-qup.yaml    | 107 ++++++
drivers/soc/qcom/qcom-geni-se.c               |  13 +-
drivers/tty/serial/qcom_geni_serial.c         | 338 ++++++++++++++----
4 files changed, 452 insertions(+), 75 deletions(-)
create mode 100644 Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml
create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,sa8255p-geni-se-qup.yaml
[PATCH v7 0/8] Enable QUPs and Serial on SA8255p Qualcomm platforms
Posted by Praveen Talari 2 months, 2 weeks ago
The Qualcomm automotive SA8255p SoC relies on firmware to configure
platform resources, including clocks, interconnects and TLMM. The device
drivers request resources operations over SCMI using power and
performance protocols.

The SCMI power protocol enables or disables resources like clocks,
interconnect paths, and TLMM (GPIOs) using runtime PM framework APIs,
such as resume/suspend, to control power states(on/off).

The SCMI performance protocol manages UART baud rates, with each baud
rate represented by a performance level. Drivers use the
dev_pm_opp_set_level() API to request the desired baud rate by
specifying the performance level.

The QUP drivers are SCMI clients, with clocks, interconnects, pinctrl
and power-domains abstracted by a SCMI server.

The serial driver has a dependency on the dev_pm_opp_set_level() function,
which is applied in the OPP tree's linux-next branch.

Nikunj Kela (2):
  dt-bindings: serial: describe SA8255p
  dt-bindings: qcom: geni-se: describe SA8255p

Praveen Talari (6):
  soc: qcom: geni-se: Enable QUPs on SA8255p Qualcomm platforms
  serial: qcom-geni: move resource initialization to separate function
  serial: qcom-geni: move resource control logic to separate functions
  serial: qcom-geni: move clock-rate logic to separate function
  serial: qcom-geni: Enable PM runtime for serial driver
  serial: qcom-geni: Enable Serial on SA8255p Qualcomm platforms
---
v3 -> v4
- removed patch "[PATCH v3 1/9] opp: add new helper API dev_pm_opp_set_level()"
  from series and serial driver has dependency of this API which is
  applied in the OPP tree's linux-next branch.
---

 .../serial/qcom,sa8255p-geni-uart.yaml        |  69 ++++
 .../soc/qcom/qcom,sa8255p-geni-se-qup.yaml    | 107 ++++++
 drivers/soc/qcom/qcom-geni-se.c               |  13 +-
 drivers/tty/serial/qcom_geni_serial.c         | 338 ++++++++++++++----
 4 files changed, 452 insertions(+), 75 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml
 create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,sa8255p-geni-se-qup.yaml


base-commit: 97987520025658f30bb787a99ffbd9bbff9ffc9d
-- 
2.17.1
Re: [PATCH v7 0/8] Enable QUPs and Serial on SA8255p Qualcomm platforms
Posted by Krzysztof Kozlowski 2 months, 2 weeks ago
On Mon, Jul 21, 2025 at 11:15:24PM +0530, Praveen Talari wrote:
> The Qualcomm automotive SA8255p SoC relies on firmware to configure
> platform resources, including clocks, interconnects and TLMM. The device
> drivers request resources operations over SCMI using power and
> performance protocols.
> 
> The SCMI power protocol enables or disables resources like clocks,
> interconnect paths, and TLMM (GPIOs) using runtime PM framework APIs,
> such as resume/suspend, to control power states(on/off).
> 
> The SCMI performance protocol manages UART baud rates, with each baud
> rate represented by a performance level. Drivers use the
> dev_pm_opp_set_level() API to request the desired baud rate by
> specifying the performance level.
> 
> The QUP drivers are SCMI clients, with clocks, interconnects, pinctrl
> and power-domains abstracted by a SCMI server.
> 
> The serial driver has a dependency on the dev_pm_opp_set_level() function,
> which is applied in the OPP tree's linux-next branch.

Where is the changelog with lore links?

Best regards,
Krzysztof