The AM62D2 SoC belongs to the K3 Multicore SoC architecture with DSP core
targeted for applications needing high-performance Digital Signal
Processing. It is used in applications like automotive audio systems,
professional sound equipment, radar and radio for aerospace, sonar in
marine devices, and ultrasound in medical imaging. It also supports
precise signal analysis in test and measurement tools.
Some highlights of AM62D2 SoC are:
* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. Dual/Single
core variants are provided in the same package to allow HW compatible
designs.
* One Device manager Cortex-R5F for system power and resource management,
and one Cortex-R5F for Functional Safety or general-purpose usage.
* DSP with Matrix Multiplication Accelerator(MMA) (up to 2 TOPS) based on
single core C7x.
* 3x Multichannel Audio Serial Ports (McASP) Up to 4/6/16 Serial Data Pins
which can Transmit and Receive Clocks up to 50MHz, with multi-channel I2S
and TDM Audio inputs and outputs.
* Integrated Giga-bit Ethernet switch supporting up to a total of two
external ports with TSN capable to enable audio networking features such
as, Ethernet Audio Video Bridging (eAVB) and Dante.
* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, OSPI memory
controller, 1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other
peripherals.
* Dedicated Centralized Hardware Security Module with support for secure
boot, debug security and crypto acceleration and trusted execution
environment.
* One 32 bit DDR Subsystem that supports LPDDR4, DDR4 memory types.
* Low power mode support: Partial IO support for CAN/GPIO/UART wakeup.
This SoC is of part K3 AM62x family, which includes the AM62A and AM62P
variants. While the AM62A and AM62D are largely similar, the AM62D is
specifically targeted for general-purpose DSP applications, whereas the
AM62A focuses on edge AI workloads. A key distinction is that the AM62D
does not include multimedia components such as the video encoder/decoder,
MJPEG encoder, Vision Processing Accelerator (VPAC) for image signal
processing, or the display subsystem. Additionally, the AM62D has a
different pin configuration compared to the AM62A, which impacts
embedded software development.
This adds dt bindings for TI's AM62D2 family of devices.
More details about the SoCs can be found in the Technical Reference Manual:
https://www.ti.com/lit/pdf/sprujd4
Signed-off-by: Paresh Bhagat <p-bhagat@ti.com>
---
Documentation/devicetree/bindings/arm/ti/k3.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml
index bf6003d8fb76..e80c653fa438 100644
--- a/Documentation/devicetree/bindings/arm/ti/k3.yaml
+++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml
@@ -25,6 +25,12 @@ properties:
- ti,am62a7-sk
- const: ti,am62a7
+ - description: K3 AM62D2 SoC and Boards
+ items:
+ - enum:
+ - ti,am62d2-evm
+ - const: ti,am62d2
+
- description: K3 AM62A7 SoC PHYTEC phyBOARD-Lyra
items:
- const: phytec,am62a7-phyboard-lyra-rdk
--
2.34.1On 23/06/2025 16:12, Paresh Bhagat wrote: > The AM62D2 SoC belongs to the K3 Multicore SoC architecture with DSP core > targeted for applications needing high-performance Digital Signal > Processing. It is used in applications like automotive audio systems, > professional sound equipment, radar and radio for aerospace, sonar in > marine devices, and ultrasound in medical imaging. It also supports > precise signal analysis in test and measurement tools. Drop all marketing stuff. > > Some highlights of AM62D2 SoC are: This is not a product brochure. A nit, subject: drop second/last, redundant "bindings". The "dt-bindings" prefix is already stating that these are bindings. See also: https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18 > > * Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. Dual/Single > core variants are provided in the same package to allow HW compatible > designs. > * One Device manager Cortex-R5F for system power and resource management, > and one Cortex-R5F for Functional Safety or general-purpose usage. > * DSP with Matrix Multiplication Accelerator(MMA) (up to 2 TOPS) based on > single core C7x. > * 3x Multichannel Audio Serial Ports (McASP) Up to 4/6/16 Serial Data Pins > which can Transmit and Receive Clocks up to 50MHz, with multi-channel I2S > and TDM Audio inputs and outputs. > * Integrated Giga-bit Ethernet switch supporting up to a total of two > external ports with TSN capable to enable audio networking features such > as, Ethernet Audio Video Bridging (eAVB) and Dante. > * 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, OSPI memory > controller, 1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other > peripherals. > * Dedicated Centralized Hardware Security Module with support for secure > boot, debug security and crypto acceleration and trusted execution > environment. > * One 32 bit DDR Subsystem that supports LPDDR4, DDR4 memory types. > * Low power mode support: Partial IO support for CAN/GPIO/UART wakeup. > > This SoC is of part K3 AM62x family, which includes the AM62A and AM62P > variants. While the AM62A and AM62D are largely similar, the AM62D is > specifically targeted for general-purpose DSP applications, whereas the > AM62A focuses on edge AI workloads. A key distinction is that the AM62D > does not include multimedia components such as the video encoder/decoder, > MJPEG encoder, Vision Processing Accelerator (VPAC) for image signal > processing, or the display subsystem. Additionally, the AM62D has a > different pin configuration compared to the AM62A, which impacts > embedded software development. > > This adds dt bindings for TI's AM62D2 family of devices. > > More details about the SoCs can be found in the Technical Reference Manual: > https://www.ti.com/lit/pdf/sprujd4 > > Signed-off-by: Paresh Bhagat <p-bhagat@ti.com> And what happened with the previous comments? Reach internally TI so they will coach you how to send patches upstream. Best regards, Krzysztof
Hi Krzysztof, Thanks for the review. On 23/06/25 19:55, Krzysztof Kozlowski wrote: > On 23/06/2025 16:12, Paresh Bhagat wrote: >> The AM62D2 SoC belongs to the K3 Multicore SoC architecture with DSP core >> targeted for applications needing high-performance Digital Signal >> Processing. It is used in applications like automotive audio systems, >> professional sound equipment, radar and radio for aerospace, sonar in >> marine devices, and ultrasound in medical imaging. It also supports >> precise signal analysis in test and measurement tools. > Drop all marketing stuff. > >> Some highlights of AM62D2 SoC are: > This is not a product brochure. > > A nit, subject: drop second/last, redundant "bindings". The > "dt-bindings" prefix is already stating that these are bindings. > See also: > https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18 Will fix this in next version. Thanks > > > >> * Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. Dual/Single >> core variants are provided in the same package to allow HW compatible >> designs. >> * One Device manager Cortex-R5F for system power and resource management, >> and one Cortex-R5F for Functional Safety or general-purpose usage. >> * DSP with Matrix Multiplication Accelerator(MMA) (up to 2 TOPS) based on >> single core C7x. >> * 3x Multichannel Audio Serial Ports (McASP) Up to 4/6/16 Serial Data Pins >> which can Transmit and Receive Clocks up to 50MHz, with multi-channel I2S >> and TDM Audio inputs and outputs. >> * Integrated Giga-bit Ethernet switch supporting up to a total of two >> external ports with TSN capable to enable audio networking features such >> as, Ethernet Audio Video Bridging (eAVB) and Dante. >> * 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, OSPI memory >> controller, 1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other >> peripherals. >> * Dedicated Centralized Hardware Security Module with support for secure >> boot, debug security and crypto acceleration and trusted execution >> environment. >> * One 32 bit DDR Subsystem that supports LPDDR4, DDR4 memory types. >> * Low power mode support: Partial IO support for CAN/GPIO/UART wakeup. I will refine the first two paragraphs to be very concise. >> >> This SoC is of part K3 AM62x family, which includes the AM62A and AM62P >> variants. While the AM62A and AM62D are largely similar, the AM62D is >> specifically targeted for general-purpose DSP applications, whereas the >> AM62A focuses on edge AI workloads. A key distinction is that the AM62D >> does not include multimedia components such as the video encoder/decoder, >> MJPEG encoder, Vision Processing Accelerator (VPAC) for image signal >> processing, or the display subsystem. Additionally, the AM62D has a >> different pin configuration compared to the AM62A, which impacts >> embedded software development. This section is important as it clarifies the difference between AM62a and AM62d, as we are reusing AM62a dtsi files for AM62d. Let me know if you need a shorter version. >> >> This adds dt bindings for TI's AM62D2 family of devices. >> >> More details about the SoCs can be found in the Technical Reference Manual: >> https://www.ti.com/lit/pdf/sprujd4 >> >> Signed-off-by: Paresh Bhagat <p-bhagat@ti.com> > > And what happened with the previous comments? Yep there were some indentation problems earlier, which is fixed in this version. There was also an ack from Conor Dooley in v3. I will include that. > > Reach internally TI so they will coach you how to send patches upstream. > > Best regards, > Krzysztof
On 24/06/2025 12:39, Paresh Bhagat wrote: > >>> >>> This SoC is of part K3 AM62x family, which includes the AM62A and AM62P >>> variants. While the AM62A and AM62D are largely similar, the AM62D is >>> specifically targeted for general-purpose DSP applications, whereas the >>> AM62A focuses on edge AI workloads. A key distinction is that the AM62D >>> does not include multimedia components such as the video encoder/decoder, >>> MJPEG encoder, Vision Processing Accelerator (VPAC) for image signal >>> processing, or the display subsystem. Additionally, the AM62D has a >>> different pin configuration compared to the AM62A, which impacts >>> embedded software development. > > > This section is important as it clarifies the difference between AM62a > and AM62d, as we are reusing AM62a dtsi files for AM62d. Let me know if > you need a shorter version. This is not important: "While the AM62A and AM62D are largely similar, the AM62D is specifically targeted for general-purpose DSP applications, whereas the AM62A focuses on edge AI workloads." It is irrelevant. Rest is fine. > > >>> >>> This adds dt bindings for TI's AM62D2 family of devices. >>> >>> More details about the SoCs can be found in the Technical Reference Manual: >>> https://www.ti.com/lit/pdf/sprujd4 >>> >>> Signed-off-by: Paresh Bhagat <p-bhagat@ti.com> >> >> And what happened with the previous comments? > > > Yep there were some indentation problems earlier, which is fixed in this > version. There was also an ack from Conor Dooley in v3. I will include that. Why you did not include it before? Can you start using b4 for your process of submitting patches? Best regards, Krzysztof
Hi Krzysztof, On 24/06/25 16:25, Krzysztof Kozlowski wrote: > On 24/06/2025 12:39, Paresh Bhagat wrote: >>>> This SoC is of part K3 AM62x family, which includes the AM62A and AM62P >>>> variants. While the AM62A and AM62D are largely similar, the AM62D is >>>> specifically targeted for general-purpose DSP applications, whereas the >>>> AM62A focuses on edge AI workloads. A key distinction is that the AM62D >>>> does not include multimedia components such as the video encoder/decoder, >>>> MJPEG encoder, Vision Processing Accelerator (VPAC) for image signal >>>> processing, or the display subsystem. Additionally, the AM62D has a >>>> different pin configuration compared to the AM62A, which impacts >>>> embedded software development. >> >> This section is important as it clarifies the difference between AM62a >> and AM62d, as we are reusing AM62a dtsi files for AM62d. Let me know if >> you need a shorter version. > This is not important: > > "While the AM62A and AM62D are largely similar, the AM62D is > specifically targeted for general-purpose DSP applications, whereas the > AM62A focuses on edge AI workloads." > > It is irrelevant. Rest is fine. Fine will do. > >> >>>> This adds dt bindings for TI's AM62D2 family of devices. >>>> >>>> More details about the SoCs can be found in the Technical Reference Manual: >>>> https://www.ti.com/lit/pdf/sprujd4 >>>> >>>> Signed-off-by: Paresh Bhagat <p-bhagat@ti.com> >>> And what happened with the previous comments? >> >> Yep there were some indentation problems earlier, which is fixed in this >> version. There was also an ack from Conor Dooley in v3. I will include that. > Why you did not include it before? > > Can you start using b4 for your process of submitting patches? I missed it. I got to know about the b4 tool internally, will use it. Thanks. > > > Best regards, > Krzysztof
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