[v1] SPMI: MediaTek: Add support for multi-bus

[PATCH v1 1/5] dt-bindings: spmi: Add MediaTek MT8196 SPMI 2 Arbiter/Controllers

Posted by AngeloGioacchino Del Regno 7 months, 3 weeks ago

Document the MT8196 SPMI 2.0 Controller with a new schema.
This is a MIPI SPMI 2.0 compliant IP, composed of a main arbiter
and two SPMI master controllers with Request Capable Slave (RCS)
support.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 .../bindings/spmi/mediatek,mt8196-spmi.yaml   | 138 ++++++++++++++++++
 1 file changed, 138 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spmi/mediatek,mt8196-spmi.yaml

diff --git a/Documentation/devicetree/bindings/spmi/mediatek,mt8196-spmi.yaml b/Documentation/devicetree/bindings/spmi/mediatek,mt8196-spmi.yaml
new file mode 100644
index 000000000000..d7eb63e81a5c
--- /dev/null
+++ b/Documentation/devicetree/bindings/spmi/mediatek,mt8196-spmi.yaml
@@ -0,0 +1,138 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spmi/mediatek,mt8196-spmi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek MT8196 SPMI 2.0 Controller
+
+maintainers:
+  - Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
+  - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+
+description:
+  The MediaTek MT8196 SoC features a SPMI version 2.0 compliant controller,
+  with internal wrapping arbitration logic to allow for multiple on-chip
+  devices to control up to two SPMI buses.
+  The main arbiter also acts as an interrupt controller, arbitering also
+  the interrupts coming from SPMI-connected devices into each of the nested
+  interrupt controllers from any of the present SPMI buses.
+
+properties:
+  compatible:
+    oneOf:
+      - enum:
+          - mediatek,mt8196-spmi
+      - items:
+          - enum:
+              - mediatek,mt6991-spmi
+          - const: mediatek,mt8196-spmi
+
+  ranges: true
+
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 1
+
+patternProperties:
+  "^spmi@[a-f0-9]+$":
+    type: object
+    $ref: /schemas/spmi/spmi.yaml
+    unevaluatedProperties: false
+
+    properties:
+      reg:
+        items:
+          - description: controller interface registers
+          - description: spmi master controller registers
+
+      reg-names:
+        items:
+          - const: pmif
+          - const: spmimst
+
+      clocks:
+        items:
+          - description: controller interface system clock
+          - description: controller interface timer clock
+          - description: spmi controller master clock
+
+      clock-names:
+        items:
+          - const: pmif_sys_ck
+          - const: pmif_tmr_ck
+          - const: spmimst_clk_mux
+
+      interrupts:
+        maxItems: 1
+
+      interrupt-names:
+        const: rcs
+
+      interrupt-controller: true
+
+      "#interrupt-cells":
+        const: 3
+        description: |
+          cell 1: slave ID for the requested interrupt (0-15)
+          cell 2: the requested peripheral interrupt (0-7)
+          cell 3: interrupt flags indicating level-sense information,
+                  as defined in dt-bindings/interrupt-controller/irq.h
+    required:
+      - reg
+      - reg-names
+      - clocks
+      - clock-names
+      - interrupts
+      - interrupt-names
+      - interrupt-controller
+      - "#interrupt-cells"
+
+required:
+  - compatible
+  - ranges
+  - '#address-cells'
+  - '#size-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    soc {
+      #address-cells = <2>;
+      #size-cells = <2>;
+
+      spmi-arbiter@1c018000 {
+        compatible = "mediatek,mt8196-spmi";
+        ranges = <0 0 0x1c018000 0x4900>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        spmi@0 {
+          reg = <0 0x900>, <0x4800 0x100>;
+          reg-names = "pmif", "spmimst";
+          interrupts-extended = <&pio 292 IRQ_TYPE_LEVEL_HIGH>;
+          interrupt-names = "rcs";
+         interrupt-controller;
+          #interrupt-cells = <3>;
+          clocks = <&pmif_sys>, <&pmif_tmr>, <&spmi_mst>;
+          clock-names = "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux";
+        };
+
+        spmi@2000 {
+          reg = <0x2000 0x900>, <0x4000 0x100>;
+          reg-names = "pmif", "spmimst";
+          interrupts-extended = <&pio 291 IRQ_TYPE_LEVEL_HIGH>;
+          interrupt-names = "rcs";
+          interrupt-controller;
+          #interrupt-cells = <3>;
+          clocks = <&pmif_sys>, <&pmif_tmr>, <&spmi_mst>;
+          clock-names = "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux";
+        };
+      };
+    };
+...
-- 
2.49.0

Re: [PATCH v1 1/5] dt-bindings: spmi: Add MediaTek MT8196 SPMI 2 Arbiter/Controllers

Posted by Rob Herring 7 months, 2 weeks ago

On Mon, Jun 23, 2025 at 02:00:43PM +0200, AngeloGioacchino Del Regno wrote:
> Document the MT8196 SPMI 2.0 Controller with a new schema.
> This is a MIPI SPMI 2.0 compliant IP, composed of a main arbiter
> and two SPMI master controllers with Request Capable Slave (RCS)
> support.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
>  .../bindings/spmi/mediatek,mt8196-spmi.yaml   | 138 ++++++++++++++++++
>  1 file changed, 138 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/spmi/mediatek,mt8196-spmi.yaml
> 
> diff --git a/Documentation/devicetree/bindings/spmi/mediatek,mt8196-spmi.yaml b/Documentation/devicetree/bindings/spmi/mediatek,mt8196-spmi.yaml
> new file mode 100644
> index 000000000000..d7eb63e81a5c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spmi/mediatek,mt8196-spmi.yaml
> @@ -0,0 +1,138 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spmi/mediatek,mt8196-spmi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek MT8196 SPMI 2.0 Controller
> +
> +maintainers:
> +  - Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> +  - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> +
> +description:
> +  The MediaTek MT8196 SoC features a SPMI version 2.0 compliant controller,
> +  with internal wrapping arbitration logic to allow for multiple on-chip
> +  devices to control up to two SPMI buses.
> +  The main arbiter also acts as an interrupt controller, arbitering also
> +  the interrupts coming from SPMI-connected devices into each of the nested
> +  interrupt controllers from any of the present SPMI buses.
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - enum:
> +          - mediatek,mt8196-spmi
> +      - items:
> +          - enum:
> +              - mediatek,mt6991-spmi
> +          - const: mediatek,mt8196-spmi
> +
> +  ranges: true
> +
> +  '#address-cells':
> +    const: 1
> +
> +  '#size-cells':
> +    const: 1
> +
> +patternProperties:
> +  "^spmi@[a-f0-9]+$":
> +    type: object
> +    $ref: /schemas/spmi/spmi.yaml
> +    unevaluatedProperties: false
> +
> +    properties:
> +      reg:
> +        items:
> +          - description: controller interface registers
> +          - description: spmi master controller registers
> +
> +      reg-names:
> +        items:
> +          - const: pmif
> +          - const: spmimst
> +
> +      clocks:
> +        items:
> +          - description: controller interface system clock
> +          - description: controller interface timer clock
> +          - description: spmi controller master clock
> +
> +      clock-names:
> +        items:
> +          - const: pmif_sys_ck
> +          - const: pmif_tmr_ck
> +          - const: spmimst_clk_mux
> +
> +      interrupts:
> +        maxItems: 1
> +
> +      interrupt-names:
> +        const: rcs
> +
> +      interrupt-controller: true
> +
> +      "#interrupt-cells":
> +        const: 3
> +        description: |
> +          cell 1: slave ID for the requested interrupt (0-15)
> +          cell 2: the requested peripheral interrupt (0-7)
> +          cell 3: interrupt flags indicating level-sense information,
> +                  as defined in dt-bindings/interrupt-controller/irq.h
> +    required:
> +      - reg
> +      - reg-names
> +      - clocks
> +      - clock-names
> +      - interrupts
> +      - interrupt-names
> +      - interrupt-controller
> +      - "#interrupt-cells"
> +
> +required:
> +  - compatible
> +  - ranges
> +  - '#address-cells'
> +  - '#size-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +    soc {
> +      #address-cells = <2>;
> +      #size-cells = <2>;
> +
> +      spmi-arbiter@1c018000 {
> +        compatible = "mediatek,mt8196-spmi";
> +        ranges = <0 0 0x1c018000 0x4900>;
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +
> +        spmi@0 {
> +          reg = <0 0x900>, <0x4800 0x100>;
> +          reg-names = "pmif", "spmimst";
> +          interrupts-extended = <&pio 292 IRQ_TYPE_LEVEL_HIGH>;
> +          interrupt-names = "rcs";
> +         interrupt-controller;

Indentation error.

Otherwise,

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>

> +          #interrupt-cells = <3>;
> +          clocks = <&pmif_sys>, <&pmif_tmr>, <&spmi_mst>;
> +          clock-names = "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux";
> +        };
> +
> +        spmi@2000 {
> +          reg = <0x2000 0x900>, <0x4000 0x100>;
> +          reg-names = "pmif", "spmimst";
> +          interrupts-extended = <&pio 291 IRQ_TYPE_LEVEL_HIGH>;
> +          interrupt-names = "rcs";
> +          interrupt-controller;
> +          #interrupt-cells = <3>;
> +          clocks = <&pmif_sys>, <&pmif_tmr>, <&spmi_mst>;
> +          clock-names = "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux";
> +        };
> +      };
> +    };
> +...
> -- 
> 2.49.0
>

Re: [PATCH v1 1/5] dt-bindings: spmi: Add MediaTek MT8196 SPMI 2 Arbiter/Controllers

Posted by AngeloGioacchino Del Regno 7 months, 2 weeks ago

Il 27/06/25 22:07, Rob Herring ha scritto:
> On Mon, Jun 23, 2025 at 02:00:43PM +0200, AngeloGioacchino Del Regno wrote:
>> Document the MT8196 SPMI 2.0 Controller with a new schema.
>> This is a MIPI SPMI 2.0 compliant IP, composed of a main arbiter
>> and two SPMI master controllers with Request Capable Slave (RCS)
>> support.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>> ---
>>   .../bindings/spmi/mediatek,mt8196-spmi.yaml   | 138 ++++++++++++++++++
>>   1 file changed, 138 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/spmi/mediatek,mt8196-spmi.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/spmi/mediatek,mt8196-spmi.yaml b/Documentation/devicetree/bindings/spmi/mediatek,mt8196-spmi.yaml
>> new file mode 100644
>> index 000000000000..d7eb63e81a5c
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/spmi/mediatek,mt8196-spmi.yaml
>> @@ -0,0 +1,138 @@
>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/spmi/mediatek,mt8196-spmi.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: MediaTek MT8196 SPMI 2.0 Controller
>> +
>> +maintainers:
>> +  - Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
>> +  - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>> +
>> +description:
>> +  The MediaTek MT8196 SoC features a SPMI version 2.0 compliant controller,
>> +  with internal wrapping arbitration logic to allow for multiple on-chip
>> +  devices to control up to two SPMI buses.
>> +  The main arbiter also acts as an interrupt controller, arbitering also
>> +  the interrupts coming from SPMI-connected devices into each of the nested
>> +  interrupt controllers from any of the present SPMI buses.
>> +
>> +properties:
>> +  compatible:
>> +    oneOf:
>> +      - enum:
>> +          - mediatek,mt8196-spmi
>> +      - items:
>> +          - enum:
>> +              - mediatek,mt6991-spmi
>> +          - const: mediatek,mt8196-spmi
>> +
>> +  ranges: true
>> +
>> +  '#address-cells':
>> +    const: 1
>> +
>> +  '#size-cells':
>> +    const: 1
>> +
>> +patternProperties:
>> +  "^spmi@[a-f0-9]+$":
>> +    type: object
>> +    $ref: /schemas/spmi/spmi.yaml
>> +    unevaluatedProperties: false
>> +
>> +    properties:
>> +      reg:
>> +        items:
>> +          - description: controller interface registers
>> +          - description: spmi master controller registers
>> +
>> +      reg-names:
>> +        items:
>> +          - const: pmif
>> +          - const: spmimst
>> +
>> +      clocks:
>> +        items:
>> +          - description: controller interface system clock
>> +          - description: controller interface timer clock
>> +          - description: spmi controller master clock
>> +
>> +      clock-names:
>> +        items:
>> +          - const: pmif_sys_ck
>> +          - const: pmif_tmr_ck
>> +          - const: spmimst_clk_mux
>> +
>> +      interrupts:
>> +        maxItems: 1
>> +
>> +      interrupt-names:
>> +        const: rcs
>> +
>> +      interrupt-controller: true
>> +
>> +      "#interrupt-cells":
>> +        const: 3
>> +        description: |
>> +          cell 1: slave ID for the requested interrupt (0-15)
>> +          cell 2: the requested peripheral interrupt (0-7)
>> +          cell 3: interrupt flags indicating level-sense information,
>> +                  as defined in dt-bindings/interrupt-controller/irq.h
>> +    required:
>> +      - reg
>> +      - reg-names
>> +      - clocks
>> +      - clock-names
>> +      - interrupts
>> +      - interrupt-names
>> +      - interrupt-controller
>> +      - "#interrupt-cells"
>> +
>> +required:
>> +  - compatible
>> +  - ranges
>> +  - '#address-cells'
>> +  - '#size-cells'
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
>> +
>> +    soc {
>> +      #address-cells = <2>;
>> +      #size-cells = <2>;
>> +
>> +      spmi-arbiter@1c018000 {
>> +        compatible = "mediatek,mt8196-spmi";
>> +        ranges = <0 0 0x1c018000 0x4900>;
>> +        #address-cells = <1>;
>> +        #size-cells = <1>;
>> +
>> +        spmi@0 {
>> +          reg = <0 0x900>, <0x4800 0x100>;
>> +          reg-names = "pmif", "spmimst";
>> +          interrupts-extended = <&pio 292 IRQ_TYPE_LEVEL_HIGH>;
>> +          interrupt-names = "rcs";
>> +         interrupt-controller;
> 
> Indentation error.
> 
> Otherwise,
> 
> Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
> 

Oh sorry for that.

If there's no "complaint" on any other patch of this series, I wonder if this
could be fixed while applying?

Thanks a lot,
Angelo

>> +          #interrupt-cells = <3>;
>> +          clocks = <&pmif_sys>, <&pmif_tmr>, <&spmi_mst>;
>> +          clock-names = "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux";
>> +        };
>> +
>> +        spmi@2000 {
>> +          reg = <0x2000 0x900>, <0x4000 0x100>;
>> +          reg-names = "pmif", "spmimst";
>> +          interrupts-extended = <&pio 291 IRQ_TYPE_LEVEL_HIGH>;
>> +          interrupt-names = "rcs";
>> +          interrupt-controller;
>> +          #interrupt-cells = <3>;
>> +          clocks = <&pmif_sys>, <&pmif_tmr>, <&spmi_mst>;
>> +          clock-names = "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux";
>> +        };
>> +      };
>> +    };
>> +...
>> -- 
>> 2.49.0
>>

[PATCH v1 1/5] dt-bindings: spmi: Add MediaTek MT8196 SPMI 2 Arbiter/Controllers
[PATCH v1 2/5] spmi: mtk-pmif: Add multi-bus support for SPMI 2.0
[PATCH v1 3/5] spmi: mtk-pmif: Keep spinlock until read is fully done
[PATCH v1 4/5] spmi: mtk-pmif: Implement Request Capable Slave (RCS) interrupt
[PATCH v1 5/5] spmi: mtk-pmif: Add support for MT8196 SPMI Controller