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[PATCH 1/3] arm64: dts: renesas: Add CN15 eMMC and SD overlays for RZ/V2N EVK

Prabhakar posted 3 patches 3 months, 2 weeks ago
[PATCH 1/3] arm64: dts: renesas: Add CN15 eMMC and SD overlays for RZ/V2N EVK
Posted by Prabhakar 3 months, 2 weeks ago 
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Introduce device tree overlays to support the eMMC (RTK0EF0186B02000BJ)
and microSD (RTK0EF0186B01000BJ) sub-boards via the CN15 connector on the
RZ/V2N EVK. These overlays enable SDHI0 with appropriate pinctrl settings,
regulator configurations, and GPIO handling.

Shared DTSI fragments (rzv2-evk-cn15-emmc-common.dtsi and
rzv2-evk-cn15-sd-common.dtsi) provide reusable configurations for both
RZ/V2N and RZ/V2H EVKs, as both support the same CN15 sub-boards.

Additionally, the base board DTS is updated to define an `mmc0` alias
pointing to `&sdhi0`, and to add a fixed 1.8V regulator node (`reg_1p8v`)
intended for use by the optional eMMC sub-board and, in the future, the
ADV7535 HDMI encoder (not yet enabled in the DTS).

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/Makefile          |  4 ++
 .../r9a09g056n48-rzv2n-evk-cn15-emmc.dtso     | 15 +++++
 .../r9a09g056n48-rzv2n-evk-cn15-sd.dtso       | 16 +++++
 .../dts/renesas/r9a09g056n48-rzv2n-evk.dts    | 10 +++
 .../renesas/rzv2-evk-cn15-emmc-common.dtsi    | 46 +++++++++++++
 .../dts/renesas/rzv2-evk-cn15-sd-common.dtsi  | 67 +++++++++++++++++++
 6 files changed, 158 insertions(+)
 create mode 100644 arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk-cn15-emmc.dtso
 create mode 100644 arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk-cn15-sd.dtso
 create mode 100644 arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc-common.dtsi
 create mode 100644 arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd-common.dtsi

diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 677ba3aa8931..130ef8f34d52 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -161,6 +161,10 @@ r9a09g047e57-smarc-cru-csi-ov5645-dtbs := r9a09g047e57-smarc.dtb r9a09g047e57-sm
 dtb-$(CONFIG_ARCH_R9A09G047) += r9a09g047e57-smarc-cru-csi-ov5645.dtb
 
 dtb-$(CONFIG_ARCH_R9A09G056) += r9a09g056n48-rzv2n-evk.dtb
+dtb-$(CONFIG_ARCH_R9A09G056) += r9a09g056n48-rzv2n-evk-cn15-emmc.dtbo
+r9a09g056n48-rzv2n-evk-cn15-emmc.dts := r9a09g056n48-rzv2n-evk.dtb r9a09g056n48-rzv2n-evk-cn15-emmc.dtbo
+dtb-$(CONFIG_ARCH_R9A09G056) += r9a09g056n48-rzv2n-evk-cn15-sd.dtbo
+r9a09g056n48-rzv2n-evk-cn15-sd.dts := r9a09g056n48-rzv2n-evk.dtb r9a09g056n48-rzv2n-evk-cn15-sd.dtbo
 
 dtb-$(CONFIG_ARCH_R9A09G057) += r9a09g057h44-rzv2h-evk.dtb
 dtb-$(CONFIG_ARCH_R9A09G057) += r9a09g057h48-kakip.dtb
diff --git a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk-cn15-emmc.dtso b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk-cn15-emmc.dtso
new file mode 100644
index 000000000000..c943150efcba
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk-cn15-emmc.dtso
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree overlay for the RZ/V2N EVK with the eMMC sub-board
+ * (RTK0EF0186802000BJ) connected to the CN15 connector.
+ *
+ * Copyright (C) 2025 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#define RZV2N_PA		10
+#define EMMC_GPIO(port, pin)	RZG2L_GPIO(RZV2N_P##port, pin)
+
+#include "rzv2-evk-cn15-emmc-common.dtsi"
diff --git a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk-cn15-sd.dtso b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk-cn15-sd.dtso
new file mode 100644
index 000000000000..6268dda138ab
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk-cn15-sd.dtso
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree overlay for the RZ/V2N EVK with the SD sub-board
+ * (RTK0EF0186B01000BJ) connected to the CN15 connector.
+ *
+ * Copyright (C) 2025 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#define RZV2N_PA		10
+#define SD_GPIO(port, pin)	RZG2L_GPIO(RZV2N_P##port, pin)
+#define SD_PORT_PINMUX(b, p, f)	RZG2L_PORT_PINMUX(RZV2N_P##b, p, f)
+
+#include "rzv2-evk-cn15-sd-common.dtsi"
diff --git a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
index b63ee1ff18d5..795d9f6b9651 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
@@ -24,6 +24,7 @@ aliases {
 		i2c6 = &i2c6;
 		i2c7 = &i2c7;
 		i2c8 = &i2c8;
+		mmc0 = &sdhi0;
 		mmc1 = &sdhi1;
 		serial0 = &scif;
 	};
@@ -48,6 +49,15 @@ reg_0p8v: regulator-0p8v {
 		regulator-always-on;
 	};
 
+	reg_1p8v: regulator-1p8v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-1.8V";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
 	reg_3p3v: regulator-3p3v {
 		compatible = "regulator-fixed";
 		regulator-name = "fixed-3.3V";
diff --git a/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc-common.dtsi b/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc-common.dtsi
new file mode 100644
index 000000000000..7ac38f34d0b9
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc-common.dtsi
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Shared DT include for the eMMC Sub Board (RTK0EF0186B02000BJ), which
+ * is connected to the CN15 connector on the RZ/V2H and RZ/V2N EVKs.
+ *
+ * Contains common pinctrl and SDHI0 definitions.
+ *
+ * Copyright (C) 2025 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+&pinctrl {
+	sdhi0_emmc_pins: emmc-pins {
+		sd0-clk {
+			pins = "SD0CLK";
+			renesas,output-impedance = <3>;
+			slew-rate = <0>;
+		};
+
+		sd0-dat-cmd {
+			pins = "SD0DAT0", "SD0DAT1", "SD0DAT2", "SD0DAT3", "SD0DAT4",
+			       "SD0DAT5", "SD0DAT6", "SD0DAT7", "SD0CMD";
+			input-enable;
+			renesas,output-impedance = <3>;
+			slew-rate = <0>;
+		};
+	};
+};
+
+&sdhi0 {
+	pinctrl-0 = <&sdhi0_emmc_pins>;
+	pinctrl-1 = <&sdhi0_emmc_pins>;
+	pinctrl-names = "default", "state_uhs";
+	vmmc-supply = <&reg_3p3v>;
+	vqmmc-supply = <&reg_1p8v>;
+	bus-width = <8>;
+	mmc-hs200-1_8v;
+	non-removable;
+	fixed-emmc-driver-type = <1>;
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd-common.dtsi b/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd-common.dtsi
new file mode 100644
index 000000000000..b402a6eaf61b
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd-common.dtsi
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Shared DT include for the microSD Sub Board (RTK0EF0186B01000BJ), which
+ * is connected to the CN15 connector on the RZ/V2H and RZ/V2N EVKs.
+ *
+ * Contains common pinctrl and SDHI0 definitions.
+ *
+ * Copyright (C) 2025 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+&{/} {
+	vqmmc_sdhi0: regulator-vqmmc-sdhi0 {
+		compatible = "regulator-gpio";
+		regulator-name = "SDHI0 VqmmC";
+		gpios = <&pinctrl SD_GPIO(A, 0) GPIO_ACTIVE_HIGH>;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <3300000>;
+		gpios-states = <0>;
+		states = <3300000 0>, <1800000 1>;
+	};
+};
+
+&pinctrl {
+	sdhi0-pwr-en-hog {
+		gpio-hog;
+		gpios = <SD_GPIO(A, 1) GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "sd0_pwr_en";
+	};
+
+	sdhi0_pins: sd0 {
+		sd0-cd {
+			pinmux = <SD_PORT_PINMUX(A, 5, 15)>; /* SD0_CD */
+		};
+
+		sd0-clk {
+			pins = "SD0CLK";
+			renesas,output-impedance = <3>;
+			slew-rate = <0>;
+		};
+
+		sd0-dat-cmd {
+			pins = "SD0DAT0", "SD0DAT1", "SD0DAT2", "SD0DAT3", "SD0CMD";
+			input-enable;
+			renesas,output-impedance = <3>;
+			slew-rate = <0>;
+		};
+	};
+};
+
+&sdhi0 {
+	pinctrl-0 = <&sdhi0_pins>;
+	pinctrl-1 = <&sdhi0_pins>;
+	pinctrl-names = "default", "state_uhs";
+	vmmc-supply = <&reg_3p3v>;
+	vqmmc-supply = <&vqmmc_sdhi0>;
+	bus-width = <4>;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	status = "okay";
+};
-- 
2.49.0
Re: [PATCH 1/3] arm64: dts: renesas: Add CN15 eMMC and SD overlays for RZ/V2N EVK
Posted by Geert Uytterhoeven 3 months, 2 weeks ago 
Hi Prabhakar,

On Fri, 20 Jun 2025 at 14:10, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Introduce device tree overlays to support the eMMC (RTK0EF0186B02000BJ)
> and microSD (RTK0EF0186B01000BJ) sub-boards via the CN15 connector on the
> RZ/V2N EVK. These overlays enable SDHI0 with appropriate pinctrl settings,
> regulator configurations, and GPIO handling.
>
> Shared DTSI fragments (rzv2-evk-cn15-emmc-common.dtsi and
> rzv2-evk-cn15-sd-common.dtsi) provide reusable configurations for both
> RZ/V2N and RZ/V2H EVKs, as both support the same CN15 sub-boards.
>
> Additionally, the base board DTS is updated to define an `mmc0` alias
> pointing to `&sdhi0`, and to add a fixed 1.8V regulator node (`reg_1p8v`)
> intended for use by the optional eMMC sub-board and, in the future, the
> ADV7535 HDMI encoder (not yet enabled in the DTS).
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Thanks for your patch!

> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk-cn15-emmc.dtso
> @@ -0,0 +1,15 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree overlay for the RZ/V2N EVK with the eMMC sub-board
> + * (RTK0EF0186802000BJ) connected to the CN15 connector.
> + *
> + * Copyright (C) 2025 Renesas Electronics Corp.
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#define RZV2N_PA               10

This is duplicated from r9a09g056.dtsi, but unused?

> +#define EMMC_GPIO(port, pin)   RZG2L_GPIO(RZV2N_P##port, pin)

Unused?

> +
> +#include "rzv2-evk-cn15-emmc-common.dtsi"

Hence you can just have a single rzv2-evk-cn15-emmc.dtso that works
on both RZ/V2H and RZ/V2N.

> diff --git a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk-cn15-sd.dtso b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk-cn15-sd.dtso
> new file mode 100644
> index 000000000000..6268dda138ab
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk-cn15-sd.dtso
> @@ -0,0 +1,16 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree overlay for the RZ/V2N EVK with the SD sub-board
> + * (RTK0EF0186B01000BJ) connected to the CN15 connector.
> + *
> + * Copyright (C) 2025 Renesas Electronics Corp.
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#define RZV2N_PA               10

This is duplicated from r9a09g056.dtsi. Can we avoid that?
If not, I think we found the justification for moving these definitions
to include/dt-bindings/pinctrl/renesas,r9a09g056-pinctrl.h...

> +#define SD_GPIO(port, pin)     RZG2L_GPIO(RZV2N_P##port, pin)
> +#define SD_PORT_PINMUX(b, p, f)        RZG2L_PORT_PINMUX(RZV2N_P##b, p, f)
> +
> +#include "rzv2-evk-cn15-sd-common.dtsi"
> diff --git a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
> index b63ee1ff18d5..795d9f6b9651 100644
> --- a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
> +++ b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
> @@ -24,6 +24,7 @@ aliases {
>                 i2c6 = &i2c6;
>                 i2c7 = &i2c7;
>                 i2c8 = &i2c8;
> +               mmc0 = &sdhi0;

While (out-of-tree) dynamic DT overlays do not support updating aliases
yet, this logically belongs in the overlay, so please move it there.

>                 mmc1 = &sdhi1;
>                 serial0 = &scif;
>         };
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc-common.dtsi
> @@ -0,0 +1,46 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Shared DT include for the eMMC Sub Board (RTK0EF0186B02000BJ), which
> + * is connected to the CN15 connector on the RZ/V2H and RZ/V2N EVKs.
> + *
> + * Contains common pinctrl and SDHI0 definitions.
> + *
> + * Copyright (C) 2025 Renesas Electronics Corp.
> + */
> +
> +/dts-v1/;
> +/plugin/;

These two directives belong in the .dtso files (and you already have
them there).

> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd-common.dtsi
> @@ -0,0 +1,67 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Shared DT include for the microSD Sub Board (RTK0EF0186B01000BJ), which
> + * is connected to the CN15 connector on the RZ/V2H and RZ/V2N EVKs.
> + *
> + * Contains common pinctrl and SDHI0 definitions.
> + *
> + * Copyright (C) 2025 Renesas Electronics Corp.
> + */
> +
> +/dts-v1/;
> +/plugin/;

Likewise.

> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> +
> +&{/} {
> +       vqmmc_sdhi0: regulator-vqmmc-sdhi0 {
> +               compatible = "regulator-gpio";
> +               regulator-name = "SDHI0 VqmmC";
> +               gpios = <&pinctrl SD_GPIO(A, 0) GPIO_ACTIVE_HIGH>;

If you use a macro to abstract the GPIO number, please include the
bank and port number in the abstraction.

Alternatively, as both RZ/V2H and RZ/V2N use PA0, you can use
RZG2L_GPIO(10, 10) directly.  That just leaves us with a desire to
express "A" instead of 10...

Note that you end up with the exact same .dtbo for RZ/V2H and RZ/V2N
again...

> +               regulator-min-microvolt = <1800000>;
> +               regulator-max-microvolt = <3300000>;
> +               gpios-states = <0>;
> +               states = <3300000 0>, <1800000 1>;
> +       };
> +};
> +
> +&pinctrl {
> +       sdhi0-pwr-en-hog {
> +               gpio-hog;
> +               gpios = <SD_GPIO(A, 1) GPIO_ACTIVE_HIGH>;

Likewise.

> +               output-high;
> +               line-name = "sd0_pwr_en";
> +       };
> +
> +       sdhi0_pins: sd0 {
> +               sd0-cd {
> +                       pinmux = <SD_PORT_PINMUX(A, 5, 15)>; /* SD0_CD */

Likewise.

> +               };

The rest LGTM.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Re: [PATCH 1/3] arm64: dts: renesas: Add CN15 eMMC and SD overlays for RZ/V2N EVK
Posted by Lad, Prabhakar 3 months, 1 week ago 
Hi Geert,

Thank you for the review.

On Thu, Jun 26, 2025 at 12:58 PM Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Fri, 20 Jun 2025 at 14:10, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Introduce device tree overlays to support the eMMC (RTK0EF0186B02000BJ)
> > and microSD (RTK0EF0186B01000BJ) sub-boards via the CN15 connector on the
> > RZ/V2N EVK. These overlays enable SDHI0 with appropriate pinctrl settings,
> > regulator configurations, and GPIO handling.
> >
> > Shared DTSI fragments (rzv2-evk-cn15-emmc-common.dtsi and
> > rzv2-evk-cn15-sd-common.dtsi) provide reusable configurations for both
> > RZ/V2N and RZ/V2H EVKs, as both support the same CN15 sub-boards.
> >
> > Additionally, the base board DTS is updated to define an `mmc0` alias
> > pointing to `&sdhi0`, and to add a fixed 1.8V regulator node (`reg_1p8v`)
> > intended for use by the optional eMMC sub-board and, in the future, the
> > ADV7535 HDMI encoder (not yet enabled in the DTS).
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Thanks for your patch!
>
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk-cn15-emmc.dtso
> > @@ -0,0 +1,15 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Device Tree overlay for the RZ/V2N EVK with the eMMC sub-board
> > + * (RTK0EF0186802000BJ) connected to the CN15 connector.
> > + *
> > + * Copyright (C) 2025 Renesas Electronics Corp.
> > + */
> > +
> > +/dts-v1/;
> > +/plugin/;
> > +
> > +#define RZV2N_PA               10
>
> This is duplicated from r9a09g056.dtsi, but unused?
>
Ouch, I'll drop this and the below macro too.

> > +#define EMMC_GPIO(port, pin)   RZG2L_GPIO(RZV2N_P##port, pin)
>
> Unused?
>
> > +
> > +#include "rzv2-evk-cn15-emmc-common.dtsi"
>
> Hence you can just have a single rzv2-evk-cn15-emmc.dtso that works
> on both RZ/V2H and RZ/V2N.
>
Agreed (I will squash patch 3/3 into the same patch).

> > diff --git a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk-cn15-sd.dtso b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk-cn15-sd.dtso
> > new file mode 100644
> > index 000000000000..6268dda138ab
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk-cn15-sd.dtso
> > @@ -0,0 +1,16 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Device Tree overlay for the RZ/V2N EVK with the SD sub-board
> > + * (RTK0EF0186B01000BJ) connected to the CN15 connector.
> > + *
> > + * Copyright (C) 2025 Renesas Electronics Corp.
> > + */
> > +
> > +/dts-v1/;
> > +/plugin/;
> > +
> > +#define RZV2N_PA               10
>
> This is duplicated from r9a09g056.dtsi. Can we avoid that?
> If not, I think we found the justification for moving these definitions
> to include/dt-bindings/pinctrl/renesas,r9a09g056-pinctrl.h...
>
> > +#define SD_GPIO(port, pin)     RZG2L_GPIO(RZV2N_P##port, pin)
> > +#define SD_PORT_PINMUX(b, p, f)        RZG2L_PORT_PINMUX(RZV2N_P##b, p, f)
> > +
> > +#include "rzv2-evk-cn15-sd-common.dtsi"
> > diff --git a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
> > index b63ee1ff18d5..795d9f6b9651 100644
> > --- a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
> > +++ b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
> > @@ -24,6 +24,7 @@ aliases {
> >                 i2c6 = &i2c6;
> >                 i2c7 = &i2c7;
> >                 i2c8 = &i2c8;
> > +               mmc0 = &sdhi0;
>
> While (out-of-tree) dynamic DT overlays do not support updating aliases
> yet, this logically belongs in the overlay, so please move it there.
>
Ok, I'll move it to the overlay as `mmc0 = "/soc/mmc@15c00000";`

> >                 mmc1 = &sdhi1;
> >                 serial0 = &scif;
> >         };
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc-common.dtsi
> > @@ -0,0 +1,46 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Shared DT include for the eMMC Sub Board (RTK0EF0186B02000BJ), which
> > + * is connected to the CN15 connector on the RZ/V2H and RZ/V2N EVKs.
> > + *
> > + * Contains common pinctrl and SDHI0 definitions.
> > + *
> > + * Copyright (C) 2025 Renesas Electronics Corp.
> > + */
> > +
> > +/dts-v1/;
> > +/plugin/;
>
> These two directives belong in the .dtso files (and you already have
> them there).
>
Agreed, I will drop them.

> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd-common.dtsi
> > @@ -0,0 +1,67 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Shared DT include for the microSD Sub Board (RTK0EF0186B01000BJ), which
> > + * is connected to the CN15 connector on the RZ/V2H and RZ/V2N EVKs.
> > + *
> > + * Contains common pinctrl and SDHI0 definitions.
> > + *
> > + * Copyright (C) 2025 Renesas Electronics Corp.
> > + */
> > +
> > +/dts-v1/;
> > +/plugin/;
>
> Likewise.
>
> > +
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> > +
> > +&{/} {
> > +       vqmmc_sdhi0: regulator-vqmmc-sdhi0 {
> > +               compatible = "regulator-gpio";
> > +               regulator-name = "SDHI0 VqmmC";
> > +               gpios = <&pinctrl SD_GPIO(A, 0) GPIO_ACTIVE_HIGH>;
>
> If you use a macro to abstract the GPIO number, please include the
> bank and port number in the abstraction.
>
> Alternatively, as both RZ/V2H and RZ/V2N use PA0, you can use
> RZG2L_GPIO(10, 10) directly.  That just leaves us with a desire to
> express "A" instead of 10...
>
> Note that you end up with the exact same .dtbo for RZ/V2H and RZ/V2N
> again...
>
Good point, I will switch to RZG2L_GPIO(10, x).

Cheers,
Prabhakar

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