R-Car S4-8 datasheet Rev.1.20 describes some additional register
settings at the end of the initialization.
Signed-off-by: Michael Dege <michael.dege@renesas.com>
---
drivers/phy/renesas/r8a779f0-ether-serdes.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/drivers/phy/renesas/r8a779f0-ether-serdes.c b/drivers/phy/renesas/r8a779f0-ether-serdes.c
index ed83c46f6d00c255852cc5af867c89ab0d0db02a..85a19233f6105e7a309832edee3e6b919eb27eb2 100644
--- a/drivers/phy/renesas/r8a779f0-ether-serdes.c
+++ b/drivers/phy/renesas/r8a779f0-ether-serdes.c
@@ -49,6 +49,13 @@ static void r8a779f0_eth_serdes_write32(void __iomem *addr, u32 offs, u32 bank,
iowrite32(data, addr + offs);
}
+static u32 r8a779f0_eth_serdes_read32(void __iomem *addr, u32 offs, u32 bank)
+{
+ iowrite32(bank, addr + RENESAS_ETH_SERDES_BANK_SELECT);
+
+ return ioread32(addr + offs);
+}
+
static int
r8a779f0_eth_serdes_reg_wait(struct r8a779f0_eth_serdes_channel *channel,
u32 offs, u32 bank, u32 mask, u32 expected)
@@ -319,6 +326,7 @@ static int r8a779f0_eth_serdes_hw_init_late(struct r8a779f0_eth_serdes_channel
*channel)
{
int ret;
+ u32 val;
ret = r8a779f0_eth_serdes_chan_setting(channel);
if (ret)
@@ -332,6 +340,26 @@ static int r8a779f0_eth_serdes_hw_init_late(struct r8a779f0_eth_serdes_channel
r8a779f0_eth_serdes_write32(channel->addr, 0x03d0, 0x380, 0x0000);
+ val = r8a779f0_eth_serdes_read32(channel->addr, 0x00c0, 0x180);
+ r8a779f0_eth_serdes_write32(channel->addr, 0x00c0, 0x180, val | BIT(8));
+ ret = r8a779f0_eth_serdes_reg_wait(channel, 0x0100, 0x180, BIT(0), 1);
+ if (ret)
+ return ret;
+ r8a779f0_eth_serdes_write32(channel->addr, 0x00c0, 0x180, val & ~BIT(8));
+ ret = r8a779f0_eth_serdes_reg_wait(channel, 0x0100, 0x180, BIT(0), 0);
+ if (ret)
+ return ret;
+
+ val = r8a779f0_eth_serdes_read32(channel->addr, 0x0144, 0x180);
+ r8a779f0_eth_serdes_write32(channel->addr, 0x0144, 0x180, val | BIT(4));
+ ret = r8a779f0_eth_serdes_reg_wait(channel, 0x0180, 0x180, BIT(0), 1);
+ if (ret)
+ return ret;
+ r8a779f0_eth_serdes_write32(channel->addr, 0x0144, 0x180, val & ~BIT(4));
+ ret = r8a779f0_eth_serdes_reg_wait(channel, 0x0180, 0x180, BIT(0), 0);
+ if (ret)
+ return ret;
+
return r8a779f0_eth_serdes_monitor_linkup(channel);
}
--
2.25.1
Hi Michael,
kernel test robot noticed the following build errors:
[auto build test ERROR on a5806cd506af5a7c19bcd596e4708b5c464bfd21]
url: https://github.com/intel-lab-lkp/linux/commits/Michael-Dege/phy-renesas-r8a779f0-ether-serdes-add-USXGMII-mode/20250527-150048
base: a5806cd506af5a7c19bcd596e4708b5c464bfd21
patch link: https://lore.kernel.org/r/20250527-renesas-serdes-update-v2-2-ef17c71cd94c%40renesas.com
patch subject: [PATCH v2 2/2] phy: renesas: r8a779f0-ether-serdes: add new step added to latest datasheet
config: arc-randconfig-001-20250527 (https://download.01.org/0day-ci/archive/20250527/202505271711.WM48TTTI-lkp@intel.com/config)
compiler: arc-linux-gcc (GCC) 10.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250527/202505271711.WM48TTTI-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202505271711.WM48TTTI-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/phy/renesas/r8a779f0-ether-serdes.c: In function 'r8a779f0_eth_serdes_read32':
>> drivers/phy/renesas/r8a779f0-ether-serdes.c:54:25: error: 'RENESAS_ETH_SERDES_BANK_SELECT' undeclared (first use in this function); did you mean 'R8A779F0_ETH_SERDES_BANK_SELECT'?
54 | iowrite32(bank, addr + RENESAS_ETH_SERDES_BANK_SELECT);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| R8A779F0_ETH_SERDES_BANK_SELECT
drivers/phy/renesas/r8a779f0-ether-serdes.c:54:25: note: each undeclared identifier is reported only once for each function it appears in
vim +54 drivers/phy/renesas/r8a779f0-ether-serdes.c
51
52 static u32 r8a779f0_eth_serdes_read32(void __iomem *addr, u32 offs, u32 bank)
53 {
> 54 iowrite32(bank, addr + RENESAS_ETH_SERDES_BANK_SELECT);
55
56 return ioread32(addr + offs);
57 }
58
--
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