From nobody Tue Dec 16 14:24:38 2025 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 85D1E1BD9C9 for ; Tue, 27 May 2025 06:53:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748328829; cv=none; b=dIJZozNzruOu5ber7n7hZHUJLIlFehedOLkKqRAJ6cGgXgnupnsckSdL0GFQLU/57EqUVv6q7zxsDZh30+2O6muak94QFW7qN7+HtTD8Rs1Ft/wHU+hZNUfViGhsL6PiunQNlbCIeMmCXQBosc+V8jKID2sDOpMsB2nvWo9dnu8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748328829; c=relaxed/simple; bh=tAPW5GL4WCf7RRbNcrJY/xuqctJEyDy1i8hbb0T3f/k=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KqeznQ+fGM0Mo7STa5cIA7LQhAxgpE2yilQ7tUT/JyrS09TDllwAEQFrqfSuNqFpAqcgsmB/br4xk0MHvXbADXEZKDZ5zgEd0WSA2YJrzaSo9UGfjUJ+BrL025SlsUrCR4P2LuQc1l+Dwz0LJFSNxeVtr/UEauxBlcOxgNJGh2Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: Sli80In3SMSdrBeqovBSIA== X-CSE-MsgGUID: /g3JsaQcQs+KfsMAS7aXRg== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 27 May 2025 15:53:40 +0900 Received: from [127.0.1.1] (unknown [10.226.78.19]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 02D2A4000FA5; Tue, 27 May 2025 15:53:37 +0900 (JST) From: Michael Dege Date: Tue, 27 May 2025 08:53:07 +0200 Subject: [PATCH v2 2/2] phy: renesas: r8a779f0-ether-serdes: add new step added to latest datasheet Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250527-renesas-serdes-update-v2-2-ef17c71cd94c@renesas.com> References: <20250527-renesas-serdes-update-v2-0-ef17c71cd94c@renesas.com> In-Reply-To: <20250527-renesas-serdes-update-v2-0-ef17c71cd94c@renesas.com> To: Vinod Koul , Kishon Vijay Abraham I , Yoshihiro Shimoda Cc: Michael Dege , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1748328812; l=2378; i=michael.dege@renesas.com; s=20250523; h=from:subject:message-id; bh=tAPW5GL4WCf7RRbNcrJY/xuqctJEyDy1i8hbb0T3f/k=; b=QCGsMKchM+9SNgqcw1BxhpVBF0jzVN4/bilfVt6VylRjq2kz25hq8mmbPu9Q33o7jQbApI+1O cQOHMxDt7wmDpatjSl2nOeATJwZEpK7PO8/bY+9QVv2DmWsM7mwOhur X-Developer-Key: i=michael.dege@renesas.com; a=ed25519; pk=+gYTlVQ3/MlOju88OuKnXA7MlapP4lYqJn1F81HZGSo= R-Car S4-8 datasheet Rev.1.20 describes some additional register settings at the end of the initialization. Signed-off-by: Michael Dege --- drivers/phy/renesas/r8a779f0-ether-serdes.c | 28 +++++++++++++++++++++++++= +++ 1 file changed, 28 insertions(+) diff --git a/drivers/phy/renesas/r8a779f0-ether-serdes.c b/drivers/phy/rene= sas/r8a779f0-ether-serdes.c index ed83c46f6d00c255852cc5af867c89ab0d0db02a..85a19233f6105e7a309832edee3= e6b919eb27eb2 100644 --- a/drivers/phy/renesas/r8a779f0-ether-serdes.c +++ b/drivers/phy/renesas/r8a779f0-ether-serdes.c @@ -49,6 +49,13 @@ static void r8a779f0_eth_serdes_write32(void __iomem *ad= dr, u32 offs, u32 bank, iowrite32(data, addr + offs); } =20 +static u32 r8a779f0_eth_serdes_read32(void __iomem *addr, u32 offs, u32 b= ank) +{ + iowrite32(bank, addr + RENESAS_ETH_SERDES_BANK_SELECT); + + return ioread32(addr + offs); +} + static int r8a779f0_eth_serdes_reg_wait(struct r8a779f0_eth_serdes_channel *channel, u32 offs, u32 bank, u32 mask, u32 expected) @@ -319,6 +326,7 @@ static int r8a779f0_eth_serdes_hw_init_late(struct r8a7= 79f0_eth_serdes_channel *channel) { int ret; + u32 val; =20 ret =3D r8a779f0_eth_serdes_chan_setting(channel); if (ret) @@ -332,6 +340,26 @@ static int r8a779f0_eth_serdes_hw_init_late(struct r8a= 779f0_eth_serdes_channel =20 r8a779f0_eth_serdes_write32(channel->addr, 0x03d0, 0x380, 0x0000); =20 + val =3D r8a779f0_eth_serdes_read32(channel->addr, 0x00c0, 0x180); + r8a779f0_eth_serdes_write32(channel->addr, 0x00c0, 0x180, val | BIT(8)); + ret =3D r8a779f0_eth_serdes_reg_wait(channel, 0x0100, 0x180, BIT(0), 1); + if (ret) + return ret; + r8a779f0_eth_serdes_write32(channel->addr, 0x00c0, 0x180, val & ~BIT(8)); + ret =3D r8a779f0_eth_serdes_reg_wait(channel, 0x0100, 0x180, BIT(0), 0); + if (ret) + return ret; + + val =3D r8a779f0_eth_serdes_read32(channel->addr, 0x0144, 0x180); + r8a779f0_eth_serdes_write32(channel->addr, 0x0144, 0x180, val | BIT(4)); + ret =3D r8a779f0_eth_serdes_reg_wait(channel, 0x0180, 0x180, BIT(0), 1); + if (ret) + return ret; + r8a779f0_eth_serdes_write32(channel->addr, 0x0144, 0x180, val & ~BIT(4)); + ret =3D r8a779f0_eth_serdes_reg_wait(channel, 0x0180, 0x180, BIT(0), 0); + if (ret) + return ret; + return r8a779f0_eth_serdes_monitor_linkup(channel); } =20 --=20 2.25.1