The current EPP, ISP and MPE schemas are largely compatible with Tegra114+,
requiring only minor adjustments. Additionally, the TSEC schema for the
Security engine, which is available from Tegra114 onwards, is included.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
.../display/tegra/nvidia,tegra114-tsec.yaml | 79 +++++++++++++++++++
.../display/tegra/nvidia,tegra20-epp.yaml | 14 +++-
.../display/tegra/nvidia,tegra20-isp.yaml | 15 +++-
.../display/tegra/nvidia,tegra20-mpe.yaml | 18 +++--
4 files changed, 113 insertions(+), 13 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
new file mode 100644
index 000000000000..ed0a5a8a091b
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra114-tsec.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA Tegra Security co-processor
+
+maintainers:
+ - Svyatoslav Ryhel <clamor95@gmail.com>
+ - Thierry Reding <thierry.reding@gmail.com>
+
+description: Tegra Security co-processor, an embedded security processor used
+ mainly to manage the HDCP encryption and keys on the HDMI link.
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - nvidia,tegra114-tsec
+ - nvidia,tegra124-tsec
+ - nvidia,tegra210-tsec
+
+ - items:
+ - const: nvidia,tegra132-tsec
+ - const: nvidia,tegra124-tsec
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: tsec
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ items:
+ - const: tsec
+
+ iommus:
+ maxItems: 1
+
+ operating-points-v2: true
+
+ power-domains:
+ items:
+ - description: phandle to the core power domain
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - resets
+ - reset-names
+
+examples:
+ - |
+ #include <dt-bindings/clock/tegra114-car.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ tsec@54500000 {
+ compatible = "nvidia,tegra114-tsec";
+ reg = <0x54500000 0x00040000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA114_CLK_TSEC>;
+ resets = <&tegra_car TEGRA114_CLK_TSEC>;
+ reset-names = "tsec";
+ };
diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml
index 3c095a5491fe..334f5531b243 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml
@@ -15,10 +15,16 @@ properties:
pattern: "^epp@[0-9a-f]+$"
compatible:
- enum:
- - nvidia,tegra20-epp
- - nvidia,tegra30-epp
- - nvidia,tegra114-epp
+ oneOf:
+ - enum:
+ - nvidia,tegra20-epp
+ - nvidia,tegra30-epp
+ - nvidia,tegra114-epp
+ - nvidia,tegra124-epp
+
+ - items:
+ - const: nvidia,tegra132-epp
+ - const: nvidia,tegra124-epp
reg:
maxItems: 1
diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-isp.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-isp.yaml
index 3bc3b22e98e1..ee25b5e6f1a2 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-isp.yaml
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-isp.yaml
@@ -12,10 +12,17 @@ maintainers:
properties:
compatible:
- enum:
- - nvidia,tegra20-isp
- - nvidia,tegra30-isp
- - nvidia,tegra210-isp
+ oneOf:
+ - enum:
+ - nvidia,tegra20-isp
+ - nvidia,tegra30-isp
+ - nvidia,tegra114-isp
+ - nvidia,tegra124-isp
+ - nvidia,tegra210-isp
+
+ - items:
+ - const: nvidia,tegra132-isp
+ - const: nvidia,tegra124-isp
reg:
maxItems: 1
diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml
index 2cd3e60cd0a8..36b76fa8f525 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml
@@ -12,13 +12,21 @@ maintainers:
properties:
$nodename:
- pattern: "^mpe@[0-9a-f]+$"
+ oneOf:
+ - pattern: "^mpe@[0-9a-f]+$"
+ - pattern: "^msenc@[0-9a-f]+$"
compatible:
- enum:
- - nvidia,tegra20-mpe
- - nvidia,tegra30-mpe
- - nvidia,tegra114-mpe
+ oneOf:
+ - enum:
+ - nvidia,tegra20-mpe
+ - nvidia,tegra30-mpe
+ - nvidia,tegra114-msenc
+ - nvidia,tegra124-msenc
+
+ - items:
+ - const: nvidia,tegra132-msenc
+ - const: nvidia,tegra124-msenc
reg:
maxItems: 1
--
2.48.1On Sun, May 04, 2025 at 12:23:22PM +0300, Svyatoslav Ryhel wrote:
> The current EPP, ISP and MPE schemas are largely compatible with Tegra114+,
> requiring only minor adjustments. Additionally, the TSEC schema for the
> Security engine, which is available from Tegra114 onwards, is included.
>
> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> ---
> .../display/tegra/nvidia,tegra114-tsec.yaml | 79 +++++++++++++++++++
> .../display/tegra/nvidia,tegra20-epp.yaml | 14 +++-
> .../display/tegra/nvidia,tegra20-isp.yaml | 15 +++-
> .../display/tegra/nvidia,tegra20-mpe.yaml | 18 +++--
> 4 files changed, 113 insertions(+), 13 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
> new file mode 100644
> index 000000000000..ed0a5a8a091b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
> @@ -0,0 +1,79 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra114-tsec.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NVIDIA Tegra Security co-processor
> +
> +maintainers:
> + - Svyatoslav Ryhel <clamor95@gmail.com>
> + - Thierry Reding <thierry.reding@gmail.com>
> +
> +description: Tegra Security co-processor, an embedded security processor used
> + mainly to manage the HDCP encryption and keys on the HDMI link.
> +
> +properties:
> + compatible:
> + oneOf:
> + - enum:
> + - nvidia,tegra114-tsec
> + - nvidia,tegra124-tsec
> + - nvidia,tegra210-tsec
> +
> + - items:
> + - const: nvidia,tegra132-tsec
> + - const: nvidia,tegra124-tsec
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + items:
> + - const: tsec
Drop -names properties if there is only 1.
> +
> + resets:
> + maxItems: 1
> +
> + reset-names:
> + items:
> + - const: tsec
> +
> + iommus:
> + maxItems: 1
> +
> + operating-points-v2: true
> +
> + power-domains:
> + items:
> + - description: phandle to the core power domain
Instead, just 'maxItems: 1'.
> +
> +additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - resets
> + - reset-names
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/tegra114-car.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + tsec@54500000 {
> + compatible = "nvidia,tegra114-tsec";
> + reg = <0x54500000 0x00040000>;
> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&tegra_car TEGRA114_CLK_TSEC>;
> + resets = <&tegra_car TEGRA114_CLK_TSEC>;
> + reset-names = "tsec";
> + };
пн, 12 трав. 2025 р. о 19:24 Rob Herring <robh@kernel.org> пише:
>
> On Sun, May 04, 2025 at 12:23:22PM +0300, Svyatoslav Ryhel wrote:
> > The current EPP, ISP and MPE schemas are largely compatible with Tegra114+,
> > requiring only minor adjustments. Additionally, the TSEC schema for the
> > Security engine, which is available from Tegra114 onwards, is included.
> >
> > Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> > ---
> > .../display/tegra/nvidia,tegra114-tsec.yaml | 79 +++++++++++++++++++
> > .../display/tegra/nvidia,tegra20-epp.yaml | 14 +++-
> > .../display/tegra/nvidia,tegra20-isp.yaml | 15 +++-
> > .../display/tegra/nvidia,tegra20-mpe.yaml | 18 +++--
> > 4 files changed, 113 insertions(+), 13 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
> > new file mode 100644
> > index 000000000000..ed0a5a8a091b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
> > @@ -0,0 +1,79 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra114-tsec.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: NVIDIA Tegra Security co-processor
> > +
> > +maintainers:
> > + - Svyatoslav Ryhel <clamor95@gmail.com>
> > + - Thierry Reding <thierry.reding@gmail.com>
> > +
> > +description: Tegra Security co-processor, an embedded security processor used
> > + mainly to manage the HDCP encryption and keys on the HDMI link.
> > +
> > +properties:
> > + compatible:
> > + oneOf:
> > + - enum:
> > + - nvidia,tegra114-tsec
> > + - nvidia,tegra124-tsec
> > + - nvidia,tegra210-tsec
> > +
> > + - items:
> > + - const: nvidia,tegra132-tsec
> > + - const: nvidia,tegra124-tsec
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + clocks:
> > + maxItems: 1
> > +
> > + clock-names:
> > + items:
> > + - const: tsec
>
> Drop -names properties if there is only 1.
This is added to cover existing binding in tegra210 tree
> > +
> > + resets:
> > + maxItems: 1
> > +
> > + reset-names:
> > + items:
> > + - const: tsec
> > +
> > + iommus:
> > + maxItems: 1
> > +
> > + operating-points-v2: true
> > +
> > + power-domains:
> > + items:
> > + - description: phandle to the core power domain
>
> Instead, just 'maxItems: 1'.
>
> > +
> > +additionalProperties: false
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupts
> > + - clocks
> > + - resets
> > + - reset-names
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/tegra114-car.h>
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > + tsec@54500000 {
> > + compatible = "nvidia,tegra114-tsec";
> > + reg = <0x54500000 0x00040000>;
> > + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&tegra_car TEGRA114_CLK_TSEC>;
> > + resets = <&tegra_car TEGRA114_CLK_TSEC>;
> > + reset-names = "tsec";
> > + };
On 11/08/2025 10:01, Svyatoslav Ryhel wrote: >>> + >>> + reg: >>> + maxItems: 1 >>> + >>> + interrupts: >>> + maxItems: 1 >>> + >>> + clocks: >>> + maxItems: 1 >>> + >>> + clock-names: >>> + items: >>> + - const: tsec >> >> Drop -names properties if there is only 1. > > This is added to cover existing binding in tegra210 tree Existing binding? In what tree? This is mainline, we work only on mainline and that's a new binding, so you cannot use argument that there is broken code using it. Otherwise what stops anyone to push broken code and then claim binding has to look because "existing code has something like that"? Best regards, Krzysztof
пн, 11 серп. 2025 р. о 11:11 Krzysztof Kozlowski <krzk@kernel.org> пише: > > On 11/08/2025 10:01, Svyatoslav Ryhel wrote: > >>> + > >>> + reg: > >>> + maxItems: 1 > >>> + > >>> + interrupts: > >>> + maxItems: 1 > >>> + > >>> + clocks: > >>> + maxItems: 1 > >>> + > >>> + clock-names: > >>> + items: > >>> + - const: tsec > >> > >> Drop -names properties if there is only 1. > > > > This is added to cover existing binding in tegra210 tree > > Existing binding? In what tree? This is mainline, we work only on > mainline and that's a new binding, so you cannot use argument that there > is broken code using it. Otherwise what stops anyone to push broken code > and then claim binding has to look because "existing code has something > like that"? > It seems that your words and action do not add up https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm64/boot/dts/nvidia/tegra210.dtsi?h=v6.17-rc1#n181 > > Best regards, > Krzysztof
On 11/08/2025 10:15, Svyatoslav Ryhel wrote: > пн, 11 серп. 2025 р. о 11:11 Krzysztof Kozlowski <krzk@kernel.org> пише: >> >> On 11/08/2025 10:01, Svyatoslav Ryhel wrote: >>>>> + >>>>> + reg: >>>>> + maxItems: 1 >>>>> + >>>>> + interrupts: >>>>> + maxItems: 1 >>>>> + >>>>> + clocks: >>>>> + maxItems: 1 >>>>> + >>>>> + clock-names: >>>>> + items: >>>>> + - const: tsec >>>> >>>> Drop -names properties if there is only 1. >>> >>> This is added to cover existing binding in tegra210 tree >> >> Existing binding? In what tree? This is mainline, we work only on >> mainline and that's a new binding, so you cannot use argument that there >> is broken code using it. Otherwise what stops anyone to push broken code >> and then claim binding has to look because "existing code has something >> like that"? >> > > It seems that your words and action do not add up > > https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm64/boot/dts/nvidia/tegra210.dtsi?h=v6.17-rc1#n181 You said binding, now you point DTS... Anyway, what action does not add up? Which part - you cannot use argument of existing code as rule for new bindings - is not clear? I am really fed up with your tone, so I won't be continuing here. I have you longer explanation but it's just waste of my time. Best regards, Krzysztof
© 2016 - 2026 Red Hat, Inc.