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[PATCH] irqchip/qcom-mpm: Fix crash when trying to handle non-wake GPIOs

Stephan Gerhold posted 1 patch 9 months, 1 week ago 
drivers/irqchip/irq-qcom-mpm.c | 3 +++
1 file changed, 3 insertions(+)
[PATCH] irqchip/qcom-mpm: Fix crash when trying to handle non-wake GPIOs
Posted by Stephan Gerhold 9 months, 1 week ago 
On Qualcomm chipsets not all GPIOs are wakeup capable. Those GPIOs do not
have a corresponding MPM pin and should not be handled inside the MPM
driver. The IRQ domain hierarchy is always applied, so we need to
explicitly disconnect the hierarchy for those. The pinctrl-msm driver marks
these with GPIO_NO_WAKE_IRQ. qcom-pdc has a check for this, but
irq-qcom-mpm is currently missing the check. This is causing crashes when
setting up interrupts for non-wake GPIOs, e.g.

 root@rb1:~# gpiomon -c gpiochip1 10
   irq: IRQ159: trimming hierarchy from :soc@0:interrupt-controller@f200000-1
   Unable to handle kernel paging request at virtual address ffff8000a1dc3820
   Hardware name: Qualcomm Technologies, Inc. Robotics RB1 (DT)
   pc : mpm_set_type+0x80/0xcc
   lr : mpm_set_type+0x5c/0xcc
   Call trace:
    mpm_set_type+0x80/0xcc (P)
    qcom_mpm_set_type+0x64/0x158
    irq_chip_set_type_parent+0x20/0x38
    msm_gpio_irq_set_type+0x50/0x530
    __irq_set_trigger+0x60/0x184
    __setup_irq+0x304/0x6bc
    request_threaded_irq+0xc8/0x19c
    edge_detector_setup+0x260/0x364
    linereq_create+0x420/0x5a8
    gpio_ioctl+0x2d4/0x6c0

Fix this by copying the check for GPIO_NO_WAKE_IRQ from qcom-pdc.c, so that
MPM is removed entirely from the hierarchy for non-wake GPIOs.

Cc: stable@vger.kernel.org
Reported-by: Alexey Klimov <alexey.klimov@linaro.org>
Tested-by: Alexey Klimov <alexey.klimov@linaro.org>
Fixes: a6199bb514d8 ("irqchip: Add Qualcomm MPM controller driver")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
---
 drivers/irqchip/irq-qcom-mpm.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/irqchip/irq-qcom-mpm.c b/drivers/irqchip/irq-qcom-mpm.c
index 7942d8eb3d00eae5fa7e5718a05ef889bb8a82f0..f772deb9cba574b9f70649e1646f16a993eba58a 100644
--- a/drivers/irqchip/irq-qcom-mpm.c
+++ b/drivers/irqchip/irq-qcom-mpm.c
@@ -227,6 +227,9 @@ static int qcom_mpm_alloc(struct irq_domain *domain, unsigned int virq,
 	if (ret)
 		return ret;
 
+	if (pin == GPIO_NO_WAKE_IRQ)
+		return irq_domain_disconnect_hierarchy(domain, virq);
+
 	ret = irq_domain_set_hwirq_and_chip(domain, virq, pin,
 					    &qcom_mpm_chip, priv);
 	if (ret)

---
base-commit: e6a3fc4f10b872d02e25f83227e725c79b25d893
change-id: 20250502-irq-qcom-mpm-fix-no-wake-d893e19923d0

Best regards,
-- 
Stephan Gerhold <stephan.gerhold@linaro.org>
Re: [PATCH] irqchip/qcom-mpm: Fix crash when trying to handle non-wake GPIOs
Posted by Bartosz Golaszewski 9 months, 1 week ago 
On Fri, May 2, 2025 at 1:22 PM Stephan Gerhold
<stephan.gerhold@linaro.org> wrote:
>
> On Qualcomm chipsets not all GPIOs are wakeup capable. Those GPIOs do not
> have a corresponding MPM pin and should not be handled inside the MPM
> driver. The IRQ domain hierarchy is always applied, so we need to
> explicitly disconnect the hierarchy for those. The pinctrl-msm driver marks
> these with GPIO_NO_WAKE_IRQ. qcom-pdc has a check for this, but
> irq-qcom-mpm is currently missing the check. This is causing crashes when
> setting up interrupts for non-wake GPIOs, e.g.
>
>  root@rb1:~# gpiomon -c gpiochip1 10
>    irq: IRQ159: trimming hierarchy from :soc@0:interrupt-controller@f200000-1
>    Unable to handle kernel paging request at virtual address ffff8000a1dc3820
>    Hardware name: Qualcomm Technologies, Inc. Robotics RB1 (DT)
>    pc : mpm_set_type+0x80/0xcc
>    lr : mpm_set_type+0x5c/0xcc
>    Call trace:
>     mpm_set_type+0x80/0xcc (P)
>     qcom_mpm_set_type+0x64/0x158
>     irq_chip_set_type_parent+0x20/0x38
>     msm_gpio_irq_set_type+0x50/0x530
>     __irq_set_trigger+0x60/0x184
>     __setup_irq+0x304/0x6bc
>     request_threaded_irq+0xc8/0x19c
>     edge_detector_setup+0x260/0x364
>     linereq_create+0x420/0x5a8
>     gpio_ioctl+0x2d4/0x6c0
>
> Fix this by copying the check for GPIO_NO_WAKE_IRQ from qcom-pdc.c, so that
> MPM is removed entirely from the hierarchy for non-wake GPIOs.
>
> Cc: stable@vger.kernel.org
> Reported-by: Alexey Klimov <alexey.klimov@linaro.org>
> Tested-by: Alexey Klimov <alexey.klimov@linaro.org>
> Fixes: a6199bb514d8 ("irqchip: Add Qualcomm MPM controller driver")
> Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
> ---

Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
[tip: irq/urgent] irqchip/qcom-mpm: Prevent crash when trying to handle non-wake GPIOs
Posted by tip-bot2 for Stephan Gerhold 9 months, 1 week ago 
The following commit has been merged into the irq/urgent branch of tip:

Commit-ID:     38a05c0b87833f5b188ae43b428b1f792df2b384
Gitweb:        https://git.kernel.org/tip/38a05c0b87833f5b188ae43b428b1f792df2b384
Author:        Stephan Gerhold <stephan.gerhold@linaro.org>
AuthorDate:    Fri, 02 May 2025 13:22:28 +02:00
Committer:     Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Fri, 02 May 2025 21:07:02 +02:00

irqchip/qcom-mpm: Prevent crash when trying to handle non-wake GPIOs

On Qualcomm chipsets not all GPIOs are wakeup capable. Those GPIOs do not
have a corresponding MPM pin and should not be handled inside the MPM
driver. The IRQ domain hierarchy is always applied, so it's required to
explicitly disconnect the hierarchy for those. The pinctrl-msm driver marks
these with GPIO_NO_WAKE_IRQ. qcom-pdc has a check for this, but
irq-qcom-mpm is currently missing the check. This is causing crashes when
setting up interrupts for non-wake GPIOs:

 root@rb1:~# gpiomon -c gpiochip1 10
   irq: IRQ159: trimming hierarchy from :soc@0:interrupt-controller@f200000-1
   Unable to handle kernel paging request at virtual address ffff8000a1dc3820
   Hardware name: Qualcomm Technologies, Inc. Robotics RB1 (DT)
   pc : mpm_set_type+0x80/0xcc
   lr : mpm_set_type+0x5c/0xcc
   Call trace:
    mpm_set_type+0x80/0xcc (P)
    qcom_mpm_set_type+0x64/0x158
    irq_chip_set_type_parent+0x20/0x38
    msm_gpio_irq_set_type+0x50/0x530
    __irq_set_trigger+0x60/0x184
    __setup_irq+0x304/0x6bc
    request_threaded_irq+0xc8/0x19c
    edge_detector_setup+0x260/0x364
    linereq_create+0x420/0x5a8
    gpio_ioctl+0x2d4/0x6c0

Fix this by copying the check for GPIO_NO_WAKE_IRQ from qcom-pdc.c, so that
MPM is removed entirely from the hierarchy for non-wake GPIOs.

Fixes: a6199bb514d8 ("irqchip: Add Qualcomm MPM controller driver")
Reported-by: Alexey Klimov <alexey.klimov@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Alexey Klimov <alexey.klimov@linaro.org>
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/all/20250502-irq-qcom-mpm-fix-no-wake-v1-1-8a1eafcd28d4@linaro.org
---
 drivers/irqchip/irq-qcom-mpm.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/irqchip/irq-qcom-mpm.c b/drivers/irqchip/irq-qcom-mpm.c
index 7942d8e..f772deb 100644
--- a/drivers/irqchip/irq-qcom-mpm.c
+++ b/drivers/irqchip/irq-qcom-mpm.c
@@ -227,6 +227,9 @@ static int qcom_mpm_alloc(struct irq_domain *domain, unsigned int virq,
 	if (ret)
 		return ret;
 
+	if (pin == GPIO_NO_WAKE_IRQ)
+		return irq_domain_disconnect_hierarchy(domain, virq);
+
 	ret = irq_domain_set_hwirq_and_chip(domain, virq, pin,
 					    &qcom_mpm_chip, priv);
 	if (ret)

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