There are many places we agreed to move the wake and perst gpio's
and phy etc to the pcie root port node instead of bridge node[1].
So move the phy, phy-names, wake-gpio's in the root port.
There is already reset-gpio defined for PERST# in pci-bus-common.yaml,
start using that property instead of perst-gpio.
[1] https://lore.kernel.org/linux-pci/20241211192014.GA3302752@bhelgaas/
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 5 ++++-
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 5 ++++-
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 5 ++++-
arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 ++----
4 files changed, 14 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
index 7a36c90ad4ec8b52f30b22b1621404857d6ef336..3dd58986ad5da0f898537a51715bb5d0fecbe100 100644
--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
@@ -709,8 +709,11 @@ &mdss_edp_phy {
status = "okay";
};
+&pcie1_port0 {
+ reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
+};
+
&pcie1 {
- perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>;
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
index 2ba4ea60cb14736c9cfbf9f4a9048f20a4c921f2..ff11d85d015bdab6a90bd8a0eb9113a339866953 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
@@ -472,10 +472,13 @@ &pcie1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie1_clkreq_n>, <&ssd_rst_l>, <&pe_wake_odl>;
- perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
vddpe-3v3-supply = <&pp3300_ssd>;
};
+&pcie1_port0 {
+ reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
+};
+
&pm8350c_pwm {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index 7370aa0dbf0e3f9e7a3e38c3f00686e1d3dcbc9f..3209bb15dfec36299cabae07d34f3dc82db6de77 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -414,9 +414,12 @@ &lpass_va_macro {
vdd-micb-supply = <&vreg_bob>;
};
+&pcie1_port0 {
+ reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
+};
+
&pcie1 {
status = "okay";
- perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
vddpe-3v3-supply = <&nvme_3v3_regulator>;
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 0f2caf36910b65c398c9e03800a8ce0a8a1f8fc7..376fabf3b4eac34d75bb79ef902c9d83490c45f7 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2271,9 +2271,6 @@ pcie1: pcie@1c08000 {
power-domains = <&gcc GCC_PCIE_1_GDSC>;
- phys = <&pcie1_phy>;
- phy-names = "pciephy";
-
pinctrl-names = "default";
pinctrl-0 = <&pcie1_clkreq_n>;
@@ -2284,7 +2281,7 @@ pcie1: pcie@1c08000 {
status = "disabled";
- pcie@0 {
+ pcie1_port0: pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
@@ -2292,6 +2289,7 @@ pcie@0 {
#address-cells = <3>;
#size-cells = <2>;
ranges;
+ phys = <&pcie1_phy>;
};
};
--
2.34.1On Sat, Apr 19, 2025 at 10:49:26AM +0530, Krishna Chaitanya Chundru wrote:
> There are many places we agreed to move the wake and perst gpio's
> and phy etc to the pcie root port node instead of bridge node[1].
Same comment as binding patch applies here.
>
> So move the phy, phy-names, wake-gpio's in the root port.
You are not moving any 'wake-gpios' property.
> There is already reset-gpio defined for PERST# in pci-bus-common.yaml,
> start using that property instead of perst-gpio.
>
> [1] https://lore.kernel.org/linux-pci/20241211192014.GA3302752@bhelgaas/
>
> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 5 ++++-
> arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 5 ++++-
> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 5 ++++-
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 ++----
> 4 files changed, 14 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> index 7a36c90ad4ec8b52f30b22b1621404857d6ef336..3dd58986ad5da0f898537a51715bb5d0fecbe100 100644
> --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> @@ -709,8 +709,11 @@ &mdss_edp_phy {
> status = "okay";
> };
>
> +&pcie1_port0 {
> + reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
> +};
> +
> &pcie1 {
> - perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
>
> pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>;
> pinctrl-names = "default";
What about the pinctrl properties? They should also be moved.
- Mani
--
மணிவண்ணன் சதாசிவம்
On 6/1/2025 12:35 PM, Manivannan Sadhasivam wrote:
> On Sat, Apr 19, 2025 at 10:49:26AM +0530, Krishna Chaitanya Chundru wrote:
>> There are many places we agreed to move the wake and perst gpio's
>> and phy etc to the pcie root port node instead of bridge node[1].
>
> Same comment as binding patch applies here.
>
>>
>> So move the phy, phy-names, wake-gpio's in the root port.
>
> You are not moving any 'wake-gpios' property.
>
ack I will remove it.
>> There is already reset-gpio defined for PERST# in pci-bus-common.yaml,
>> start using that property instead of perst-gpio.
>>
>> [1] https://lore.kernel.org/linux-pci/20241211192014.GA3302752@bhelgaas/
>>
>> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
>> ---
>> arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 5 ++++-
>> arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 5 ++++-
>> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 5 ++++-
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 ++----
>> 4 files changed, 14 insertions(+), 7 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
>> index 7a36c90ad4ec8b52f30b22b1621404857d6ef336..3dd58986ad5da0f898537a51715bb5d0fecbe100 100644
>> --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
>> +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
>> @@ -709,8 +709,11 @@ &mdss_edp_phy {
>> status = "okay";
>> };
>>
>> +&pcie1_port0 {
>> + reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
>> +};
>> +
>> &pcie1 {
>> - perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
>>
>> pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>;
>> pinctrl-names = "default";
>
> What about the pinctrl properties? They should also be moved.
>
pinctrl can still reside in the host bridge node, which has
all the gpio's for all the root ports. If we move them to the
root ports we need to explicitly apply pinctrl settings as these
not tied with the driver yet.
- Krishna Chaitanya.
> - Mani
>
On Tue, Jun 03, 2025 at 12:03:01PM +0530, Krishna Chaitanya Chundru wrote:
>
>
> On 6/1/2025 12:35 PM, Manivannan Sadhasivam wrote:
> > On Sat, Apr 19, 2025 at 10:49:26AM +0530, Krishna Chaitanya Chundru wrote:
> > > There are many places we agreed to move the wake and perst gpio's
> > > and phy etc to the pcie root port node instead of bridge node[1].
> >
> > Same comment as binding patch applies here.
> >
> > >
> > > So move the phy, phy-names, wake-gpio's in the root port.
> >
> > You are not moving any 'wake-gpios' property.
> >
> ack I will remove it.
> > > There is already reset-gpio defined for PERST# in pci-bus-common.yaml,
> > > start using that property instead of perst-gpio.
> > >
> > > [1] https://lore.kernel.org/linux-pci/20241211192014.GA3302752@bhelgaas/
> > >
> > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> > > ---
> > > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 5 ++++-
> > > arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 5 ++++-
> > > arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 5 ++++-
> > > arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 ++----
> > > 4 files changed, 14 insertions(+), 7 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> > > index 7a36c90ad4ec8b52f30b22b1621404857d6ef336..3dd58986ad5da0f898537a51715bb5d0fecbe100 100644
> > > --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> > > +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> > > @@ -709,8 +709,11 @@ &mdss_edp_phy {
> > > status = "okay";
> > > };
> > > +&pcie1_port0 {
> > > + reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
> > > +};
> > > +
> > > &pcie1 {
> > > - perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
> > > pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>;
> > > pinctrl-names = "default";
> >
> > What about the pinctrl properties? They should also be moved.
> >
> pinctrl can still reside in the host bridge node, which has
> all the gpio's for all the root ports. If we move them to the
> root ports we need to explicitly apply pinctrl settings as these
> not tied with the driver yet.
>
If the DT node is associated with a device, then the driver core should bind the
pinctrl pins and configure them. Is that not happening here?
- Mani
--
மணிவண்ணன் சதாசிவம்
On 6/3/2025 12:22 PM, Manivannan Sadhasivam wrote:
> On Tue, Jun 03, 2025 at 12:03:01PM +0530, Krishna Chaitanya Chundru wrote:
>>
>>
>> On 6/1/2025 12:35 PM, Manivannan Sadhasivam wrote:
>>> On Sat, Apr 19, 2025 at 10:49:26AM +0530, Krishna Chaitanya Chundru wrote:
>>>> There are many places we agreed to move the wake and perst gpio's
>>>> and phy etc to the pcie root port node instead of bridge node[1].
>>>
>>> Same comment as binding patch applies here.
>>>
>>>>
>>>> So move the phy, phy-names, wake-gpio's in the root port.
>>>
>>> You are not moving any 'wake-gpios' property.
>>>
>> ack I will remove it.
>>>> There is already reset-gpio defined for PERST# in pci-bus-common.yaml,
>>>> start using that property instead of perst-gpio.
>>>>
>>>> [1] https://lore.kernel.org/linux-pci/20241211192014.GA3302752@bhelgaas/
>>>>
>>>> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
>>>> ---
>>>> arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 5 ++++-
>>>> arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 5 ++++-
>>>> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 5 ++++-
>>>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 ++----
>>>> 4 files changed, 14 insertions(+), 7 deletions(-)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
>>>> index 7a36c90ad4ec8b52f30b22b1621404857d6ef336..3dd58986ad5da0f898537a51715bb5d0fecbe100 100644
>>>> --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
>>>> +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
>>>> @@ -709,8 +709,11 @@ &mdss_edp_phy {
>>>> status = "okay";
>>>> };
>>>> +&pcie1_port0 {
>>>> + reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
>>>> +};
>>>> +
>>>> &pcie1 {
>>>> - perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
>>>> pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>;
>>>> pinctrl-names = "default";
>>>
>>> What about the pinctrl properties? They should also be moved.
>>>
>> pinctrl can still reside in the host bridge node, which has
>> all the gpio's for all the root ports. If we move them to the
>> root ports we need to explicitly apply pinctrl settings as these
>> not tied with the driver yet.
>>
>
> If the DT node is associated with a device, then the driver core should bind the
> pinctrl pins and configure them. Is that not happening here?
The root node will not be associated with the driver until enumeration,
the controller drivers needs these to be configured before enumeration.
- Krishna Chaitanya.
>
> - Mani
>
On Tue, Jun 03, 2025 at 01:05:17PM +0530, Krishna Chaitanya Chundru wrote:
>
>
> On 6/3/2025 12:22 PM, Manivannan Sadhasivam wrote:
> > On Tue, Jun 03, 2025 at 12:03:01PM +0530, Krishna Chaitanya Chundru wrote:
> > >
> > >
> > > On 6/1/2025 12:35 PM, Manivannan Sadhasivam wrote:
> > > > On Sat, Apr 19, 2025 at 10:49:26AM +0530, Krishna Chaitanya Chundru wrote:
> > > > > There are many places we agreed to move the wake and perst gpio's
> > > > > and phy etc to the pcie root port node instead of bridge node[1].
> > > >
> > > > Same comment as binding patch applies here.
> > > >
> > > > >
> > > > > So move the phy, phy-names, wake-gpio's in the root port.
> > > >
> > > > You are not moving any 'wake-gpios' property.
> > > >
> > > ack I will remove it.
> > > > > There is already reset-gpio defined for PERST# in pci-bus-common.yaml,
> > > > > start using that property instead of perst-gpio.
> > > > >
> > > > > [1] https://lore.kernel.org/linux-pci/20241211192014.GA3302752@bhelgaas/
> > > > >
> > > > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> > > > > ---
> > > > > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 5 ++++-
> > > > > arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 5 ++++-
> > > > > arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 5 ++++-
> > > > > arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 ++----
> > > > > 4 files changed, 14 insertions(+), 7 deletions(-)
> > > > >
> > > > > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> > > > > index 7a36c90ad4ec8b52f30b22b1621404857d6ef336..3dd58986ad5da0f898537a51715bb5d0fecbe100 100644
> > > > > --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> > > > > +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
> > > > > @@ -709,8 +709,11 @@ &mdss_edp_phy {
> > > > > status = "okay";
> > > > > };
> > > > > +&pcie1_port0 {
> > > > > + reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
> > > > > +};
> > > > > +
> > > > > &pcie1 {
> > > > > - perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
> > > > > pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>;
> > > > > pinctrl-names = "default";
> > > >
> > > > What about the pinctrl properties? They should also be moved.
> > > >
> > > pinctrl can still reside in the host bridge node, which has
> > > all the gpio's for all the root ports. If we move them to the
> > > root ports we need to explicitly apply pinctrl settings as these
> > > not tied with the driver yet.
> > >
> >
> > If the DT node is associated with a device, then the driver core should bind the
> > pinctrl pins and configure them. Is that not happening here?
> The root node will not be associated with the driver until enumeration,
> the controller drivers needs these to be configured before enumeration.
>
Hmm. I'm working on moving the PERST# deassert to pwrctrl drivers, but even then
the PERST# assert needs to happen in the controller driver for initialization.
And moving them to root port node would cause the pin state to be changed
in-between. So I agree, let's leave them in controller node itself.
- Mani
--
மணிவண்ணன் சதாசிவம்
On Sat, Apr 19, 2025 at 10:49:26AM +0530, Krishna Chaitanya Chundru wrote: > There are many places we agreed to move the wake and perst gpio's > and phy etc to the pcie root port node instead of bridge node[1]. > > So move the phy, phy-names, wake-gpio's in the root port. > There is already reset-gpio defined for PERST# in pci-bus-common.yaml, > start using that property instead of perst-gpio. Moving the properties will break existing kernels. If that doesn't matter for these platforms, say so in the commit msg. > > [1] https://lore.kernel.org/linux-pci/20241211192014.GA3302752@bhelgaas/ > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> > --- > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 5 ++++- > arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 5 ++++- > arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 5 ++++- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 ++---- > 4 files changed, 14 insertions(+), 7 deletions(-)
On 4/23/25 5:37 PM, Rob Herring wrote: > On Sat, Apr 19, 2025 at 10:49:26AM +0530, Krishna Chaitanya Chundru wrote: >> There are many places we agreed to move the wake and perst gpio's >> and phy etc to the pcie root port node instead of bridge node[1]. >> >> So move the phy, phy-names, wake-gpio's in the root port. >> There is already reset-gpio defined for PERST# in pci-bus-common.yaml, >> start using that property instead of perst-gpio. > > Moving the properties will break existing kernels. If that doesn't > matter for these platforms, say so in the commit msg. I don't think we generally guarantee *forward* dt compatibility though, no? Konrad
On 08/05/2025 16:26, Konrad Dybcio wrote: > On 4/23/25 5:37 PM, Rob Herring wrote: >> On Sat, Apr 19, 2025 at 10:49:26AM +0530, Krishna Chaitanya Chundru wrote: >>> There are many places we agreed to move the wake and perst gpio's >>> and phy etc to the pcie root port node instead of bridge node[1]. >>> >>> So move the phy, phy-names, wake-gpio's in the root port. >>> There is already reset-gpio defined for PERST# in pci-bus-common.yaml, >>> start using that property instead of perst-gpio. >> >> Moving the properties will break existing kernels. If that doesn't >> matter for these platforms, say so in the commit msg. > > I don't think we generally guarantee *forward* dt compatibility though, no? We do not guarantee, comment was not about this, but we expect. This DTS is supposed and is used by other projects. There was entire complain last DT BoF about kernel breaking DTS users all the time. Best regards, Krzysztof
On 6/2/25 3:01 PM, Krzysztof Kozlowski wrote: > On 08/05/2025 16:26, Konrad Dybcio wrote: >> On 4/23/25 5:37 PM, Rob Herring wrote: >>> On Sat, Apr 19, 2025 at 10:49:26AM +0530, Krishna Chaitanya Chundru wrote: >>>> There are many places we agreed to move the wake and perst gpio's >>>> and phy etc to the pcie root port node instead of bridge node[1]. >>>> >>>> So move the phy, phy-names, wake-gpio's in the root port. >>>> There is already reset-gpio defined for PERST# in pci-bus-common.yaml, >>>> start using that property instead of perst-gpio. >>> >>> Moving the properties will break existing kernels. If that doesn't >>> matter for these platforms, say so in the commit msg. >> >> I don't think we generally guarantee *forward* dt compatibility though, no? > We do not guarantee, comment was not about this, but we expect. This DTS > is supposed and is used by other projects. There was entire complain > last DT BoF about kernel breaking DTS users all the time. Yeah I get it.. we're in a constant cycle of adding new components and later coming to the conclusion that whoever came up with the initial binding had no clue what they're doing.. That said, "absens carens".. if users or developers of other projects don't speak up on LKML (which serves as the de facto public square for DT development), we don't get any feedback to take into account when making potentially breaking changes (that may have a good reason behind them). We get a patch from OpenBSD people every now and then, but it's a drop in the ocean. Konrad
On 10/06/2025 15:15, Konrad Dybcio wrote: > On 6/2/25 3:01 PM, Krzysztof Kozlowski wrote: >> On 08/05/2025 16:26, Konrad Dybcio wrote: >>> On 4/23/25 5:37 PM, Rob Herring wrote: >>>> On Sat, Apr 19, 2025 at 10:49:26AM +0530, Krishna Chaitanya Chundru wrote: >>>>> There are many places we agreed to move the wake and perst gpio's >>>>> and phy etc to the pcie root port node instead of bridge node[1]. >>>>> >>>>> So move the phy, phy-names, wake-gpio's in the root port. >>>>> There is already reset-gpio defined for PERST# in pci-bus-common.yaml, >>>>> start using that property instead of perst-gpio. >>>> >>>> Moving the properties will break existing kernels. If that doesn't >>>> matter for these platforms, say so in the commit msg. >>> >>> I don't think we generally guarantee *forward* dt compatibility though, no? >> We do not guarantee, comment was not about this, but we expect. This DTS >> is supposed and is used by other projects. There was entire complain >> last DT BoF about kernel breaking DTS users all the time. > > Yeah I get it.. we're in a constant cycle of adding new components and > later coming to the conclusion that whoever came up with the initial > binding had no clue what they're doing.. > > That said, "absens carens".. if users or developers of other projects > don't speak up on LKML (which serves as the de facto public square for > DT development), we don't get any feedback to take into account when > making potentially breaking changes (that may have a good reason behind > them). We get a patch from OpenBSD people every now and then, but it's > a drop in the ocean. > I don't understand what you are commenting on. Do you reject what I asked for? Best regards, Krzysztof
On 6/11/25 8:36 AM, Krzysztof Kozlowski wrote: > On 10/06/2025 15:15, Konrad Dybcio wrote: >> On 6/2/25 3:01 PM, Krzysztof Kozlowski wrote: >>> On 08/05/2025 16:26, Konrad Dybcio wrote: >>>> On 4/23/25 5:37 PM, Rob Herring wrote: >>>>> On Sat, Apr 19, 2025 at 10:49:26AM +0530, Krishna Chaitanya Chundru wrote: >>>>>> There are many places we agreed to move the wake and perst gpio's >>>>>> and phy etc to the pcie root port node instead of bridge node[1]. >>>>>> >>>>>> So move the phy, phy-names, wake-gpio's in the root port. >>>>>> There is already reset-gpio defined for PERST# in pci-bus-common.yaml, >>>>>> start using that property instead of perst-gpio. >>>>> >>>>> Moving the properties will break existing kernels. If that doesn't >>>>> matter for these platforms, say so in the commit msg. >>>> >>>> I don't think we generally guarantee *forward* dt compatibility though, no? >>> We do not guarantee, comment was not about this, but we expect. This DTS >>> is supposed and is used by other projects. There was entire complain >>> last DT BoF about kernel breaking DTS users all the time. >> >> Yeah I get it.. we're in a constant cycle of adding new components and >> later coming to the conclusion that whoever came up with the initial >> binding had no clue what they're doing.. >> >> That said, "absens carens".. if users or developers of other projects >> don't speak up on LKML (which serves as the de facto public square for >> DT development), we don't get any feedback to take into account when >> making potentially breaking changes (that may have a good reason behind >> them). We get a patch from OpenBSD people every now and then, but it's >> a drop in the ocean. >> > I don't understand what you are commenting on. Do you reject what I > asked for? If the general consensus among kernel PCIe folks will come down to what this patch does, I think it's fair to shift to a "correct" hw description, especially if this is a requirement to resolve a blocker on functionality (which the author didn't clarify whether is the case) Konrad
On 11/06/2025 17:17, Konrad Dybcio wrote: > On 6/11/25 8:36 AM, Krzysztof Kozlowski wrote: >> On 10/06/2025 15:15, Konrad Dybcio wrote: >>> On 6/2/25 3:01 PM, Krzysztof Kozlowski wrote: >>>> On 08/05/2025 16:26, Konrad Dybcio wrote: >>>>> On 4/23/25 5:37 PM, Rob Herring wrote: >>>>>> On Sat, Apr 19, 2025 at 10:49:26AM +0530, Krishna Chaitanya Chundru wrote: >>>>>>> There are many places we agreed to move the wake and perst gpio's >>>>>>> and phy etc to the pcie root port node instead of bridge node[1]. >>>>>>> >>>>>>> So move the phy, phy-names, wake-gpio's in the root port. >>>>>>> There is already reset-gpio defined for PERST# in pci-bus-common.yaml, >>>>>>> start using that property instead of perst-gpio. >>>>>> >>>>>> Moving the properties will break existing kernels. If that doesn't >>>>>> matter for these platforms, say so in the commit msg. >>>>> >>>>> I don't think we generally guarantee *forward* dt compatibility though, no? >>>> We do not guarantee, comment was not about this, but we expect. This DTS >>>> is supposed and is used by other projects. There was entire complain >>>> last DT BoF about kernel breaking DTS users all the time. >>> >>> Yeah I get it.. we're in a constant cycle of adding new components and >>> later coming to the conclusion that whoever came up with the initial >>> binding had no clue what they're doing.. >>> >>> That said, "absens carens".. if users or developers of other projects >>> don't speak up on LKML (which serves as the de facto public square for >>> DT development), we don't get any feedback to take into account when >>> making potentially breaking changes (that may have a good reason behind >>> them). We get a patch from OpenBSD people every now and then, but it's >>> a drop in the ocean. >>> >> I don't understand what you are commenting on. Do you reject what I >> asked for? > > If the general consensus among kernel PCIe folks will come down to what > this patch does, I think it's fair to shift to a "correct" hw > description, especially if this is a requirement to resolve a blocker > on functionality (which the author didn't clarify whether is the case) Again I do not see how this argues with my comment, so please clarify: do you agree or disagree with my request? Best regards, Krzysztof
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