On 4/12/2025 1:43 AM, Ingo Molnar wrote:
>
> Chang, mind sending a series of the latest version of all the pending
> APX patches you have at the moment (and any other pending FPU patches
> you may have), with Reviewed-by tags rolled in, etc.

Hi Ingo,

Here’s the updated patch set following up on the previous APX series [1],
along with a collection of additional FPU-related cleanups and
improvements that were previously posted or discussed.

The series is organized into two parts:

  1. APX Enabling (PATCH 1–5)

     These patches complete the APX bring-up. After laying the groundwork,
     this portion finalizes the enablement:

     *  Patches 1, 2, and 4 are typical xfeature plumbing.

     *  Patch 3 handles MPX conflict -- unexpected hardware issue

     *  Patch 5 adds a test case.

  2. Miscellaneous FPU Code Improvements (PATCH 6–10)

     This batch includes various standalone improvements:

     *  Patch 6: Centralizes the XSAVE disablement message

     *  Patches 7-8: Simplifies PKRU update in XSTATE_BV on sigframe

     *  Patch 9: Removes the unused mxcsr_feature_mask export

     *  Patch 10: Renames fpu_reset_fpregs() for clarity

     Each patch includes context and links to earlier discussions or
     revisions.

As you noted in [2], the series is based on the x86/fpu branch and is
available at:

    git://github.com/intel/apx.git apx-and-misc

[1]: https://lore.kernel.org/lkml/20250320234301.8342-1-chang.seok.bae@intel.com
[2]: https://lore.kernel.org/lkml/Z_zGCCNE_Qt3IlMZ@gmail.com

Thanks,
Chang

Chang S. Bae (10):
  x86/cpufeatures: Add X86_FEATURE_APX
  x86/fpu/apx: Define APX state component
  x86/fpu/apx: Disallow conflicting MPX presence
  x86/fpu/apx: Enable APX state support
  selftests/x86/apx: Add APX test
  x86/fpu: Log XSAVE disablement consistently
  x86/fpu: Refactor xfeature bitmask update code for sigframe XSAVE
  x86/pkeys: Simplify PKRU update in signal frame
  x86/fpu: Remove export of mxcsr_feature_mask
  x86/fpu: Rename fpu_reset_fpregs() to fpu_reset_fpstate_regs()

 arch/x86/include/asm/cpufeatures.h   |  1 +
 arch/x86/include/asm/fpu/types.h     |  9 +++++++++
 arch/x86/include/asm/fpu/xstate.h    |  3 ++-
 arch/x86/kernel/cpu/cpuid-deps.c     |  1 +
 arch/x86/kernel/cpu/scattered.c      |  1 +
 arch/x86/kernel/fpu/core.c           |  6 +++---
 arch/x86/kernel/fpu/init.c           |  1 -
 arch/x86/kernel/fpu/signal.c         | 11 +----------
 arch/x86/kernel/fpu/xstate.c         | 23 ++++++++++++++++++++---
 arch/x86/kernel/fpu/xstate.h         | 21 +++++++++++++++------
 tools/testing/selftests/x86/Makefile |  3 ++-
 tools/testing/selftests/x86/apx.c    | 10 ++++++++++
 tools/testing/selftests/x86/xstate.c |  3 ++-
 tools/testing/selftests/x86/xstate.h |  2 ++
 14 files changed, 69 insertions(+), 26 deletions(-)
 create mode 100644 tools/testing/selftests/x86/apx.c


base-commit: e3a52b67f54aa36ab21265eeea016460b5fe1c46
-- 
2.45.2

* Chang S. Bae <chang.seok.bae@intel.com> wrote:

> On 4/12/2025 1:43 AM, Ingo Molnar wrote:
> >
> > Chang, mind sending a series of the latest version of all the pending
> > APX patches you have at the moment (and any other pending FPU patches
> > you may have), with Reviewed-by tags rolled in, etc.
> 
> Hi Ingo,
> 
> Here’s the updated patch set following up on the previous APX series [1],
> along with a collection of additional FPU-related cleanups and
> improvements that were previously posted or discussed.
> 
> The series is organized into two parts:
> 
>   1. APX Enabling (PATCH 1–5)
> 
>      These patches complete the APX bring-up. After laying the groundwork,
>      this portion finalizes the enablement:
> 
>      *  Patches 1, 2, and 4 are typical xfeature plumbing.
> 
>      *  Patch 3 handles MPX conflict -- unexpected hardware issue
> 
>      *  Patch 5 adds a test case.
> 
>   2. Miscellaneous FPU Code Improvements (PATCH 6–10)
> 
>      This batch includes various standalone improvements:
> 
>      *  Patch 6: Centralizes the XSAVE disablement message
> 
>      *  Patches 7-8: Simplifies PKRU update in XSTATE_BV on sigframe
> 
>      *  Patch 9: Removes the unused mxcsr_feature_mask export
> 
>      *  Patch 10: Renames fpu_reset_fpregs() for clarity
> 
>      Each patch includes context and links to earlier discussions or
>      revisions.

>  14 files changed, 69 insertions(+), 26 deletions(-)

Applied to tip:x86/fpu, thanks!

Note that I've merged the currently pending tip:x86/cpu bits into 
tip:x86/fpu before applying these patches, to resolve a conflict with 
<asm/cpufeatures.h>, and re-formatted the new X86_FEATURE_APX line to 
have the canonical format.


	Ingo

On 4/16/2025 1:07 AM, Ingo Molnar wrote:
> 
>>   14 files changed, 69 insertions(+), 26 deletions(-)
> 
> Applied to tip:x86/fpu, thanks!
> 
> Note that I've merged the currently pending tip:x86/cpu bits into
> tip:x86/fpu before applying these patches, to resolve a conflict with
> <asm/cpufeatures.h>, and re-formatted the new X86_FEATURE_APX line to
> have the canonical format.

Appreciate!

Chang