Some SoCs from Aspeed, Allwinner, Sophgo and Synopsys have
a simple reset controller by toggling bit. It is a hard time
for each device to add its own compatible to the driver.
Since these devices share a common design, it is possible to
add a common device to reduce these unnecessary change for
the driver.

Add common binding for these kind generic reset controller.
Check the binding description for its requirement and
suitable scenarios.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
 .../bindings/reset/reset-simple.yaml          | 61 +++++++++++++++++++
 1 file changed, 61 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/reset-simple.yaml

diff --git a/Documentation/devicetree/bindings/reset/reset-simple.yaml b/Documentation/devicetree/bindings/reset/reset-simple.yaml
new file mode 100644
index 000000000000..86c33a608148
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/reset-simple.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/reset-simple.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Generic Bit Reset Controller
+
+maintainers:
+  - Inochi Amaoto <inochiama@gmail.com>
+
+description: |
+  This document defines device tree properties common to reset
+  controller devices that perform assert/deassert by simply
+  toggling bit.
+
+  All devices in this binding should satisfy the following requirement:
+  - There is a single, contiguous range of 32-bit registers.
+  - All bits in each register directly control a reset line.
+     - There are no self-deasserting resets.
+     - There are no timing requirements.
+     - The bits are exclusively resets, nothing else.
+  - All bits behave the same, so all reset bits are either
+    active-high or all are active-low.
+  - The bits can be read back, but the read status may
+    be active-low independently from the writes.
+
+  If the device is not meet the requirement, it should use its
+  own binding to describe the device.
+
+properties:
+  compatible:
+    const: reset-simple
+
+  reg:
+    maxItems: 1
+
+  "#reset-cells":
+    const: 1
+
+  active-low:
+    type: boolean
+    description:
+      If true, bits are cleared to assert the reset. Otherwise,
+      bits are set to assert the reset. This also applies to
+      read back.
+
+required:
+  - compatible
+  - reg
+  - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    reset-controller@1000000 {
+        compatible = "reset-simple";
+        reg = <0x1000000 0x1000>;
+        #reset-cells = <1>;
+    };
-- 
2.48.1

On Thu, Feb 27, 2025 at 07:42:29AM +0800, Inochi Amaoto wrote:
> Some SoCs from Aspeed, Allwinner, Sophgo and Synopsys have
> a simple reset controller by toggling bit. It is a hard time
> for each device to add its own compatible to the driver.

It's a 1 line change. That isn't hard.

> Since these devices share a common design, it is possible to
> add a common device to reduce these unnecessary change for
> the driver.
> 
> Add common binding for these kind generic reset controller.
> Check the binding description for its requirement and
> suitable scenarios.

We generally don't want 1 register per node type bindings. That level of 
detail in DT has proven impossible to get right.

Rob

On Thu, Feb 27, 2025 at 07:35:09AM -0600, Rob Herring wrote:
> On Thu, Feb 27, 2025 at 07:42:29AM +0800, Inochi Amaoto wrote:
> > Some SoCs from Aspeed, Allwinner, Sophgo and Synopsys have
> > a simple reset controller by toggling bit. It is a hard time
> > for each device to add its own compatible to the driver.
> 
> It's a 1 line change. That isn't hard.
> 

Yeah, it is not hard. But it is annoying and sometimes
I felt it is a waste of time to add a device id to the
reset-simple driver.

> > Since these devices share a common design, it is possible to
> > add a common device to reduce these unnecessary change for
> > the driver.
> > 
> > Add common binding for these kind generic reset controller.
> > Check the binding description for its requirement and
> > suitable scenarios.
> 
> We generally don't want 1 register per node type bindings. That level of 
> detail in DT has proven impossible to get right.
> 
> Rob

It is not 1 register per node, but a contiguous range.
In most SoC satisfy the requirement, only one reset
device is added. This is what the reset-simple handle.
1 register per node is too crazy for everyone....

Regards,
Inochi