[PATCH 0/5] KVM: selftests: Fix PMC checks in PMU counters test

Sean Christopherson posted 5 patches 1 year ago
.../selftests/kvm/x86/pmu_counters_test.c     | 143 ++++++++++--------
1 file changed, 83 insertions(+), 60 deletions(-)
[PATCH 0/5] KVM: selftests: Fix PMC checks in PMU counters test
Posted by Sean Christopherson 1 year ago
Fix a flaw in the Intel PMU counters test where it asserts that an event is
counting correctly without actually knowing what the event counts given the
underlying hardware.

The bug manifests as failures with the Top-Down Slots architectural event
when running CPUs that doesn't actually support that arch event (pre-ICX).
The arch event encoding still counts _something_, just not Top-Down Slots
(I haven't bothered to look up what it was counting).  The passed by sheer
dumb luck until an unrelated change caused the count of the unknown event
to drop.

All credit to Dapeng for hunting down the problem.

Sean Christopherson (5):
  KVM: selftests: Make Intel arch events globally available in PMU
    counters test
  KVM: selftests: Only validate counts for hardware-supported arch
    events
  KVM: selftests: Remove dead code in Intel PMU counters test
  KVM: selftests: Drop the "feature event" param from guest test helpers
  KVM: selftests: Print out the actual Top-Down Slots count on failure

 .../selftests/kvm/x86/pmu_counters_test.c     | 143 ++++++++++--------
 1 file changed, 83 insertions(+), 60 deletions(-)


base-commit: eb723766b1030a23c38adf2348b7c3d1409d11f0
-- 
2.48.0.rc2.279.g1de40edade-goog
Re: [PATCH 0/5] KVM: selftests: Fix PMC checks in PMU counters test
Posted by Sean Christopherson 11 months, 3 weeks ago
On Fri, 17 Jan 2025 15:41:58 -0800, Sean Christopherson wrote:
> Fix a flaw in the Intel PMU counters test where it asserts that an event is
> counting correctly without actually knowing what the event counts given the
> underlying hardware.
> 
> The bug manifests as failures with the Top-Down Slots architectural event
> when running CPUs that doesn't actually support that arch event (pre-ICX).
> The arch event encoding still counts _something_, just not Top-Down Slots
> (I haven't bothered to look up what it was counting).  The passed by sheer
> dumb luck until an unrelated change caused the count of the unknown event
> to drop.
> 
> [...]

In case Paolo ends up grabbing the version I applied...
https://lore.kernel.org/all/Z6_dZTbQbgr2iY6Q@google.com

Applied to kvm-x86 selftests_6.14.

[1/5] KVM: selftests: Make Intel arch events globally available in PMU counters test
      https://github.com/kvm-x86/linux/commit/933178ddf73a
[2/5] KVM: selftests: Only validate counts for hardware-supported arch events
      https://github.com/kvm-x86/linux/commit/8752e2b4a2b7
[3/5] KVM: selftests: Remove dead code in Intel PMU counters test
      https://github.com/kvm-x86/linux/commit/e327630e2a0c
[4/5] KVM: selftests: Drop the "feature event" param from guest test helpers
      https://github.com/kvm-x86/linux/commit/0e6714735c01
[5/5] KVM: selftests: Print out the actual Top-Down Slots count on failure
      https://github.com/kvm-x86/linux/commit/54108e733444

--
https://github.com/kvm-x86/linux/tree/next
Re: [PATCH 0/5] KVM: selftests: Fix PMC checks in PMU counters test
Posted by Paolo Bonzini 1 year ago
On Sat, Jan 18, 2025 at 12:42 AM Sean Christopherson <seanjc@google.com> wrote:
>
> Fix a flaw in the Intel PMU counters test where it asserts that an event is
> counting correctly without actually knowing what the event counts given the
> underlying hardware.
>
> The bug manifests as failures with the Top-Down Slots architectural event
> when running CPUs that doesn't actually support that arch event (pre-ICX).
> The arch event encoding still counts _something_, just not Top-Down Slots
> (I haven't bothered to look up what it was counting).  The passed by sheer
> dumb luck until an unrelated change caused the count of the unknown event
> to drop.

Queued for 6.14-rc1, thanks.

Paolo
Re: [PATCH 0/5] KVM: selftests: Fix PMC checks in PMU counters test
Posted by Sean Christopherson 12 months ago
On Mon, Jan 20, 2025, Paolo Bonzini wrote:
> On Sat, Jan 18, 2025 at 12:42 AM Sean Christopherson <seanjc@google.com> wrote:
> >
> > Fix a flaw in the Intel PMU counters test where it asserts that an event is
> > counting correctly without actually knowing what the event counts given the
> > underlying hardware.
> >
> > The bug manifests as failures with the Top-Down Slots architectural event
> > when running CPUs that doesn't actually support that arch event (pre-ICX).
> > The arch event encoding still counts _something_, just not Top-Down Slots
> > (I haven't bothered to look up what it was counting).  The passed by sheer
> > dumb luck until an unrelated change caused the count of the unknown event
> > to drop.
> 
> Queued for 6.14-rc1, thanks.

Lies :-)

Neither this nor the main selftests pull request[*] landed in 6.14.  None of this
is urgent, so if it's easier on your end I can carry them forward and send them
for 6.15.

[*] https://lore.kernel.org/all/20250117010718.2328467-5-seanjc@google.com