Increase the configuration size to 256MB as required by the ECAM feature.
And also move config space, DBI, ELBI, IATU to upper PCIe region and use
lower PCIe region entierly for BAR region.
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 3d8410683402..a7e3d3e9d034 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2196,10 +2196,10 @@ wifi: wifi@17a10040 {
pcie1: pcie@1c08000 {
compatible = "qcom,pcie-sc7280";
reg = <0 0x01c08000 0 0x3000>,
- <0 0x40000000 0 0xf1d>,
- <0 0x40000f20 0 0xa8>,
- <0 0x40001000 0 0x1000>,
- <0 0x40100000 0 0x100000>;
+ <4 0x00000000 0 0xf1d>,
+ <4 0x00000f20 0 0xa8>,
+ <4 0x10000000 0 0x1000>,
+ <4 0x00000000 0 0x10000000>;
reg-names = "parf", "dbi", "elbi", "atu", "config";
device_type = "pci";
@@ -2210,8 +2210,8 @@ pcie1: pcie@1c08000 {
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
- <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
+ ranges = <0x01000000 0x0 0x00000000 0x0 0x40000000 0x0 0x100000>,
+ <0x02000000 0x0 0x40100000 0x0 0x40100000 0x0 0x1ff00000>;
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
--
2.34.1
On 16.11.2024 11:00 PM, Krishna chaitanya chundru wrote:
> Increase the configuration size to 256MB as required by the ECAM feature.
> And also move config space, DBI, ELBI, IATU to upper PCIe region and use
> lower PCIe region entierly for BAR region.
>
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 3d8410683402..a7e3d3e9d034 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2196,10 +2196,10 @@ wifi: wifi@17a10040 {
> pcie1: pcie@1c08000 {
> compatible = "qcom,pcie-sc7280";
> reg = <0 0x01c08000 0 0x3000>,
> - <0 0x40000000 0 0xf1d>,
> - <0 0x40000f20 0 0xa8>,
> - <0 0x40001000 0 0x1000>,
> - <0 0x40100000 0 0x100000>;
> + <4 0x00000000 0 0xf1d>,
> + <4 0x00000f20 0 0xa8>,
> + <4 0x10000000 0 0x1000>,
> + <4 0x00000000 0 0x10000000>;
So this region is far bigger, any reason to use 256MiB specifically?
Konrad
>
> reg-names = "parf", "dbi", "elbi", "atu", "config";
> device_type = "pci";
> @@ -2210,8 +2210,8 @@ pcie1: pcie@1c08000 {
> #address-cells = <3>;
> #size-cells = <2>;
>
> - ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
> - <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
> + ranges = <0x01000000 0x0 0x00000000 0x0 0x40000000 0x0 0x100000>,
> + <0x02000000 0x0 0x40100000 0x0 0x40100000 0x0 0x1ff00000>;
>
> interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
>
On Thu, Dec 05, 2024 at 05:11:25PM +0100, Konrad Dybcio wrote:
> On 16.11.2024 11:00 PM, Krishna chaitanya chundru wrote:
> > Increase the configuration size to 256MB as required by the ECAM feature.
> > And also move config space, DBI, ELBI, IATU to upper PCIe region and use
> > lower PCIe region entierly for BAR region.
> >
> > Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
> > ---
> > arch/arm64/boot/dts/qcom/sc7280.dtsi | 12 ++++++------
> > 1 file changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > index 3d8410683402..a7e3d3e9d034 100644
> > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > @@ -2196,10 +2196,10 @@ wifi: wifi@17a10040 {
> > pcie1: pcie@1c08000 {
> > compatible = "qcom,pcie-sc7280";
> > reg = <0 0x01c08000 0 0x3000>,
> > - <0 0x40000000 0 0xf1d>,
> > - <0 0x40000f20 0 0xa8>,
> > - <0 0x40001000 0 0x1000>,
> > - <0 0x40100000 0 0x100000>;
> > + <4 0x00000000 0 0xf1d>,
> > + <4 0x00000f20 0 0xa8>,
> > + <4 0x10000000 0 0x1000>,
> > + <4 0x00000000 0 0x10000000>;
>
> So this region is far bigger, any reason to use 256MiB specifically?
I assume this is because ECAM takes 1MB/bus, and pcie1 has
bus-range = <0x00 0xff>. If one wanted a smaller ECAM area,
I assume one would limit bus-range to match.
Bjorn
On Sun, Nov 17, 2024 at 03:30:18AM +0530, Krishna chaitanya chundru wrote:
> Increase the configuration size to 256MB as required by the ECAM feature.
> And also move config space, DBI, ELBI, IATU to upper PCIe region and use
> lower PCIe region entierly for BAR region.
>
Is this change compatible with old kernels before commit '10ba0854c5e6 ("PCI:
qcom: Disable mirroring of DBI and iATU register space in BAR region")'?
- Mani
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 3d8410683402..a7e3d3e9d034 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2196,10 +2196,10 @@ wifi: wifi@17a10040 {
> pcie1: pcie@1c08000 {
> compatible = "qcom,pcie-sc7280";
> reg = <0 0x01c08000 0 0x3000>,
> - <0 0x40000000 0 0xf1d>,
> - <0 0x40000f20 0 0xa8>,
> - <0 0x40001000 0 0x1000>,
> - <0 0x40100000 0 0x100000>;
> + <4 0x00000000 0 0xf1d>,
> + <4 0x00000f20 0 0xa8>,
> + <4 0x10000000 0 0x1000>,
> + <4 0x00000000 0 0x10000000>;
>
> reg-names = "parf", "dbi", "elbi", "atu", "config";
> device_type = "pci";
> @@ -2210,8 +2210,8 @@ pcie1: pcie@1c08000 {
> #address-cells = <3>;
> #size-cells = <2>;
>
> - ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
> - <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
> + ranges = <0x01000000 0x0 0x00000000 0x0 0x40000000 0x0 0x100000>,
> + <0x02000000 0x0 0x40100000 0x0 0x40100000 0x0 0x1ff00000>;
>
> interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
>
> --
> 2.34.1
>
--
மணிவண்ணன் சதாசிவம்
On 12/2/2024 8:36 PM, Manivannan Sadhasivam wrote:
> On Sun, Nov 17, 2024 at 03:30:18AM +0530, Krishna chaitanya chundru wrote:
>> Increase the configuration size to 256MB as required by the ECAM feature.
>> And also move config space, DBI, ELBI, IATU to upper PCIe region and use
>> lower PCIe region entierly for BAR region.
>>
>
> Is this change compatible with old kernels before commit '10ba0854c5e6 ("PCI:
> qcom: Disable mirroring of DBI and iATU register space in BAR region")'?
>
> - Mani
No mani, we need this commit '10ba0854c5e6 ("PCI:
> qcom: Disable mirroring of DBI and iATU register space in BAR region")
for this.
- Krishna Chaitanya.
>
>> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 12 ++++++------
>> 1 file changed, 6 insertions(+), 6 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 3d8410683402..a7e3d3e9d034 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -2196,10 +2196,10 @@ wifi: wifi@17a10040 {
>> pcie1: pcie@1c08000 {
>> compatible = "qcom,pcie-sc7280";
>> reg = <0 0x01c08000 0 0x3000>,
>> - <0 0x40000000 0 0xf1d>,
>> - <0 0x40000f20 0 0xa8>,
>> - <0 0x40001000 0 0x1000>,
>> - <0 0x40100000 0 0x100000>;
>> + <4 0x00000000 0 0xf1d>,
>> + <4 0x00000f20 0 0xa8>,
>> + <4 0x10000000 0 0x1000>,
>> + <4 0x00000000 0 0x10000000>;
>>
>> reg-names = "parf", "dbi", "elbi", "atu", "config";
>> device_type = "pci";
>> @@ -2210,8 +2210,8 @@ pcie1: pcie@1c08000 {
>> #address-cells = <3>;
>> #size-cells = <2>;
>>
>> - ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
>> - <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
>> + ranges = <0x01000000 0x0 0x00000000 0x0 0x40000000 0x0 0x100000>,
>> + <0x02000000 0x0 0x40100000 0x0 0x40100000 0x0 0x1ff00000>;
>>
>> interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
>>
>> --
>> 2.34.1
>>
>
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