Casting (1 >> bit) to u64 before it is compared with pebs_status variable.

Fixes: 21509084f999 perf/x86/intel: Handle multiple records in the PEBS buffer
Signed-off-by: Ragavendra Nagraj <ragavendra.bn@gmail.com>
---
 arch/x86/events/intel/ds.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index fa5ea65de0d0..9ea147565dc2 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -2072,7 +2072,7 @@ get_next_pebs_record_by_bit(void *base, void *top, int bit)
 			/* clear non-PEBS bit and re-check */
 			pebs_status = status & cpuc->pebs_enabled;
 			pebs_status &= PEBS_COUNTER_MASK;
-			if (pebs_status == (1 << bit))
+			if (pebs_status == (u64) (1 << bit))
 				return at;
 		}
 	}
-- 
2.46.1

On Fri, Nov 15, 2024 at 02:58:30PM -0800, Ragavendra wrote:
> Casting (1 >> bit) to u64 before it is compared with pebs_status variable.

I don't think this does what you want it to.

> Fixes: 21509084f999 perf/x86/intel: Handle multiple records in the PEBS buffer
> Signed-off-by: Ragavendra Nagraj <ragavendra.bn@gmail.com>
> ---
>  arch/x86/events/intel/ds.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
> index fa5ea65de0d0..9ea147565dc2 100644
> --- a/arch/x86/events/intel/ds.c
> +++ b/arch/x86/events/intel/ds.c
> @@ -2072,7 +2072,7 @@ get_next_pebs_record_by_bit(void *base, void *top, int bit)
>  			/* clear non-PEBS bit and re-check */
>  			pebs_status = status & cpuc->pebs_enabled;
>  			pebs_status &= PEBS_COUNTER_MASK;
> -			if (pebs_status == (1 << bit))
> +			if (pebs_status == (u64) (1 << bit))
>  				return at;
>  		}
>  	}
> -- 
> 2.46.1
>