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Fixes: 21509084f999 perf/x86/intel: Handle multiple records in the PEBS buf= fer Signed-off-by: Ragavendra Nagraj --- arch/x86/events/intel/ds.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c index fa5ea65de0d0..9ea147565dc2 100644 --- a/arch/x86/events/intel/ds.c +++ b/arch/x86/events/intel/ds.c @@ -2072,7 +2072,7 @@ get_next_pebs_record_by_bit(void *base, void *top, in= t bit) /* clear non-PEBS bit and re-check */ pebs_status =3D status & cpuc->pebs_enabled; pebs_status &=3D PEBS_COUNTER_MASK; - if (pebs_status =3D=3D (1 << bit)) + if (pebs_status =3D=3D (u64) (1 << bit)) return at; } } --=20 2.46.1