[PATCH v5 0/8] Add support for videocc, camcc, dispcc0 and dispcc1 on Qualcomm SA8775P platform.

Taniya Das posted 8 patches 1 month, 2 weeks ago
There is a newer version of this series
.../bindings/clock/qcom,sa8775p-camcc.yaml         |   62 +
.../bindings/clock/qcom,sa8775p-dispcc.yaml        |   79 +
.../bindings/clock/qcom,sa8775p-videocc.yaml       |   62 +
arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi         |    2 +-
arch/arm64/boot/dts/qcom/sa8775p.dtsi              |   57 +
drivers/clk/qcom/Kconfig                           |   31 +
drivers/clk/qcom/Makefile                          |    3 +
drivers/clk/qcom/camcc-sa8775p.c                   | 1868 ++++++++++++++++++++
drivers/clk/qcom/dispcc0-sa8775p.c                 | 1481 ++++++++++++++++
drivers/clk/qcom/dispcc1-sa8775p.c                 | 1481 ++++++++++++++++
drivers/clk/qcom/videocc-sa8775p.c                 |  576 ++++++
include/dt-bindings/clock/qcom,sa8775p-camcc.h     |  108 ++
include/dt-bindings/clock/qcom,sa8775p-dispcc.h    |   87 +
include/dt-bindings/clock/qcom,sa8775p-videocc.h   |   47 +
14 files changed, 5943 insertions(+), 1 deletion(-)
[PATCH v5 0/8] Add support for videocc, camcc, dispcc0 and dispcc1 on Qualcomm SA8775P platform.
Posted by Taniya Das 1 month, 2 weeks ago
[v5]
  Rebased the device tree patch to add clock controller nodes.

[v4]
  Changes in [v4] compared to [v3]
  Videocc: Update the mvs0/mvs1 gdsc to use HW_CTRL_TRIGGER [Konrad and Qualcomm
  internal discussions]
  Camcc:   Add new clock to the clock tree.
  Change the patch order for 'Update sleep_clk frequency to 32000 on SA8775P' [Krzysztof]

Changes in [v3] compared to [v2]:
  Update the qcom_cc_really_probe() to use &pdev->dev, for the CAMCC, DISPCC & VIDEOCC drivers.

[v2]
https://lore.kernel.org/all/20240612-sa8775p-mm-clock-controllers-v1-0-db295a846ee7@quicinc.com/
Changes in [v2] compared to [v1]:
  [PATCH 1/8]: Updated bindings to reference qcom,gcc.yaml
  [PATCH 3/8]: Updated bindings to reference qcom,gcc.yaml
  [PATCH 5/8]: Updated bindings to reference qcom,gcc.yaml
  [PATCH 7/8]: Split updating sleep_clk frequency to separate patch
  [PATCH 8/8]: Newly added to update sleep_clk frequency to 32000
  These multimedia clock controller and device tree patches are split from the below [v1] series.

[v1]
https://lore.kernel.org/all/20240531090249.10293-1-quic_tdas@quicinc.com/

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
---
Taniya Das (8):
      dt-bindings: clock: qcom: Add SA8775P video clock controller
      clk: qcom: Add support for Video clock controller on SA8775P
      dt-bindings: clock: qcom: Add SA8775P camera clock controller
      clk: qcom: Add support for Camera Clock Controller on SA8775P
      dt-bindings: clock: qcom: Add SA8775P display clock controllers
      clk: qcom: Add support for Display clock Controllers on SA8775P
      arm64: dts: qcom: Update sleep_clk frequency to 32000 on SA8775P
      arm64: dts: qcom: Add support for multimedia clock controllers

 .../bindings/clock/qcom,sa8775p-camcc.yaml         |   62 +
 .../bindings/clock/qcom,sa8775p-dispcc.yaml        |   79 +
 .../bindings/clock/qcom,sa8775p-videocc.yaml       |   62 +
 arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi         |    2 +-
 arch/arm64/boot/dts/qcom/sa8775p.dtsi              |   57 +
 drivers/clk/qcom/Kconfig                           |   31 +
 drivers/clk/qcom/Makefile                          |    3 +
 drivers/clk/qcom/camcc-sa8775p.c                   | 1868 ++++++++++++++++++++
 drivers/clk/qcom/dispcc0-sa8775p.c                 | 1481 ++++++++++++++++
 drivers/clk/qcom/dispcc1-sa8775p.c                 | 1481 ++++++++++++++++
 drivers/clk/qcom/videocc-sa8775p.c                 |  576 ++++++
 include/dt-bindings/clock/qcom,sa8775p-camcc.h     |  108 ++
 include/dt-bindings/clock/qcom,sa8775p-dispcc.h    |   87 +
 include/dt-bindings/clock/qcom,sa8775p-videocc.h   |   47 +
 14 files changed, 5943 insertions(+), 1 deletion(-)
---
base-commit: 0cca97bf23640ff68a6e8a74e9b6659fdc27f48c
change-id: 20241010-sa8775p-mm-v4-resend-patches-42735def52a0

Best regards,
-- 
Taniya Das <quic_tdas@quicinc.com>
Re: (subset) [PATCH v5 0/8] Add support for videocc, camcc, dispcc0 and dispcc1 on Qualcomm SA8775P platform.
Posted by Bjorn Andersson 1 month ago
On Fri, 11 Oct 2024 00:28:30 +0530, Taniya Das wrote:
> [v5]
>   Rebased the device tree patch to add clock controller nodes.
> 
> [v4]
>   Changes in [v4] compared to [v3]
>   Videocc: Update the mvs0/mvs1 gdsc to use HW_CTRL_TRIGGER [Konrad and Qualcomm
>   internal discussions]
>   Camcc:   Add new clock to the clock tree.
>   Change the patch order for 'Update sleep_clk frequency to 32000 on SA8775P' [Krzysztof]
> 
> [...]

Applied, thanks!

[2/8] clk: qcom: Add support for Video clock controller on SA8775P
      commit: 9c28d1b9ec6038ba654e28599532251a691c2ed0
[4/8] clk: qcom: Add support for Camera Clock Controller on SA8775P
      commit: 84c74dfbecc5f809e6e536c2ec74fd0a582399ec
[6/8] clk: qcom: Add support for Display clock Controllers on SA8775P
      commit: e700bfd2f976903428df422f78c6b725ea142564

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>