[PATCH v5 3/7] dt-bindings: PCI: qcom,pcie-x1e80100: Add 'global' interrupt

Qiang Yu posted 7 patches 1 month, 2 weeks ago
There is a newer version of this series
[PATCH v5 3/7] dt-bindings: PCI: qcom,pcie-x1e80100: Add 'global' interrupt
Posted by Qiang Yu 1 month, 2 weeks ago
Document 'global' SPI interrupt along with the existing MSI interrupts so
that QCOM PCIe RC driver can make use of it to get events such as PCIe
link specific events, safety events, etc.

Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
---
 .../devicetree/bindings/pci/qcom,pcie-x1e80100.yaml    | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
index a9db0a231563..2c0e01fc0ab8 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
@@ -46,8 +46,8 @@ properties:
       - const: cnoc_sf_axi # Config NoC PCIe1 AXI clock
 
   interrupts:
-    minItems: 8
-    maxItems: 8
+    minItems: 9
+    maxItems: 9
 
   interrupt-names:
     items:
@@ -59,6 +59,7 @@ properties:
       - const: msi5
       - const: msi6
       - const: msi7
+      - const: global
 
   resets:
     minItems: 1
@@ -130,9 +131,10 @@ examples:
                          <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
                          <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
                          <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
-                         <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+                         <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+                         <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
             interrupt-names = "msi0", "msi1", "msi2", "msi3",
-                              "msi4", "msi5", "msi6", "msi7";
+                              "msi4", "msi5", "msi6", "msi7", "global";
             #interrupt-cells = <1>;
             interrupt-map-mask = <0 0 0 0x7>;
             interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
-- 
2.34.1
Re: [PATCH v5 3/7] dt-bindings: PCI: qcom,pcie-x1e80100: Add 'global' interrupt
Posted by Rob Herring 1 month, 2 weeks ago
On Wed, Oct 09, 2024 at 02:15:36AM -0700, Qiang Yu wrote:
> Document 'global' SPI interrupt along with the existing MSI interrupts so
> that QCOM PCIe RC driver can make use of it to get events such as PCIe
> link specific events, safety events, etc.

Is it required for some reason vs. being optional? It's fine to break 
the ABI because...?

Answer those questions with your commit msg.

> 
> Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
> ---
>  .../devicetree/bindings/pci/qcom,pcie-x1e80100.yaml    | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)