vcc and vlogic are required but are not retrieved and enabled in the
probe. Add them.
In order to prepare support for additional parts requiring different
supplies, add vcc and vlogic to the platform specific structures
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
---
drivers/iio/adc/ad7380.c | 43 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/drivers/iio/adc/ad7380.c b/drivers/iio/adc/ad7380.c
index e033c7341911..9ef44b605144 100644
--- a/drivers/iio/adc/ad7380.c
+++ b/drivers/iio/adc/ad7380.c
@@ -75,6 +75,7 @@
#define T_CONVERT_NS 190 /* conversion time */
#define T_CONVERT_0_NS 10 /* 1st conversion start time (oversampling) */
#define T_CONVERT_X_NS 500 /* xth conversion start time (oversampling) */
+#define T_POWERUP_MS 5 /* Power up */
struct ad7380_timing_specs {
const unsigned int t_csh_ns; /* CS minimum high time */
@@ -86,6 +87,8 @@ struct ad7380_chip_info {
unsigned int num_channels;
unsigned int num_simult_channels;
bool has_mux;
+ const char * const *supplies;
+ unsigned int num_supplies;
const char * const *vcm_supplies;
unsigned int num_vcm_supplies;
const unsigned long *available_scan_masks;
@@ -243,6 +246,10 @@ DEFINE_AD7380_8_CHANNEL(ad7386_4_channels, 16, 0, u);
DEFINE_AD7380_8_CHANNEL(ad7387_4_channels, 14, 0, u);
DEFINE_AD7380_8_CHANNEL(ad7388_4_channels, 12, 0, u);
+static const char * const ad7380_supplies[] = {
+ "vcc", "vlogic",
+};
+
static const char * const ad7380_2_channel_vcm_supplies[] = {
"aina", "ainb",
};
@@ -338,6 +345,8 @@ static const struct ad7380_chip_info ad7380_chip_info = {
.channels = ad7380_channels,
.num_channels = ARRAY_SIZE(ad7380_channels),
.num_simult_channels = 2,
+ .supplies = ad7380_supplies,
+ .num_supplies = ARRAY_SIZE(ad7380_supplies),
.available_scan_masks = ad7380_2_channel_scan_masks,
.timing_specs = &ad7380_timing,
};
@@ -347,6 +356,8 @@ static const struct ad7380_chip_info ad7381_chip_info = {
.channels = ad7381_channels,
.num_channels = ARRAY_SIZE(ad7381_channels),
.num_simult_channels = 2,
+ .supplies = ad7380_supplies,
+ .num_supplies = ARRAY_SIZE(ad7380_supplies),
.available_scan_masks = ad7380_2_channel_scan_masks,
.timing_specs = &ad7380_timing,
};
@@ -356,6 +367,8 @@ static const struct ad7380_chip_info ad7383_chip_info = {
.channels = ad7383_channels,
.num_channels = ARRAY_SIZE(ad7383_channels),
.num_simult_channels = 2,
+ .supplies = ad7380_supplies,
+ .num_supplies = ARRAY_SIZE(ad7380_supplies),
.vcm_supplies = ad7380_2_channel_vcm_supplies,
.num_vcm_supplies = ARRAY_SIZE(ad7380_2_channel_vcm_supplies),
.available_scan_masks = ad7380_2_channel_scan_masks,
@@ -367,6 +380,8 @@ static const struct ad7380_chip_info ad7384_chip_info = {
.channels = ad7384_channels,
.num_channels = ARRAY_SIZE(ad7384_channels),
.num_simult_channels = 2,
+ .supplies = ad7380_supplies,
+ .num_supplies = ARRAY_SIZE(ad7380_supplies),
.vcm_supplies = ad7380_2_channel_vcm_supplies,
.num_vcm_supplies = ARRAY_SIZE(ad7380_2_channel_vcm_supplies),
.available_scan_masks = ad7380_2_channel_scan_masks,
@@ -378,6 +393,8 @@ static const struct ad7380_chip_info ad7386_chip_info = {
.channels = ad7386_channels,
.num_channels = ARRAY_SIZE(ad7386_channels),
.num_simult_channels = 2,
+ .supplies = ad7380_supplies,
+ .num_supplies = ARRAY_SIZE(ad7380_supplies),
.has_mux = true,
.available_scan_masks = ad7380_2x2_channel_scan_masks,
.timing_specs = &ad7380_timing,
@@ -388,6 +405,8 @@ static const struct ad7380_chip_info ad7387_chip_info = {
.channels = ad7387_channels,
.num_channels = ARRAY_SIZE(ad7387_channels),
.num_simult_channels = 2,
+ .supplies = ad7380_supplies,
+ .num_supplies = ARRAY_SIZE(ad7380_supplies),
.has_mux = true,
.available_scan_masks = ad7380_2x2_channel_scan_masks,
.timing_specs = &ad7380_timing,
@@ -398,6 +417,8 @@ static const struct ad7380_chip_info ad7388_chip_info = {
.channels = ad7388_channels,
.num_channels = ARRAY_SIZE(ad7388_channels),
.num_simult_channels = 2,
+ .supplies = ad7380_supplies,
+ .num_supplies = ARRAY_SIZE(ad7380_supplies),
.has_mux = true,
.available_scan_masks = ad7380_2x2_channel_scan_masks,
.timing_specs = &ad7380_timing,
@@ -408,6 +429,8 @@ static const struct ad7380_chip_info ad7380_4_chip_info = {
.channels = ad7380_4_channels,
.num_channels = ARRAY_SIZE(ad7380_4_channels),
.num_simult_channels = 4,
+ .supplies = ad7380_supplies,
+ .num_supplies = ARRAY_SIZE(ad7380_supplies),
.available_scan_masks = ad7380_4_channel_scan_masks,
.timing_specs = &ad7380_4_timing,
};
@@ -417,6 +440,8 @@ static const struct ad7380_chip_info ad7381_4_chip_info = {
.channels = ad7381_4_channels,
.num_channels = ARRAY_SIZE(ad7381_4_channels),
.num_simult_channels = 4,
+ .supplies = ad7380_supplies,
+ .num_supplies = ARRAY_SIZE(ad7380_supplies),
.available_scan_masks = ad7380_4_channel_scan_masks,
.timing_specs = &ad7380_4_timing,
};
@@ -426,6 +451,8 @@ static const struct ad7380_chip_info ad7383_4_chip_info = {
.channels = ad7383_4_channels,
.num_channels = ARRAY_SIZE(ad7383_4_channels),
.num_simult_channels = 4,
+ .supplies = ad7380_supplies,
+ .num_supplies = ARRAY_SIZE(ad7380_supplies),
.vcm_supplies = ad7380_4_channel_vcm_supplies,
.num_vcm_supplies = ARRAY_SIZE(ad7380_4_channel_vcm_supplies),
.available_scan_masks = ad7380_4_channel_scan_masks,
@@ -437,6 +464,8 @@ static const struct ad7380_chip_info ad7384_4_chip_info = {
.channels = ad7384_4_channels,
.num_channels = ARRAY_SIZE(ad7384_4_channels),
.num_simult_channels = 4,
+ .supplies = ad7380_supplies,
+ .num_supplies = ARRAY_SIZE(ad7380_supplies),
.vcm_supplies = ad7380_4_channel_vcm_supplies,
.num_vcm_supplies = ARRAY_SIZE(ad7380_4_channel_vcm_supplies),
.available_scan_masks = ad7380_4_channel_scan_masks,
@@ -448,6 +477,8 @@ static const struct ad7380_chip_info ad7386_4_chip_info = {
.channels = ad7386_4_channels,
.num_channels = ARRAY_SIZE(ad7386_4_channels),
.num_simult_channels = 4,
+ .supplies = ad7380_supplies,
+ .num_supplies = ARRAY_SIZE(ad7380_supplies),
.has_mux = true,
.available_scan_masks = ad7380_2x4_channel_scan_masks,
.timing_specs = &ad7380_4_timing,
@@ -458,6 +489,8 @@ static const struct ad7380_chip_info ad7387_4_chip_info = {
.channels = ad7387_4_channels,
.num_channels = ARRAY_SIZE(ad7387_4_channels),
.num_simult_channels = 4,
+ .supplies = ad7380_supplies,
+ .num_supplies = ARRAY_SIZE(ad7380_supplies),
.has_mux = true,
.available_scan_masks = ad7380_2x4_channel_scan_masks,
.timing_specs = &ad7380_4_timing,
@@ -468,6 +501,8 @@ static const struct ad7380_chip_info ad7388_4_chip_info = {
.channels = ad7388_4_channels,
.num_channels = ARRAY_SIZE(ad7388_4_channels),
.num_simult_channels = 4,
+ .supplies = ad7380_supplies,
+ .num_supplies = ARRAY_SIZE(ad7380_supplies),
.has_mux = true,
.available_scan_masks = ad7380_2x4_channel_scan_masks,
.timing_specs = &ad7380_4_timing,
@@ -1004,6 +1039,14 @@ static int ad7380_probe(struct spi_device *spi)
if (!st->chip_info)
return dev_err_probe(&spi->dev, -EINVAL, "missing match data\n");
+ devm_regulator_bulk_get_enable(&spi->dev, st->chip_info->num_supplies,
+ st->chip_info->supplies);
+
+ if (ret)
+ return dev_err_probe(&spi->dev, ret,
+ "Failed to enable power supplies\n");
+ msleep(T_POWERUP_MS);
+
/*
* If there is no REFIO supply, then it means that we are using
* the internal 2.5V reference, otherwise REFIO is reference voltage.
--
2.46.0Hi Julien,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 8bea3878a1511bceadc2fbf284b00bcc5a2ef28d]
url: https://github.com/intel-lab-lkp/linux/commits/Julien-Stephan/dt-bindings-iio-adc-ad7380-remove-voltage-reference-for-supplies/20241007-234838
base: 8bea3878a1511bceadc2fbf284b00bcc5a2ef28d
patch link: https://lore.kernel.org/r/20241007-ad7380-fix-supplies-v1-4-badcf813c9b9%40baylibre.com
patch subject: [PATCH 4/6] iio: adc: ad7380: add missing supplies
config: x86_64-buildonly-randconfig-003-20241008 (https://download.01.org/0day-ci/archive/20241008/202410081608.ZxEPPZ0u-lkp@intel.com/config)
compiler: clang version 18.1.8 (https://github.com/llvm/llvm-project 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241008/202410081608.ZxEPPZ0u-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202410081608.ZxEPPZ0u-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> drivers/iio/adc/ad7380.c:1045:6: warning: variable 'ret' is uninitialized when used here [-Wuninitialized]
1045 | if (ret)
| ^~~
drivers/iio/adc/ad7380.c:1030:9: note: initialize the variable 'ret' to silence this warning
1030 | int ret, i;
| ^
| = 0
1 warning generated.
vim +/ret +1045 drivers/iio/adc/ad7380.c
1024
1025 static int ad7380_probe(struct spi_device *spi)
1026 {
1027 struct iio_dev *indio_dev;
1028 struct ad7380_state *st;
1029 bool external_ref_en;
1030 int ret, i;
1031
1032 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
1033 if (!indio_dev)
1034 return -ENOMEM;
1035
1036 st = iio_priv(indio_dev);
1037 st->spi = spi;
1038 st->chip_info = spi_get_device_match_data(spi);
1039 if (!st->chip_info)
1040 return dev_err_probe(&spi->dev, -EINVAL, "missing match data\n");
1041
1042 devm_regulator_bulk_get_enable(&spi->dev, st->chip_info->num_supplies,
1043 st->chip_info->supplies);
1044
> 1045 if (ret)
1046 return dev_err_probe(&spi->dev, ret,
1047 "Failed to enable power supplies\n");
1048 msleep(T_POWERUP_MS);
1049
1050 /*
1051 * If there is no REFIO supply, then it means that we are using
1052 * the internal 2.5V reference, otherwise REFIO is reference voltage.
1053 */
1054 ret = devm_regulator_get_enable_read_voltage(&spi->dev, "refio");
1055 if (ret < 0 && ret != -ENODEV)
1056 return dev_err_probe(&spi->dev, ret,
1057 "Failed to get refio regulator\n");
1058
1059 external_ref_en = ret != -ENODEV;
1060 st->vref_mv = external_ref_en ? ret / 1000 : AD7380_INTERNAL_REF_MV;
1061
1062 if (st->chip_info->num_vcm_supplies > ARRAY_SIZE(st->vcm_mv))
1063 return dev_err_probe(&spi->dev, -EINVAL,
1064 "invalid number of VCM supplies\n");
1065
1066 /*
1067 * pseudo-differential chips have common mode supplies for the negative
1068 * input pin.
1069 */
1070 for (i = 0; i < st->chip_info->num_vcm_supplies; i++) {
1071 const char *vcm = st->chip_info->vcm_supplies[i];
1072
1073 ret = devm_regulator_get_enable_read_voltage(&spi->dev, vcm);
1074 if (ret < 0)
1075 return dev_err_probe(&spi->dev, ret,
1076 "Failed to get %s regulator\n",
1077 vcm);
1078
1079 st->vcm_mv[i] = ret / 1000;
1080 }
1081
1082 st->regmap = devm_regmap_init(&spi->dev, NULL, st, &ad7380_regmap_config);
1083 if (IS_ERR(st->regmap))
1084 return dev_err_probe(&spi->dev, PTR_ERR(st->regmap),
1085 "failed to allocate register map\n");
1086
1087 /*
1088 * Setting up xfer structures for both normal and sequence mode. These
1089 * struct are used for both direct read and triggered buffer. Additional
1090 * fields will be set up in ad7380_update_xfers() based on the current
1091 * state of the driver at the time of the read.
1092 */
1093
1094 /*
1095 * In normal mode a read is composed of two steps:
1096 * - first, toggle CS (no data xfer) to trigger a conversion
1097 * - then, read data
1098 */
1099 st->normal_xfer[0].cs_change = 1;
1100 st->normal_xfer[0].cs_change_delay.value = st->chip_info->timing_specs->t_csh_ns;
1101 st->normal_xfer[0].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS;
1102 st->normal_xfer[1].rx_buf = st->scan_data;
1103
1104 spi_message_init_with_transfers(&st->normal_msg, st->normal_xfer,
1105 ARRAY_SIZE(st->normal_xfer));
1106 /*
1107 * In sequencer mode a read is composed of four steps:
1108 * - CS toggle (no data xfer) to get the right point in the sequence
1109 * - CS toggle (no data xfer) to trigger a conversion of AinX0 and
1110 * acquisition of AinX1
1111 * - 2 data reads, to read AinX0 and AinX1
1112 */
1113 st->seq_xfer[0].cs_change = 1;
1114 st->seq_xfer[0].cs_change_delay.value = st->chip_info->timing_specs->t_csh_ns;
1115 st->seq_xfer[0].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS;
1116 st->seq_xfer[1].cs_change = 1;
1117 st->seq_xfer[1].cs_change_delay.value = st->chip_info->timing_specs->t_csh_ns;
1118 st->seq_xfer[1].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS;
1119
1120 st->seq_xfer[2].rx_buf = st->scan_data;
1121 st->seq_xfer[2].cs_change = 1;
1122 st->seq_xfer[2].cs_change_delay.value = st->chip_info->timing_specs->t_csh_ns;
1123 st->seq_xfer[2].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS;
1124
1125 spi_message_init_with_transfers(&st->seq_msg, st->seq_xfer,
1126 ARRAY_SIZE(st->seq_xfer));
1127
1128 indio_dev->channels = st->chip_info->channels;
1129 indio_dev->num_channels = st->chip_info->num_channels;
1130 indio_dev->name = st->chip_info->name;
1131 indio_dev->info = &ad7380_info;
1132 indio_dev->modes = INDIO_DIRECT_MODE;
1133 indio_dev->available_scan_masks = st->chip_info->available_scan_masks;
1134
1135 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
1136 iio_pollfunc_store_time,
1137 ad7380_trigger_handler,
1138 &ad7380_buffer_setup_ops);
1139 if (ret)
1140 return ret;
1141
1142 ret = ad7380_init(st, external_ref_en);
1143 if (ret)
1144 return ret;
1145
1146 return devm_iio_device_register(&spi->dev, indio_dev);
1147 }
1148
--
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