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[2a02:842a:d52e:6101:6fd0:6c4:5d68:f0a5]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42f9384f648sm17645555e9.20.2024.10.07.08.45.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Oct 2024 08:45:47 -0700 (PDT) From: Julien Stephan Date: Mon, 07 Oct 2024 17:45:47 +0200 Subject: [PATCH 4/6] iio: adc: ad7380: add missing supplies Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241007-ad7380-fix-supplies-v1-4-badcf813c9b9@baylibre.com> References: <20241007-ad7380-fix-supplies-v1-0-badcf813c9b9@baylibre.com> In-Reply-To: <20241007-ad7380-fix-supplies-v1-0-badcf813c9b9@baylibre.com> To: Lars-Peter Clausen , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Liam Girdwood , Mark Brown , Jonathan Corbet Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Conor Dooley , Jonathan Cameron , linux-doc@vger.kernel.org, Julien Stephan X-Mailer: b4 0.14.1 vcc and vlogic are required but are not retrieved and enabled in the probe. Add them. In order to prepare support for additional parts requiring different supplies, add vcc and vlogic to the platform specific structures Signed-off-by: Julien Stephan --- drivers/iio/adc/ad7380.c | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/drivers/iio/adc/ad7380.c b/drivers/iio/adc/ad7380.c index e033c7341911..9ef44b605144 100644 --- a/drivers/iio/adc/ad7380.c +++ b/drivers/iio/adc/ad7380.c @@ -75,6 +75,7 @@ #define T_CONVERT_NS 190 /* conversion time */ #define T_CONVERT_0_NS 10 /* 1st conversion start time (oversampling) */ #define T_CONVERT_X_NS 500 /* xth conversion start time (oversampling) */ +#define T_POWERUP_MS 5 /* Power up */ =20 struct ad7380_timing_specs { const unsigned int t_csh_ns; /* CS minimum high time */ @@ -86,6 +87,8 @@ struct ad7380_chip_info { unsigned int num_channels; unsigned int num_simult_channels; bool has_mux; + const char * const *supplies; + unsigned int num_supplies; const char * const *vcm_supplies; unsigned int num_vcm_supplies; const unsigned long *available_scan_masks; @@ -243,6 +246,10 @@ DEFINE_AD7380_8_CHANNEL(ad7386_4_channels, 16, 0, u); DEFINE_AD7380_8_CHANNEL(ad7387_4_channels, 14, 0, u); DEFINE_AD7380_8_CHANNEL(ad7388_4_channels, 12, 0, u); =20 +static const char * const ad7380_supplies[] =3D { + "vcc", "vlogic", +}; + static const char * const ad7380_2_channel_vcm_supplies[] =3D { "aina", "ainb", }; @@ -338,6 +345,8 @@ static const struct ad7380_chip_info ad7380_chip_info = =3D { .channels =3D ad7380_channels, .num_channels =3D ARRAY_SIZE(ad7380_channels), .num_simult_channels =3D 2, + .supplies =3D ad7380_supplies, + .num_supplies =3D ARRAY_SIZE(ad7380_supplies), .available_scan_masks =3D ad7380_2_channel_scan_masks, .timing_specs =3D &ad7380_timing, }; @@ -347,6 +356,8 @@ static const struct ad7380_chip_info ad7381_chip_info = =3D { .channels =3D ad7381_channels, .num_channels =3D ARRAY_SIZE(ad7381_channels), .num_simult_channels =3D 2, + .supplies =3D ad7380_supplies, + .num_supplies =3D ARRAY_SIZE(ad7380_supplies), .available_scan_masks =3D ad7380_2_channel_scan_masks, .timing_specs =3D &ad7380_timing, }; @@ -356,6 +367,8 @@ static const struct ad7380_chip_info ad7383_chip_info = =3D { .channels =3D ad7383_channels, .num_channels =3D ARRAY_SIZE(ad7383_channels), .num_simult_channels =3D 2, + .supplies =3D ad7380_supplies, + .num_supplies =3D ARRAY_SIZE(ad7380_supplies), .vcm_supplies =3D ad7380_2_channel_vcm_supplies, .num_vcm_supplies =3D ARRAY_SIZE(ad7380_2_channel_vcm_supplies), .available_scan_masks =3D ad7380_2_channel_scan_masks, @@ -367,6 +380,8 @@ static const struct ad7380_chip_info ad7384_chip_info = =3D { .channels =3D ad7384_channels, .num_channels =3D ARRAY_SIZE(ad7384_channels), .num_simult_channels =3D 2, + .supplies =3D ad7380_supplies, + .num_supplies =3D ARRAY_SIZE(ad7380_supplies), .vcm_supplies =3D ad7380_2_channel_vcm_supplies, .num_vcm_supplies =3D ARRAY_SIZE(ad7380_2_channel_vcm_supplies), .available_scan_masks =3D ad7380_2_channel_scan_masks, @@ -378,6 +393,8 @@ static const struct ad7380_chip_info ad7386_chip_info = =3D { .channels =3D ad7386_channels, .num_channels =3D ARRAY_SIZE(ad7386_channels), .num_simult_channels =3D 2, + .supplies =3D ad7380_supplies, + .num_supplies =3D ARRAY_SIZE(ad7380_supplies), .has_mux =3D true, .available_scan_masks =3D ad7380_2x2_channel_scan_masks, .timing_specs =3D &ad7380_timing, @@ -388,6 +405,8 @@ static const struct ad7380_chip_info ad7387_chip_info = =3D { .channels =3D ad7387_channels, .num_channels =3D ARRAY_SIZE(ad7387_channels), .num_simult_channels =3D 2, + .supplies =3D ad7380_supplies, + .num_supplies =3D ARRAY_SIZE(ad7380_supplies), .has_mux =3D true, .available_scan_masks =3D ad7380_2x2_channel_scan_masks, .timing_specs =3D &ad7380_timing, @@ -398,6 +417,8 @@ static const struct ad7380_chip_info ad7388_chip_info = =3D { .channels =3D ad7388_channels, .num_channels =3D ARRAY_SIZE(ad7388_channels), .num_simult_channels =3D 2, + .supplies =3D ad7380_supplies, + .num_supplies =3D ARRAY_SIZE(ad7380_supplies), .has_mux =3D true, .available_scan_masks =3D ad7380_2x2_channel_scan_masks, .timing_specs =3D &ad7380_timing, @@ -408,6 +429,8 @@ static const struct ad7380_chip_info ad7380_4_chip_info= =3D { .channels =3D ad7380_4_channels, .num_channels =3D ARRAY_SIZE(ad7380_4_channels), .num_simult_channels =3D 4, + .supplies =3D ad7380_supplies, + .num_supplies =3D ARRAY_SIZE(ad7380_supplies), .available_scan_masks =3D ad7380_4_channel_scan_masks, .timing_specs =3D &ad7380_4_timing, }; @@ -417,6 +440,8 @@ static const struct ad7380_chip_info ad7381_4_chip_info= =3D { .channels =3D ad7381_4_channels, .num_channels =3D ARRAY_SIZE(ad7381_4_channels), .num_simult_channels =3D 4, + .supplies =3D ad7380_supplies, + .num_supplies =3D ARRAY_SIZE(ad7380_supplies), .available_scan_masks =3D ad7380_4_channel_scan_masks, .timing_specs =3D &ad7380_4_timing, }; @@ -426,6 +451,8 @@ static const struct ad7380_chip_info ad7383_4_chip_info= =3D { .channels =3D ad7383_4_channels, .num_channels =3D ARRAY_SIZE(ad7383_4_channels), .num_simult_channels =3D 4, + .supplies =3D ad7380_supplies, + .num_supplies =3D ARRAY_SIZE(ad7380_supplies), .vcm_supplies =3D ad7380_4_channel_vcm_supplies, .num_vcm_supplies =3D ARRAY_SIZE(ad7380_4_channel_vcm_supplies), .available_scan_masks =3D ad7380_4_channel_scan_masks, @@ -437,6 +464,8 @@ static const struct ad7380_chip_info ad7384_4_chip_info= =3D { .channels =3D ad7384_4_channels, .num_channels =3D ARRAY_SIZE(ad7384_4_channels), .num_simult_channels =3D 4, + .supplies =3D ad7380_supplies, + .num_supplies =3D ARRAY_SIZE(ad7380_supplies), .vcm_supplies =3D ad7380_4_channel_vcm_supplies, .num_vcm_supplies =3D ARRAY_SIZE(ad7380_4_channel_vcm_supplies), .available_scan_masks =3D ad7380_4_channel_scan_masks, @@ -448,6 +477,8 @@ static const struct ad7380_chip_info ad7386_4_chip_info= =3D { .channels =3D ad7386_4_channels, .num_channels =3D ARRAY_SIZE(ad7386_4_channels), .num_simult_channels =3D 4, + .supplies =3D ad7380_supplies, + .num_supplies =3D ARRAY_SIZE(ad7380_supplies), .has_mux =3D true, .available_scan_masks =3D ad7380_2x4_channel_scan_masks, .timing_specs =3D &ad7380_4_timing, @@ -458,6 +489,8 @@ static const struct ad7380_chip_info ad7387_4_chip_info= =3D { .channels =3D ad7387_4_channels, .num_channels =3D ARRAY_SIZE(ad7387_4_channels), .num_simult_channels =3D 4, + .supplies =3D ad7380_supplies, + .num_supplies =3D ARRAY_SIZE(ad7380_supplies), .has_mux =3D true, .available_scan_masks =3D ad7380_2x4_channel_scan_masks, .timing_specs =3D &ad7380_4_timing, @@ -468,6 +501,8 @@ static const struct ad7380_chip_info ad7388_4_chip_info= =3D { .channels =3D ad7388_4_channels, .num_channels =3D ARRAY_SIZE(ad7388_4_channels), .num_simult_channels =3D 4, + .supplies =3D ad7380_supplies, + .num_supplies =3D ARRAY_SIZE(ad7380_supplies), .has_mux =3D true, .available_scan_masks =3D ad7380_2x4_channel_scan_masks, .timing_specs =3D &ad7380_4_timing, @@ -1004,6 +1039,14 @@ static int ad7380_probe(struct spi_device *spi) if (!st->chip_info) return dev_err_probe(&spi->dev, -EINVAL, "missing match data\n"); =20 + devm_regulator_bulk_get_enable(&spi->dev, st->chip_info->num_supplies, + st->chip_info->supplies); + + if (ret) + return dev_err_probe(&spi->dev, ret, + "Failed to enable power supplies\n"); + msleep(T_POWERUP_MS); + /* * If there is no REFIO supply, then it means that we are using * the internal 2.5V reference, otherwise REFIO is reference voltage. --=20 2.46.0