Revision 3 supports specifying the UART input clock. This allows for
proper computation of the UART divisor when the baud rate is specified.
The earlycon code can accept the following format (See `parse_options`
in `earlycon.c`.):
* <name>,io|mmio|mmio32|mmio32be,<addr>,<baud>,<uartclk>,<options>
This change makes it so the uartclk is passed along if it's defined in
the SPCR table.
Booting with `earlycon` and a SPCR v3 table that has the uartclk and
baud defined:
[ 0.028251] ACPI: SPCR: console: uart,mmio32,0xfedc9000,115200,48000000
[ 0.028267] earlycon: uart0 at MMIO32 0x00000000fedc9000 (options '115200,48000000')
[ 0.028272] printk: legacy bootconsole [uart0] enabled
Link: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
---
drivers/acpi/spcr.c | 5 ++++-
include/acpi/actbl3.h | 6 +++---
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c
index cd36a97b0ea2c7..67ae42afcc59ef 100644
--- a/drivers/acpi/spcr.c
+++ b/drivers/acpi/spcr.c
@@ -209,9 +209,12 @@ int __init acpi_parse_spcr(bool enable_earlycon, bool enable_console)
if (!baud_rate) {
snprintf(opts, sizeof(opts), "%s,%s,0x%llx", uart, iotype,
table->serial_port.address);
- } else {
+ } else if (table->header.revision <= 2 || !table->uartclk) {
snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d", uart, iotype,
table->serial_port.address, baud_rate);
+ } else {
+ snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d,%d", uart, iotype,
+ table->serial_port.address, baud_rate, table->uartclk);
}
pr_info("console: %s\n", opts);
diff --git a/include/acpi/actbl3.h b/include/acpi/actbl3.h
index 8f775e3a08fdfb..afe45a2379866a 100644
--- a/include/acpi/actbl3.h
+++ b/include/acpi/actbl3.h
@@ -92,10 +92,10 @@ struct acpi_table_slit {
/*******************************************************************************
*
* SPCR - Serial Port Console Redirection table
- * Version 2
+ * Version 3
*
* Conforms to "Serial Port Console Redirection Table",
- * Version 1.03, August 10, 2015
+ * Version 1.08, October 7, 2021
*
******************************************************************************/
@@ -120,7 +120,7 @@ struct acpi_table_spcr {
u8 pci_function;
u32 pci_flags;
u8 pci_segment;
- u32 reserved2;
+ u32 uartclk;
};
/* Masks for pci_flags field above */
--
2.46.0.662.g92d0881bb0-googOn Thu, Sep 12, 2024 at 7:39 PM Raul E Rangel <rrangel@chromium.org> wrote:
>
> Revision 3 supports specifying the UART input clock. This allows for
> proper computation of the UART divisor when the baud rate is specified.
>
> The earlycon code can accept the following format (See `parse_options`
> in `earlycon.c`.):
> * <name>,io|mmio|mmio32|mmio32be,<addr>,<baud>,<uartclk>,<options>
>
> This change makes it so the uartclk is passed along if it's defined in
> the SPCR table.
>
> Booting with `earlycon` and a SPCR v3 table that has the uartclk and
> baud defined:
> [ 0.028251] ACPI: SPCR: console: uart,mmio32,0xfedc9000,115200,48000000
> [ 0.028267] earlycon: uart0 at MMIO32 0x00000000fedc9000 (options '115200,48000000')
> [ 0.028272] printk: legacy bootconsole [uart0] enabled
>
> Link: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
>
> Signed-off-by: Raul E Rangel <rrangel@chromium.org>
>
> ---
>
> drivers/acpi/spcr.c | 5 ++++-
> include/acpi/actbl3.h | 6 +++---
> 2 files changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c
> index cd36a97b0ea2c7..67ae42afcc59ef 100644
> --- a/drivers/acpi/spcr.c
> +++ b/drivers/acpi/spcr.c
> @@ -209,9 +209,12 @@ int __init acpi_parse_spcr(bool enable_earlycon, bool enable_console)
> if (!baud_rate) {
> snprintf(opts, sizeof(opts), "%s,%s,0x%llx", uart, iotype,
> table->serial_port.address);
> - } else {
> + } else if (table->header.revision <= 2 || !table->uartclk) {
> snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d", uart, iotype,
> table->serial_port.address, baud_rate);
> + } else {
> + snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d,%d", uart, iotype,
> + table->serial_port.address, baud_rate, table->uartclk);
> }
>
> pr_info("console: %s\n", opts);
> diff --git a/include/acpi/actbl3.h b/include/acpi/actbl3.h
> index 8f775e3a08fdfb..afe45a2379866a 100644
> --- a/include/acpi/actbl3.h
> +++ b/include/acpi/actbl3.h
The part of the patch below is outdated - SPCR v4 is supported already.
Please rebase on the current mainline kernel source.
> @@ -92,10 +92,10 @@ struct acpi_table_slit {
> /*******************************************************************************
> *
> * SPCR - Serial Port Console Redirection table
> - * Version 2
> + * Version 3
> *
> * Conforms to "Serial Port Console Redirection Table",
> - * Version 1.03, August 10, 2015
> + * Version 1.08, October 7, 2021
> *
> ******************************************************************************/
>
> @@ -120,7 +120,7 @@ struct acpi_table_spcr {
> u8 pci_function;
> u32 pci_flags;
> u8 pci_segment;
> - u32 reserved2;
> + u32 uartclk;
> };
>
> /* Masks for pci_flags field above */
> --
> 2.46.0.662.g92d0881bb0-goog
>
On Wed, Oct 2, 2024 at 12:13 PM Rafael J. Wysocki <rafael@kernel.org> wrote:
>
> On Thu, Sep 12, 2024 at 7:39 PM Raul E Rangel <rrangel@chromium.org> wrote:
> >
> > Revision 3 supports specifying the UART input clock. This allows for
> > proper computation of the UART divisor when the baud rate is specified.
> >
> > The earlycon code can accept the following format (See `parse_options`
> > in `earlycon.c`.):
> > * <name>,io|mmio|mmio32|mmio32be,<addr>,<baud>,<uartclk>,<options>
> >
> > This change makes it so the uartclk is passed along if it's defined in
> > the SPCR table.
> >
> > Booting with `earlycon` and a SPCR v3 table that has the uartclk and
> > baud defined:
> > [ 0.028251] ACPI: SPCR: console: uart,mmio32,0xfedc9000,115200,48000000
> > [ 0.028267] earlycon: uart0 at MMIO32 0x00000000fedc9000 (options '115200,48000000')
> > [ 0.028272] printk: legacy bootconsole [uart0] enabled
> >
> > Link: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
> >
> > Signed-off-by: Raul E Rangel <rrangel@chromium.org>
> >
> > ---
> >
> > drivers/acpi/spcr.c | 5 ++++-
> > include/acpi/actbl3.h | 6 +++---
> > 2 files changed, 7 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c
> > index cd36a97b0ea2c7..67ae42afcc59ef 100644
> > --- a/drivers/acpi/spcr.c
> > +++ b/drivers/acpi/spcr.c
> > @@ -209,9 +209,12 @@ int __init acpi_parse_spcr(bool enable_earlycon, bool enable_console)
> > if (!baud_rate) {
> > snprintf(opts, sizeof(opts), "%s,%s,0x%llx", uart, iotype,
> > table->serial_port.address);
> > - } else {
> > + } else if (table->header.revision <= 2 || !table->uartclk) {
> > snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d", uart, iotype,
> > table->serial_port.address, baud_rate);
> > + } else {
> > + snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d,%d", uart, iotype,
> > + table->serial_port.address, baud_rate, table->uartclk);
> > }
> >
> > pr_info("console: %s\n", opts);
> > diff --git a/include/acpi/actbl3.h b/include/acpi/actbl3.h
> > index 8f775e3a08fdfb..afe45a2379866a 100644
> > --- a/include/acpi/actbl3.h
> > +++ b/include/acpi/actbl3.h
>
> The part of the patch below is outdated - SPCR v4 is supported already.
>
> Please rebase on the current mainline kernel source.
Oh awesome. Should I send out all three patches again? Or just this
one? I think patches 1 and 2 can be merged.
>
> > @@ -92,10 +92,10 @@ struct acpi_table_slit {
> > /*******************************************************************************
> > *
> > * SPCR - Serial Port Console Redirection table
> > - * Version 2
> > + * Version 3
> > *
> > * Conforms to "Serial Port Console Redirection Table",
> > - * Version 1.03, August 10, 2015
> > + * Version 1.08, October 7, 2021
> > *
> > ******************************************************************************/
> >
> > @@ -120,7 +120,7 @@ struct acpi_table_spcr {
> > u8 pci_function;
> > u32 pci_flags;
> > u8 pci_segment;
> > - u32 reserved2;
> > + u32 uartclk;
> > };
> >
> > /* Masks for pci_flags field above */
> > --
> > 2.46.0.662.g92d0881bb0-goog
> >
On Fri, Oct 4, 2024 at 7:45 PM Raul Rangel <rrangel@chromium.org> wrote:
>
> On Wed, Oct 2, 2024 at 12:13 PM Rafael J. Wysocki <rafael@kernel.org> wrote:
> >
> > On Thu, Sep 12, 2024 at 7:39 PM Raul E Rangel <rrangel@chromium.org> wrote:
> > >
> > > Revision 3 supports specifying the UART input clock. This allows for
> > > proper computation of the UART divisor when the baud rate is specified.
> > >
> > > The earlycon code can accept the following format (See `parse_options`
> > > in `earlycon.c`.):
> > > * <name>,io|mmio|mmio32|mmio32be,<addr>,<baud>,<uartclk>,<options>
> > >
> > > This change makes it so the uartclk is passed along if it's defined in
> > > the SPCR table.
> > >
> > > Booting with `earlycon` and a SPCR v3 table that has the uartclk and
> > > baud defined:
> > > [ 0.028251] ACPI: SPCR: console: uart,mmio32,0xfedc9000,115200,48000000
> > > [ 0.028267] earlycon: uart0 at MMIO32 0x00000000fedc9000 (options '115200,48000000')
> > > [ 0.028272] printk: legacy bootconsole [uart0] enabled
> > >
> > > Link: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
> > >
> > > Signed-off-by: Raul E Rangel <rrangel@chromium.org>
> > >
> > > ---
> > >
> > > drivers/acpi/spcr.c | 5 ++++-
> > > include/acpi/actbl3.h | 6 +++---
> > > 2 files changed, 7 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c
> > > index cd36a97b0ea2c7..67ae42afcc59ef 100644
> > > --- a/drivers/acpi/spcr.c
> > > +++ b/drivers/acpi/spcr.c
> > > @@ -209,9 +209,12 @@ int __init acpi_parse_spcr(bool enable_earlycon, bool enable_console)
> > > if (!baud_rate) {
> > > snprintf(opts, sizeof(opts), "%s,%s,0x%llx", uart, iotype,
> > > table->serial_port.address);
> > > - } else {
> > > + } else if (table->header.revision <= 2 || !table->uartclk) {
> > > snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d", uart, iotype,
> > > table->serial_port.address, baud_rate);
> > > + } else {
> > > + snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d,%d", uart, iotype,
> > > + table->serial_port.address, baud_rate, table->uartclk);
> > > }
> > >
> > > pr_info("console: %s\n", opts);
> > > diff --git a/include/acpi/actbl3.h b/include/acpi/actbl3.h
> > > index 8f775e3a08fdfb..afe45a2379866a 100644
> > > --- a/include/acpi/actbl3.h
> > > +++ b/include/acpi/actbl3.h
> >
> > The part of the patch below is outdated - SPCR v4 is supported already.
> >
> > Please rebase on the current mainline kernel source.
>
> Oh awesome. Should I send out all three patches again? Or just this
> one? I think patches 1 and 2 can be merged.
I have only received patch [3/3] and this one needs to be resent as
far as I'm concerned.
On Thu 2024-09-12 11:36:21, Raul E Rangel wrote: > Revision 3 supports specifying the UART input clock. This allows for > proper computation of the UART divisor when the baud rate is specified. > > The earlycon code can accept the following format (See `parse_options` > in `earlycon.c`.): > * <name>,io|mmio|mmio32|mmio32be,<addr>,<baud>,<uartclk>,<options> > > This change makes it so the uartclk is passed along if it's defined in > the SPCR table. > > Booting with `earlycon` and a SPCR v3 table that has the uartclk and > baud defined: > [ 0.028251] ACPI: SPCR: console: uart,mmio32,0xfedc9000,115200,48000000 > [ 0.028267] earlycon: uart0 at MMIO32 0x00000000fedc9000 (options '115200,48000000') > [ 0.028272] printk: legacy bootconsole [uart0] enabled > > Link: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table > > Signed-off-by: Raul E Rangel <rrangel@chromium.org> Looks good to me: Reviewed-by: Petr Mladek <pmladek@suse.com> Best Regards, Petr
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