drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-)
From: Qiang Yu <quic_qianyu@quicinc.com>
Currently, only the RX and TX tables are written to the second PHY
(port B) when the 4-lanes mode is configured, but according to Qualcomm
internal documentation, the pcs, pcs_misc, serdes and ln_shrd tables need
to be written as well.
Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
index 5b36cc7ac78b..fd59ebd32f5f 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
@@ -3660,18 +3660,30 @@ static void qmp_pcie_init_port_b(struct qmp_pcie *qmp, const struct qmp_phy_cfg_
{
const struct qmp_phy_cfg *cfg = qmp->cfg;
const struct qmp_pcie_offsets *offs = cfg->offsets;
- void __iomem *tx3, *rx3, *tx4, *rx4;
+ void __iomem *tx3, *rx3, *tx4, *rx4, *pcs, *pcs_misc, *ln_shrd, *serdes;
tx3 = qmp->port_b + offs->tx;
rx3 = qmp->port_b + offs->rx;
tx4 = qmp->port_b + offs->tx2;
rx4 = qmp->port_b + offs->rx2;
+ serdes = qmp->port_b + offs->serdes;
+ pcs = qmp->port_b + offs->pcs;
+ pcs_misc = qmp->port_b + offs->pcs_misc;
+ ln_shrd = qmp->port_b + offs->ln_shrd;
qmp_configure_lane(tx3, tbls->tx, tbls->tx_num, 1);
qmp_configure_lane(rx3, tbls->rx, tbls->rx_num, 1);
qmp_configure_lane(tx4, tbls->tx, tbls->tx_num, 2);
qmp_configure_lane(rx4, tbls->rx, tbls->rx_num, 2);
+
+ qmp_configure(serdes, tbls->serdes, tbls->serdes_num);
+ qmp_configure(serdes, cfg->serdes_4ln_tbl, cfg->serdes_4ln_num);
+
+ qmp_configure(pcs, tbls->pcs, tbls->pcs_num);
+ qmp_configure(pcs_misc, tbls->pcs_misc, tbls->pcs_misc_num);
+
+ qmp_configure(ln_shrd, tbls->ln_shrd, tbls->ln_shrd_num);
}
static void qmp_pcie_init_registers(struct qmp_pcie *qmp, const struct qmp_phy_cfg_tbls *tbls)
---
base-commit: 864b1099d16fc7e332c3ad7823058c65f890486c
change-id: 20240725-phy-qcom-qmp-pcie-write-all-tbls-second-port-8efeced876bf
Best regards,
--
Abel Vesa <abel.vesa@linaro.org>
One more nit: subject prefix should be just phy: qcom-qmp-pcie: Johan
On 26-07-24, 16:42, Johan Hovold wrote: > One more nit: subject prefix should be just > > phy: qcom-qmp-pcie: I dont this so, phy: qcom: subdriver is better and used more widely than this -- ~Vinod
On Wed, Jul 31, 2024 at 04:52:05PM +0530, Vinod Koul wrote: > On 26-07-24, 16:42, Johan Hovold wrote: > > One more nit: subject prefix should be just > > > > phy: qcom-qmp-pcie: > > I dont this so, phy: qcom: subdriver is better and used more widely than > this I don't really care, but if you check the logs you'll see that 90% of the commits do not use a "phy: qcom:" prefix: $ git log --oneline --no-merges drivers/phy/qualcomm/phy-qcom-qmp* | grep "phy: qcom: " | wc 43 404 2949 $ git log --oneline --no-merges drivers/phy/qualcomm/phy-qcom-qmp* | grep "phy: qcom-qmp-" | wc 310 2346 20020 Johan
On Fri, Jul 26, 2024 at 11:09:14AM +0300, Abel Vesa wrote: > From: Qiang Yu <quic_qianyu@quicinc.com> > > Currently, only the RX and TX tables are written to the second PHY > (port B) when the 4-lanes mode is configured, but according to Qualcomm > internal documentation, the pcs, pcs_misc, serdes and ln_shrd tables need > to be written as well. > > Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com> > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > --- > drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 14 +++++++++++++- > 1 file changed, 13 insertions(+), 1 deletion(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > index 5b36cc7ac78b..fd59ebd32f5f 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > @@ -3660,18 +3660,30 @@ static void qmp_pcie_init_port_b(struct qmp_pcie *qmp, const struct qmp_phy_cfg_ > { > const struct qmp_phy_cfg *cfg = qmp->cfg; > const struct qmp_pcie_offsets *offs = cfg->offsets; > - void __iomem *tx3, *rx3, *tx4, *rx4; > + void __iomem *tx3, *rx3, *tx4, *rx4, *pcs, *pcs_misc, *ln_shrd, *serdes; Please order these as serdes, tx/rx, pcs, pcs_misc, ln_shrd so that it matches the order port_a is programmed (even if the hardware doesn't care about this). > > tx3 = qmp->port_b + offs->tx; > rx3 = qmp->port_b + offs->rx; > tx4 = qmp->port_b + offs->tx2; > rx4 = qmp->port_b + offs->rx2; > + serdes = qmp->port_b + offs->serdes; And use the same order here (move serdes above tx3). > + pcs = qmp->port_b + offs->pcs; > + pcs_misc = qmp->port_b + offs->pcs_misc; > + ln_shrd = qmp->port_b + offs->ln_shrd; > qmp_configure_lane(tx3, tbls->tx, tbls->tx_num, 1); > qmp_configure_lane(rx3, tbls->rx, tbls->rx_num, 1); > > qmp_configure_lane(tx4, tbls->tx, tbls->tx_num, 2); > qmp_configure_lane(rx4, tbls->rx, tbls->rx_num, 2); > + > + qmp_configure(serdes, tbls->serdes, tbls->serdes_num); > + qmp_configure(serdes, cfg->serdes_4ln_tbl, cfg->serdes_4ln_num); And here (e.g. move serdes above tx3). > + > + qmp_configure(pcs, tbls->pcs, tbls->pcs_num); > + qmp_configure(pcs_misc, tbls->pcs_misc, tbls->pcs_misc_num); > + > + qmp_configure(ln_shrd, tbls->ln_shrd, tbls->ln_shrd_num); > } Johan
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