Hi Martin, James & Alim,
This series adds support to the ufs-exynos driver for Tensor gs101 found
in Pixel 6. It was send previously in [1] and [2] but included the other
clock, phy and DTS parts. This series has been split into just the
ufs-exynos part to hopefully make things easier.
With this series, plus the phy, clock and dts changes UFS is functional
upstream for Pixel 6. The SKhynix HN8T05BZGKX015 can be enumerated,
partitions mounted etc.
The series is split into some prepatory patches for ufs-exynos and a final
patch that adds the gs101 support.
Note the sysreg clock has been moved to ufs node as fine grained clock
control around the syscon sysreg register accesses doesn't result in
functional UFS.
regards,
Peter
Changes since v2:
- Split into separate per subsystem/maintainer series
(ufs, phy, clock, dts)
- Remove ufs_ prefix on clock names (Rob)
Changes since v1:
- collect up tags
- re-order samsung,exynos-ufs.yaml as per Krzysztof review
- Add sysreg clock to ufs node (Andre)
lore v1: https://lore.kernel.org/linux-clk/20240404122559.898930-1-peter.griffin@linaro.org/
lore v2: https://lore.kernel.org/linux-kernel/20240423205006.1785138-1-peter.griffin@linaro.org/
Peter Griffin (6):
dt-bindings: ufs: exynos-ufs: Add gs101 compatible
scsi: ufs: host: ufs-exynos: Add EXYNOS_UFS_OPT_UFSPR_SECURE option
scsi: ufs: host: ufs-exynos: add EXYNOS_UFS_OPT_TIMER_TICK_SELECT
option
scsi: ufs: host: ufs-exynos: allow max frequencies up to 267Mhz
scsi: ufs: host: ufs-exynos: add some pa_dbg_ register offsets into
drvdata
scsi: ufs: host: ufs-exynos: Add support for Tensor gs101 SoC
.../bindings/ufs/samsung,exynos-ufs.yaml | 38 +++-
drivers/ufs/host/ufs-exynos.c | 197 ++++++++++++++++--
drivers/ufs/host/ufs-exynos.h | 24 ++-
3 files changed, 241 insertions(+), 18 deletions(-)
--
2.44.0.769.g3c40516874-goog