On 16.01.2024 01:09, Daniel Golle wrote:
> On Mon, Jan 15, 2024 at 11:42:38PM +0200, Vladimir Oltean wrote:
>> On Sat, Jan 13, 2024 at 01:25:28PM +0300, Arınç ÜNAL wrote:
>>> On the switch on the MT7988 SoC, there are only 4 PHYs. That's port 0 to 3.
>>> Set the internal phy cases to '0 ... 3'.
>>>
>>> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
>>> Acked-by: Daniel Golle <daniel@makrotopia.org>
>>> ---
>>
>> For this patch to be obviously correct, please make a statement in the
>> commit message about port 4. It doesn't exist at all?
>
> Correct. As shown in Block Diagram 8.1.1.3 on page 125 of
> MT7988A Wi-Fi 7 Generation Router Platform: Datasheet (Open Version)
> Version: 0.1
> Release Date: 2023-10-18
> which is available publicly on BananaPi's Wiki[1].
>
> Port 0~3 are TP user ports, Port 6 is internally linked to XGMII of MAC 0.
> Port 4 and 5 are not used at all in this design.
>
> [1]: https://wiki.banana-pi.org/Banana_Pi_BPI-R4#Documents
Thanks for chiming in Daniel, I will include this on the patch log.
Arınç