On 24-01-02 19:29:49, Konrad Dybcio wrote:
> Previous Qualcomm SoCs over the past couple years have used the Arm DSU
> architecture, which basically unified the meaning of the "cluster" and
> "system". This is however clearly not the case on X1E, as can be seen
> by three separate cluster power domains.
>
> Add the lacking system-level power domain. For now it's going to be
> always-on, as no system-wide idle states are defined at the moment.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/x1e80100.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> index 6f75fc342ceb..fc164b9b3ef1 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> @@ -395,16 +395,24 @@ CPU_PD11: power-domain-cpu11 {
> CLUSTER_PD0: power-domain-cpu-cluster0 {
> #power-domain-cells = <0>;
> domain-idle-states = <&CLUSTER_CL4>, <&CLUSTER_CL5>;
> + power-domains = <&SYSTEM_PD>;
> };
>
> CLUSTER_PD1: power-domain-cpu-cluster1 {
> #power-domain-cells = <0>;
> domain-idle-states = <&CLUSTER_CL4>, <&CLUSTER_CL5>;
> + power-domains = <&SYSTEM_PD>;
> };
>
> CLUSTER_PD2: power-domain-cpu-cluster2 {
> #power-domain-cells = <0>;
> domain-idle-states = <&CLUSTER_CL4>, <&CLUSTER_CL5>;
> + power-domains = <&SYSTEM_PD>;
> + };
> +
> + SYSTEM_PD: power-domain-system {
> + #power-domain-cells = <0>;
> + /* TODO: system-wide idle states */
> };
> };
>
>
> --
> 2.43.0
>